Patents by Inventor Yuki Yoshiya

Yuki Yoshiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11915978
    Abstract: A first regrowth layer and a second regrowth layer comprising GaAs having high resistance are regrown on a surface of an etching stop layer exposed to the bottom of a first groove and a second groove, and then n-type InGaAs is regrown on the first regrowth layer and the second regrowth layer, whereby a source region and a drain region configured to make contact with a channel layer are formed in the first groove and the second groove respectively.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: February 27, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Takuya Hoshi, Yuki Yoshiya, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20230360911
    Abstract: After a nitride semiconductor layer is formed through crystal-growth of a nitride semiconductor containing Ga in a +c-axis direction on the other substrate, the other substrate on which the nitride semiconductor layer is formed is bonded to a substrate in a state where a surface on which the nitride semiconductor layer of the other substrate is formed is on the side of the substrate (a bonding step). This bonding is performed by bonding the surfaces to be bonded by a known direct bonding technology.
    Type: Application
    Filed: November 4, 2020
    Publication date: November 9, 2023
    Inventors: Yuki Yoshiya, Takuya Hoshi, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20230207661
    Abstract: An oxide layer (109) including an oxide of an electrode (108) material is formed by heating in a portion of an electrode (108) in contact with a surface oxidized layer (107). The oxide layer (109) is placed between the electrode (108) and an i-AlGaN layer (106) in contact with both the i-AlGaN layer (106) and the electrode (108).
    Type: Application
    Filed: April 23, 2020
    Publication date: June 29, 2023
    Inventors: Takuya Hoshi, Yuki Yoshiya, Yuta Shiratori, Hiroki Sugiyama
  • Patent number: 11430875
    Abstract: A first barrier layer, a channel layer, a second barrier layer, and a first bonding layer made of high-resistance AlGaN doped with Fe are formed on a first substrate. Thereafter, the first substrate and the second substrate are pasted in a state where the first bonding layer and a second bonding layer made of high-resistance GaN doped with Fe are opposed to each other.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: August 30, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Takuya Hoshi, Yuki Yoshiya, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20220208998
    Abstract: An emitter contact layer, an emitter layer, a base layer, a p-type base layer, a collector layer, and a sub-collector layer are crystal-grown over a first substrate in this order with the main surface as the Group III polar surface. The emitter contact layer includes a nitride semiconductor that is made n-type at a relatively high concentration. The emitter layer includes a nitride semiconductor having a bandgap larger than that of the nitride semiconductor constituting the emitter contact layer. The base layer includes an undoped nitride semiconductor having a bandgap smaller than that of the nitride semiconductor constituting the emitter layer. The p-type base layer includes the same nitride semiconductor as the base layer and made p-type.
    Type: Application
    Filed: May 29, 2019
    Publication date: June 30, 2022
    Inventors: Takuya Hoshi, Yuki Yoshiya, Yuta Shiratori, Hiroki Sugiyama, Minoru Ida, Hideaki Matsuzaki
  • Publication number: 20220051889
    Abstract: A first semiconductor layer, a second semiconductor layer, a channel layer, a barrier layer, and a third semiconductor layer are crystal-grown in this order on a first substrate in the +c axis direction, a second substrate is bonded to the side of the barrier layer of the first substrate, and after that, the first substrate is removed, and the first semiconductor layer is selectively thermally decomposed by heating.
    Type: Application
    Filed: January 8, 2020
    Publication date: February 17, 2022
    Inventors: Yuki Yoshiya, Takuya Hoshi, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20210398857
    Abstract: A first regrowth layer and a second regrowth layer comprising GaAs having high resistance are regrown on a surface of an etching stop layer exposed to the bottom of a first groove and a second groove, and then n-type InGaAs is regrown on the first regrowth layer and the second regrowth layer, whereby a source region and a drain region configured to make contact with a channel layer are formed in the first groove and the second groove respectively.
    Type: Application
    Filed: November 15, 2019
    Publication date: December 23, 2021
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Takuya Hoshi, Yuki Yoshiya, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20210020760
    Abstract: A first barrier layer, a channel layer, a second barrier layer, and a first bonding layer made of high-resistance AlGaN doped with Fe are formed on a first substrate. Thereafter, the first substrate and the second substrate are pasted in a state where the first bonding layer and a second bonding layer made of high-resistance GaN doped with Fe are opposed to each other.
    Type: Application
    Filed: March 27, 2019
    Publication date: January 21, 2021
    Inventors: Takuya Hoshi, Yuki Yoshiya, Hiroki Sugiyama, Hideaki Matsuzaki