Patents by Inventor Yukinori SHIMA

Yukinori SHIMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11552111
    Abstract: A semiconductor device having favorable and stable electrical characteristics is provided. The semiconductor device includes a first and a second transistor over an insulating surface. The first and the second transistors each include a first insulating layer, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a first conductive layer overlapping with the semiconductor layer with the second insulating layer interposed therebetween. The first insulating layer includes a convex first region that overlaps with the semiconductor layer and a second region that does not and is thinner than the first region. The first conductive layer includes a part over the second region where a lower surface of the first conductive layer is positioned below a lower surface of the semiconductor layer. The second transistor further includes a third conductive layer overlapping with the semiconductor layer with the first insulating layer interposed therebetween.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: January 10, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kenichi Okazaki, Masami Jintyou, Yukinori Shima
  • Publication number: 20220406944
    Abstract: A semiconductor device which has favorable electrical characteristics, a method for manufacturing a semiconductor device with high productivity, and a method for manufacturing a semiconductor device with a high yield are provided.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 22, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasutaka NAKAZAWA, Yukinori SHIMA, Kenichi OKAZAKI, Junichi KOEZUKA, Shunpei YAMAZAKI
  • Patent number: 11531243
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: December 20, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Yukinori Shima, Kenichi Okazaki, Shunpei Yamazaki
  • Publication number: 20220359691
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.
    Type: Application
    Filed: July 18, 2022
    Publication date: November 10, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Masami JINTYOU, Takahiro IGUCHI, Yukinori SHIMA, Kenichi OKAZAKI
  • Publication number: 20220350213
    Abstract: The manufacturing yield of a display device is improved. The resistance of a display device to ESD is increased. The display device includes a substrate, a display portion, a connection terminal, a first wiring, and a second wiring. The first wiring is electrically connected to the connection terminal and includes a portion positioned between the connection terminal and the display portion. The second wiring is electrically connected to the connection terminal, is positioned between the connection terminal and an end portion of the substrate, and includes a portion in which a side surface is exposed at an end portion of the substrate. The display portion includes a transistor. The transistor includes a semiconductor layer, a gate insulating layer, and a gate electrode. The semiconductor layer and the second wiring include a metal oxide.
    Type: Application
    Filed: July 13, 2022
    Publication date: November 3, 2022
    Inventors: Kenichi OKAZAKI, Yukinori SHIMA, Daisuke KUROSAKI, Masataka NAKADA
  • Patent number: 11489076
    Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: November 1, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Yukinori Shima, Shinpei Matsuda, Haruyuki Baba, Ryunosuke Honda
  • Patent number: 11482626
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer containing a metal oxide, a first insulating layer, a second insulating layer, a third insulating layer containing a nitride, and a first conductive layer. The first insulating layer includes a projecting first region that overlaps with the semiconductor layer and a second region that does not overlap with the semiconductor layer and is thinner than the first region. The second insulating layer is provided to cover a top surface of the second region, a side surface of the first region, and the semiconductor layer. The first conductive layer is provided over the second insulating layer and a bottom surface of the first conductive layer over the second region includes a portion positioned below a bottom surface of the semiconductor layer.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: October 25, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Kenichi Okazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima
  • Publication number: 20220328692
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.
    Type: Application
    Filed: June 8, 2022
    Publication date: October 13, 2022
    Inventors: Junichi KOEZUKA, Yukinori SHIMA, Suzunosuke HIRAISHI, Kenichi OKAZAKI
  • Patent number: 11462645
    Abstract: A semiconductor device which has favorable electrical characteristics is provided. A method for manufacturing a semiconductor device with high productivity is provided. A method for manufacturing a semiconductor device with a high yield is provided.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: October 4, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Yukinori Shima, Kenichi Okazaki, Junichi Koezuka, Shunpei Yamazaki
  • Publication number: 20220293795
    Abstract: A semiconductor device comprising an oxide semiconductor film, a gate electrode, a first insulating film, a source electrode, a drain electrode, and a second insulating film is provided. Each of a top surface of the gate electrode, a top surface of the source electrode, and a top surface of the drain electrode comprises a region in contact with the second insulating film. A top surface of the first insulating film comprises a region in contact with the gate electrode and a region in contact with the second insulating film and overlapping with the oxide semiconductor film in a cross-sectional view of the oxide semiconductor film. The oxide semiconductor film comprises a region in contact with the first insulating film and a region in contact with the second insulating film and adjacent to the region in contact with the first insulating film in the cross-sectional view.
    Type: Application
    Filed: June 2, 2022
    Publication date: September 15, 2022
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Masami JINTYOU, Yukinori SHIMA, Takashi HAMOCHI, Yasutaka NAKAZAWA
  • Publication number: 20220293641
    Abstract: A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.
    Type: Application
    Filed: June 2, 2022
    Publication date: September 15, 2022
    Inventors: Junichi KOEZUKA, Masami JINTYOU, Yukinori SHIMA, Daisuke KUROSAKI, Masataka NAKADA, Shunpei YAMAZAKI
  • Publication number: 20220285555
    Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.
    Type: Application
    Filed: May 13, 2022
    Publication date: September 8, 2022
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Kenichi OKAZAKI, Yukinori SHIMA, Shinpei MATSUDA, Haruyuki BABA, Ryunosuke HONDA
  • Publication number: 20220285562
    Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.
    Type: Application
    Filed: May 23, 2022
    Publication date: September 8, 2022
    Inventors: Junichi KOEZUKA, Yukinori SHIMA, Hajime TOKUNAGA, Toshinari SASAKI, Keisuke MURAYAMA, Daisuke MATSUBAYASHI
  • Publication number: 20220278236
    Abstract: A semiconductor device having favorable characteristics is provided. A semiconductor device having stable electrical characteristics is provided. An island-shaped insulating layer containing an oxide is provided in contact with a bottom surface of a semiconductor layer containing a metal oxide that exhibits semiconductor characteristics. The insulating layer containing an oxide is provided in contact with a portion of the semiconductor layer to be a channel formation region and is not provided under portions to be low-resistance regions.
    Type: Application
    Filed: May 16, 2022
    Publication date: September 1, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichi KOEZUKA, Masami JINTYOU, Yukinori SHIMA
  • Patent number: 11430817
    Abstract: A novel semiconductor device in which a metal film containing copper (Cu) is used for a wiring, a signal line, or the like in a transistor including an oxide semiconductor film is provided. The semiconductor device includes an oxide semiconductor film having conductivity on an insulating surface and a conductive film in contact with the oxide semiconductor film having conductivity. The conductive film includes a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti).
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: August 30, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Yukinori Shima, Masami Jintyou, Takashi Hamochi, Satoshi Higano, Yasuharu Hosaka, Toshimitsu Obonai
  • Publication number: 20220271150
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device is manufactured by a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a first insulating layer, a third step of forming a first conductive film over the first insulating layer, a fourth step of etching part of the first conductive film to form a first conductive layer, thereby forming a first region over the semiconductor layer that overlaps with the first conductive layer and a second region over the semiconductor layer that does not overlap with the first conductive layer, and a fifth step of performing first treatment on the conductive layer. The first treatment is plasma treatment in an atmosphere including a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element, and a second gas containing a hydrogen element but not containing an oxygen element.
    Type: Application
    Filed: May 13, 2022
    Publication date: August 25, 2022
    Inventors: Kenichi OKAZAKI, Yukinori SHIMA
  • Patent number: 11424334
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: August 23, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima, Kenichi Okazaki
  • Publication number: 20220246731
    Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Yukinori SHIMA, Junichi KOEZUKA, Kenichi OKAZAKI
  • Patent number: 11392004
    Abstract: The manufacturing yield of a display device is improved. The resistance of a display device to ESD is increased. The display device includes a substrate, a display portion, a connection terminal, a first wiring, and a second wiring. The first wiring is electrically connected to the connection terminal and includes a portion positioned between the connection terminal and the display portion. The second wiring is electrically connected to the connection terminal, is positioned between the connection terminal and an end portion of the substrate, and includes a portion in which a side surface is exposed at an end portion of the substrate. The display portion includes a transistor. The transistor includes a semiconductor layer, a gate insulating layer, and a gate electrode. The semiconductor layer and the second wiring include a metal oxide.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: July 19, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenichi Okazaki, Yukinori Shima, Daisuke Kurosaki, Masataka Nakada
  • Patent number: 11380795
    Abstract: A semiconductor device comprising an oxide semiconductor film, a gate electrode, a first insulating film, a source electrode, a drain electrode, and a second insulating film is provided. Each of a top surface of the gate electrode, a top surface of the source electrode, and a top surface of the drain electrode comprises a region in contact with the second insulating film. A top surface of the first insulating film comprises a region in contact with the gate electrode and a region in contact with the second insulating film and overlapping with the oxide semiconductor film in a cross-sectional view of the oxide semiconductor film. The oxide semiconductor film comprises a region in contact with the first insulating film and a region in contact with the second insulating film and adjacent to the region in contact with the first insulating film in the cross-sectional view.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: July 5, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Masami Jintyou, Yukinori Shima, Takashi Hamochi, Yasutaka Nakazawa