Patents by Inventor Yukinori SHIMA

Yukinori SHIMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210273112
    Abstract: A semiconductor device with favorable electric characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, an oxide semiconductor layer, and first to third conductive layers. The oxide semiconductor layer includes a region in contact with the first insulating layer, the first conductive layer is connected to the oxide semiconductor layer, and the second conductive layer is connected to the oxide semiconductor layer. The second insulating layer includes a region in contact with the oxide semiconductor layer, and the third conductive layer includes a region in contact with the second insulating layer. The oxide semiconductor layer includes first to third regions. The first region and the second region are separated from each other, and the third region is located between the first region and the second region. The third region and the third conductive layer overlap with each other with the second insulating layer located therebetween.
    Type: Application
    Filed: May 14, 2021
    Publication date: September 2, 2021
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Masami JINTYOU, Yukinori SHIMA
  • Patent number: 11094804
    Abstract: Provided is a method for manufacturing a semiconductor device whose electric characteristics are prevented from being varied and whose reliability is improved. In the method, an insulating film is formed over an oxide semiconductor film, a buffer film is formed over the insulating film, oxygen is added to the buffer film and the insulating film, a conductive film is formed over the buffer film to which oxygen is added, and an impurity element is added to the oxide semiconductor film using the conductive film as a mask. An insulating film containing hydrogen and overlapping with the oxide semiconductor film may be formed after the impurity element is added to the oxide semiconductor film.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: August 17, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masami Jintyou, Yukinori Shima
  • Publication number: 20210234025
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.
    Type: Application
    Filed: April 12, 2021
    Publication date: July 29, 2021
    Inventors: Junichi KOEZUKA, Yukinori SHIMA, Hajime TOKUNAGA, Toshinari SASAKI, Keisuke MURAYAMA, Daisuke MATSUBAYASHI
  • Patent number: 11069816
    Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a first conductive layer, and a second conductive layer. The second semiconductor layer is positioned over the first semiconductor layer, the second conductive layer is positioned on the second semiconductor layer, and the second insulating layer is provided so as to cover a top surface and a side surface of the second conductive layer. The second conductive layer and the second insulating layer include a first opening, and the third semiconductor layer is provided in contact with a top surface of the second insulating layer, a side surface of the first opening, and the second semiconductor layer.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: July 20, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukinori Shima, Masataka Nakada, Masayoshi Dobashi, Kenichi Okazaki
  • Patent number: 11063066
    Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: July 13, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Yasutaka Nakazawa, Yukinori Shima, Masami Jintyou, Masayuki Sakakura, Motoki Nakashima
  • Patent number: 11063125
    Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: July 13, 2021
    Inventors: Yasuharu Hosaka, Toshimitsu Obonai, Yukinori Shima, Masami Jintyou, Daisuke Kurosaki, Takashi Hamochi, Junichi Koezuka, Kenichi Okazaki, Shunpei Yamazaki
  • Publication number: 20210202745
    Abstract: A semiconductor device which has favorable electrical characteristics is provided. A method for manufacturing a semiconductor device with high productivity is provided. A method for manufacturing a semiconductor device with a high yield is provided.
    Type: Application
    Filed: February 22, 2021
    Publication date: July 1, 2021
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasutaka NAKAZAWA, Yukinori SHIMA, Kenichi OKAZAKI, Junichi KOEZUKA, Shunpei YAMAZAKI
  • Publication number: 20210184049
    Abstract: The stability of steps of processing a wiring formed using copper or the like is increased. The concentration of impurities in a semiconductor film is reduced. Electrical characteristics of a semiconductor device are improved. A semiconductor device includes a semiconductor film, a pair of first protective films in contact with the semiconductor film, a pair of conductive films containing copper or the like in contact with the pair of first protective films, a pair of second protective films in contact with the pair of conductive films on the side opposite the pair of first protective films, a gate insulating film in contact with the semiconductor film, and a gate electrode overlapping with the semiconductor film with the gate insulating film therebetween. In a cross section, side surfaces of the pair of second protective films are located on the outer side of side surfaces of the pair of conductive films.
    Type: Application
    Filed: February 23, 2021
    Publication date: June 17, 2021
    Inventors: Shunpei YAMAZAKI, Masami JINTYOU, Yasutaka NAKAZAWA, Yukinori SHIMA
  • Publication number: 20210184040
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.
    Type: Application
    Filed: January 28, 2021
    Publication date: June 17, 2021
    Inventors: Junichi KOEZUKA, Yukinori SHIMA, Suzunosuke HIRAISHI, Kenichi OKAZAKI
  • Publication number: 20210167223
    Abstract: A semiconductor device with favorable electrical characteristics is to be provided. A highly reliable semiconductor device is to be provided. A semiconductor device with lower power consumption is to be provided. The semiconductor device includes a gate electrode, a first insulating layer over the gate electrode, a metal oxide layer over the first insulating layer, a pair of electrodes over the metal oxide layer, and a second insulating layer over the pair of electrodes. The first insulating layer includes a first region and a second region. The first region has a region being in contact with the metal oxide layer and containing more oxygen than the second region. The second region has a region containing more nitrogen than the first region. The metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and the concentration gradient becomes high on a first region side and on a second region side.
    Type: Application
    Filed: January 19, 2021
    Publication date: June 3, 2021
    Inventors: Junichi KOEZUKA, Kenichi OKAZAKI, Yukinori SHIMA, Yasutaka NAKAZAWA, Yasuharu HOSAKA, Shunpei YAMAZAKI
  • Patent number: 11024742
    Abstract: The stability of steps of processing a wiring formed using copper or the like is increased. The concentration of impurities in a semiconductor film is reduced. Electrical characteristics of a semiconductor device are improved. A semiconductor device includes a semiconductor film, a pair of first protective films in contact with the semiconductor film, a pair of conductive films containing copper or the like in contact with the pair of first protective films, a pair of second protective films in contact with the pair of conductive films on the side opposite the pair of first protective films, a gate insulating film in contact with the semiconductor film, and a gate electrode overlapping with the semiconductor film with the gate insulating film therebetween. In a cross section, side surfaces of the pair of second protective films are located on the outer side of side surfaces of the pair of conductive films.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: June 1, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masami Jintyou, Yasutaka Nakazawa, Yukinori Shima
  • Patent number: 11011648
    Abstract: A semiconductor device with favorable electric characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, an oxide semiconductor layer, and first to third conductive layers. The oxide semiconductor layer includes a region in contact with the first insulating layer, the first conductive layer is connected to the oxide semiconductor layer, and the second conductive layer is connected to the oxide semiconductor layer. The second insulating layer includes a region in contact with the oxide semiconductor layer, and the third conductive layer includes a region in contact with the second insulating layer. The oxide semiconductor layer includes first to third regions. The first region and the second region are separated from each other, and the third region is located between the first region and the second region. The third region and the third conductive layer overlap with each other with the second insulating layer located therebetween.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: May 18, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Masami Jintyou, Yukinori Shima
  • Publication number: 20210119056
    Abstract: The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.
    Type: Application
    Filed: December 8, 2020
    Publication date: April 22, 2021
    Inventors: Junichi KOEZUKA, Masami JINTYOU, Yukinori SHIMA
  • Patent number: 10985283
    Abstract: A semiconductor device with favorable electrical characteristics is to be provided. A highly reliable semiconductor device is to be provided. A semiconductor device with lower power consumption is to be provided. The semiconductor device includes a gate electrode, a first insulating layer over the gate electrode, a metal oxide layer over the first insulating layer, a pair of electrodes over the metal oxide layer, and a second insulating layer over the pair of electrodes. The first insulating layer includes a first region and a second region. The first region has a region being in contact with the metal oxide layer and containing more oxygen than the second region. The second region has a region containing more nitrogen than the first region. The metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and the concentration gradient becomes high on a first region side and on a second region side.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: April 20, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Kenichi Okazaki, Yukinori Shima, Yasutaka Nakazawa, Yasuharu Hosaka, Shunpei Yamazaki
  • Patent number: 10964821
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: March 30, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Suzunosuke Hiraishi, Kenichi Okazaki
  • Patent number: 10957801
    Abstract: A semiconductor device which has favorable electrical characteristics is provided. A method for manufacturing a semiconductor device with high productivity is provided. A method for manufacturing a semiconductor device with a high yield is provided.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: March 23, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Yukinori Shima, Kenichi Okazaki, Junichi Koezuka, Shunpei Yamazaki
  • Patent number: 10916430
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A source electrode and a drain electrode of a channel-etched transistor are each made to have a stacked-layer structure including a first conductive layer and a second conductive layer. A silicide that contains a metal element contained in the second conductive layer and nitrogen is formed to be in contact with a top surface and a side surface of the second conductive layer. Before etching of the first conductive layer, the silicide is formed by exposing the second conductive layer to an atmosphere containing silane, and plasma treatment is performed in a nitrogen atmosphere without exposure to the air.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: February 9, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takashi Hamochi, Yasutaka Nakazawa, Masami Jintyou, Yukinori Shima
  • Publication number: 20210028313
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer containing a metal oxide, a first insulating layer, a second insulating layer, a third insulating layer containing a nitride, and a first conductive layer. The first insulating layer includes a projecting first region that overlaps with the semiconductor layer and a second region that does not overlap with the semiconductor layer and is thinner than the first region. The second insulating layer is provided to cover a top surface of the second region, a side surface of the first region, and the semiconductor layer. The first conductive layer is provided over the second insulating layer and a bottom surface of the first conductive layer over the second region includes a portion positioned below a bottom surface of the semiconductor layer.
    Type: Application
    Filed: March 15, 2019
    Publication date: January 28, 2021
    Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Masami JINTYOU, Takahiro IGUCHI, Yukinori SHIMA
  • Publication number: 20210028014
    Abstract: To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first to third oxide semiconductor films contain the same element. The second oxide semiconductor film includes a region where the crystallinity is lower than the crystallinity of one or both of the first oxide semiconductor film and the third oxide semiconductor film.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 28, 2021
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Kenichi OKAZAKI, Masami JINTYOU, Yukinori SHIMA
  • Patent number: 10903368
    Abstract: The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: January 26, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Masami Jintyou, Yukinori Shima