Patents by Inventor Yuli BarCohen

Yuli BarCohen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10229086
    Abstract: Technologies for controlling timing calibration of a dedicated inter-integrated circuit data bus by a primary microcontroller are disclosed. The primary microcontroller performs a data transfer with a secondary integrated circuit using the dedicated inter-integrated circuit data bus, and determines a duration of the data transfer. If the duration is outside of an acceptable range, the primary microcontroller updates one or more data transfer timing parameters so that the duration of future data transfers are closer to the acceptable range.
    Type: Grant
    Filed: December 26, 2015
    Date of Patent: March 12, 2019
    Assignee: Intel Corporation
    Inventors: Yuli Barcohen, Eli Kupermann, Alexander Brill
  • Patent number: 10202103
    Abstract: A motor vehicle management system provides theft prevention based on contextual information. The motor vehicle management platform includes sensing equipment that can provide input data to determine a context of the vehicle and an operator of the vehicle. The context can include location information of the motor vehicle and an identity of the operator of the motor vehicle. Based on permissions for the operator, the system can determine if a context of the vehicle violates permissions for the identified operator.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: February 12, 2019
    Assignee: Intel Corporation
    Inventors: Tamir D. Munafo, Lital Shiryan, Yuli Barcohen, Varada Tarun Rao, Suraj Sindia
  • Publication number: 20180186334
    Abstract: A motor vehicle management system provides theft prevention based on contextual information. The motor vehicle management platform includes sensing equipment that can provide input data to determine a context of the vehicle and an operator of the vehicle. The context can include location information of the motor vehicle and an identity of the operator of the motor vehicle. Based on permissions for the operator, the system can determine if a context of the vehicle violates permissions for the identified operator.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 5, 2018
    Inventors: Tamir D. MUNAFO, Lital SHIRYAN, Yuli BARCOHEN, Varada Tarun RAO, Suraj SINDIA
  • Patent number: 9836113
    Abstract: In an embodiment, a processor includes first logic to determine first power to be provided to a first portion of a computational resource during a time period. The first portion may be reserved for execution by the processor of a first workload to be executed during the time period. The first power may be determined based at least in part on the first workload and independently of a second workload. The processor may include second logic to determine second power to be provided to a second portion of the computational resource during the time period. The second portion may be reserved for execution by the processor of the second workload during the time period. The second power may be determined based at least in part on the second workload and independently of the first workload.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: December 5, 2017
    Assignee: Intel Corporation
    Inventors: Eli Kupermann, Rajasekaran Andiappan, Suryaprasad Kareenahalli, Yuli Barcohen
  • Publication number: 20170185560
    Abstract: Technologies for controlling timing calibration of a dedicated inter-integrated circuit data bus by a primary microcontroller are disclosed. The primary microcontroller performs a data transfer with a secondary integrated circuit using the dedicated inter-integrated circuit data bus, and determines a duration of the data transfer. If the duration is outside of an acceptable range, the primary microcontroller updates one or more data transfer timing parameters so that the duration of future data transfers are closer to the acceptable range.
    Type: Application
    Filed: December 26, 2015
    Publication date: June 29, 2017
    Inventors: Yuli Barcohen, Eli Kupermann, Alexander Brill
  • Publication number: 20150370564
    Abstract: Described is an integrated circuit (IC) comprising: a processor; and a plurality of registers coupled to the processor, wherein the processor to select one of the registers of the plurality to stall execution of an instruction by a predetermined time.
    Type: Application
    Filed: June 24, 2014
    Publication date: December 24, 2015
    Inventors: Eli Kupermann, Yuli Barcohen, Suryaprasad Kareenahalli
  • Publication number: 20150177820
    Abstract: In an embodiment, a processor includes first logic to determine first power to be provided to a first portion of a computational resource during a time period. The first portion may be reserved for execution by the processor of a first workload to be executed during the time period. The first power may be determined based at least in part on the first workload and independently of a second workload. The processor may include second logic to determine second power to be provided to a second portion of the computational resource during the time period. The second portion may be reserved for execution by the processor of the second workload during the time period. The second power may be determined based at least in part on the second workload and independently of the first workload.
    Type: Application
    Filed: December 23, 2013
    Publication date: June 25, 2015
    Inventors: Eli Kupermann, Rajasekaran Andiappan, Suryaprasad Kareenahalli, Yuli Barcohen
  • Patent number: 6944670
    Abstract: An apparatus and method that can enable multi-protocol data processing at a single point in a data network. The apparatus includes a logic state machine that is capable of performing a variety of pre-defined actions for a plurality of communication protocols. The present data processing solution enables wire speed data processing, utilizing minimal instruction memory, because all the data resources required to process multiple protocols are stored on state machine tables, in the data memory. According to the data processing methodology, incoming packet headers are parsed for session ID, protocol ID and events ID per protocol. A relevant session history block is then found by a General State Machine Handler, according to the protocol ID, and the current state of each protocol is extracted. Subsequently, the relevant State Machine Table is found, according to the protocol ID, wherein a list of actions is described.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: September 13, 2005
    Assignee: Commatch Ltd.
    Inventors: Boris Krichevski, Yuli BarCohen, Marina Popilov, Iulian David
  • Publication number: 20030177252
    Abstract: An apparatus and method that can enable multi-protocol data processing at a single point in a data network. The apparatus includes a logic state machine that is capable of performing a variety of pre-defined actions for a plurality of communication protocols. The present data processing solution enables wire speed data processing, utilizing minimal instruction memory, because all the data resources required to process multiple protocols are stored on state machine tables, in the data memory. According to the data processing methodology, incoming packet headers are parsed for session ID, protocol ID and events ID per protocol. A relevant session history block is then found by a General State Machine Handler, according to the protocol ID, and the current state of each protocol is extracted. Subsequently, the relevant State Machine Table is found, according to the protocol ID, wherein a list of actions is described.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 18, 2003
    Applicant: Firebit Ltd.
    Inventors: Boris Krichevski, Yuli BarCohen, Marina Popilov, Iulian David