Abstract: Depositing gallium nitride and carbon (GaN:C) (e.g., in the form of composite layers) when forming a gallium nitride drain of a transistor provides a buffer between the gallium nitride of the drain and silicon of a substrate in which the drain is formed. As a result, gaps and other defects caused by lattice mismatch are reduced, which improves electrical performance of the drain. Additionally, current leakage into the substrate is reduced, which further improves electrical performance of the drain. Additionally, or alternatively, implanting silicon in an aluminum nitride (AlN) liner for a gallium nitride drain reduces contact resistance at an interface between the gallium nitride and the silicon. As a result, electrical performance of the transistor is improved.

Abstract: Systems and methods are provided that may be implemented to control operation of a power supply unit (PSU) during a low power state. The disclosed systems and methods may be implemented to control operation of a PSU relay included within the PSU, while the information handling system is operating in a low power state, e.g., such as the modern standby (S0ix) state. The disclosed systems and methods may also be implemented to provide intelligent PSU relay control that may be utilized to control operation of the PSU relay when the information handling system is entering, operating within, and exiting the modern standby (S0ix) state. This intelligent PSU relay control may include at least two operating modes: a modern standby mode and a normal mode of operation, and may be implemented to ensure that the PSU relay remains off during modern standby and returns to normal relay operation upon exiting modern standby.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a photodiode region disposed within a substrate having a first semiconductor material. A second semiconductor material is disposed on the substrate. A doped region is between the substrate and a part of the second semiconductor material. The second semiconductor material includes a projection extending outward from a surface of the second semiconductor material and towards the photodiode region. The projection extends through the doped region.

Abstract: The present disclosure relates to an image sensor integrated chip. The image sensor integrated chip includes a photodiode region disposed within a substrate having a first semiconductor material region. A second semiconductor material region is disposed onto the substrate. A patterned doped layer is arranged between the substrate and the second semiconductor material region. The second semiconductor material region includes a sidewall connecting to a bottom surface of the second semiconductor material region. The sidewall extends through the patterned doped layer. A bottom surface of the second semiconductor material region is directly over the photodiode region.

Abstract: An ear thermometer capable of identifying an infrared transmittance of a probe cover is provided and includes an ear thermometer body, a probe, and a plurality of activation elements. The probe is disposed on the ear thermometer body. A closed end of the probe cover is used for infrared transmittance, and the probe cover has different infrared transmittances according to a thickness variation thereof. The activation elements are disposed on the ear thermometer body and configured to detect the infrared transmittance of the probe cover. Each of the activation elements includes an ON state and an OFF state so that the activation elements are arranged to form different sensor combinations, which respectively correspond to different infrared transmittances, and any two of the different sensor combinations have the two corresponding infrared transmittances that are different from one another.

Abstract: In some embodiments, the present disclosure relates to a device. The device includes an isolation structure disposed over a lower conductor and an additional electrode disposed over the isolation structure. A conductive layer includes a lower horizontal segment disposed on the lower conductor, a vertical segment extending along a sidewall of the isolation structure, and an upper horizontal segment disposed over the isolation structure. The upper horizontal segment has a different thickness than the lower horizontal segment.

Abstract: In some embodiments, the present disclosure relates to a display device. The display device includes an isolation structure disposed over a reflector electrode, an additional electrode disposed over the isolation structure, and an optical emitter structure disposed over the additional electrode. A via structure includes a lower horizontal segment disposed on the reflector electrode, a vertical segment extending along a sidewall of the isolation structure, and an upper horizontal segment disposed over the isolation structure. The upper horizontal segment is connected to the lower horizontal segment by the vertical segment.

Abstract: Systems and methods are provided that may be implemented to control operation of a power supply unit (PSU) during a low power state. The disclosed systems and methods may be implemented to control operation of a PSU relay included within the PSU, while the information handling system is operating in a low power state, e.g., such as the modern standby (S0ix) state. The disclosed systems and methods may also be implemented to provide intelligent PSU relay control that may be utilized to control operation of the PSU relay when the information handling system is entering, operating within, and exiting the modern standby (S0ix) state. This intelligent PSU relay control may include at least two operating modes: a modern standby mode and a normal mode of operation, and may be implemented to ensure that the PSU relay remains off during modern standby and returns to normal relay operation upon exiting modern standby.

Abstract: In an embodiment, an apparatus includes: a susceptor including substrate pockets; a gas injector disposed over the susceptor, the gas injector having first process regions, the gas injector including a first gas mixing hub and first distribution valves connecting the first gas mixing hub to the first process regions; and a controller connected to the gas injector and the susceptor, the controller being configured to: connect a first precursor material and a carrier gas to the first gas mixing hub; mix the first precursor material and the carrier gas in the first gas mixing hub to produce a first precursor gas; rotate the susceptor to rotate a first substrate disposed in one of the substrate pockets; and while rotating the susceptor, control the first distribution valves to sequentially introduce the first precursor gas at each of the first process regions as the first substrate enters each first process region.

Abstract: A temperature calibration method of an infrared thermal image camera and a calibration method of a temperature sensing system of an infrared thermal image camera are provided. The temperature calibration method of the infrared thermal image camera includes: providing a temperature sensing system to measure an object under test, so as to obtain an uncalibrated temperature; and calibrating the uncalibrated temperature to obtain a calibrated temperature, according to the uncalibrated temperature and a temperature calibration function. The temperature calibration function is obtained through a regression analysis.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including an optical device disposed on a substrate. A dielectric structure overlies the substrate. The dielectric structure comprises one or more sidewalls defining a light channel over a region of the optical device. A protective structure is above the optical device and disposed on opposing sides of the light channel.

Abstract: An image processing method includes: performing content analysis upon an input frame to generate at least one content analysis result of the input frame; determining, by a processing circuit, an anti-blue light strength level for the input frame according to content analysis result(s) of the input frame; and in response to the anti-blue light strength level determined for the input frame, performing color correction upon the input frame to generate an output frame.

Abstract: A dual-purpose temperature measuring device includes a device main body, a first signal control module, a first temperature measurement module, a detachable structure, a second signal control module, a second temperature measurement module, a first information display module and a second information display module. The first signal control module disposed inside the device main body. The first temperature measurement module and the first information display module are respectively disposed inside and on the device main body. The detachable structure is detachably disposed on the device main body. The second signal control module is disposed inside the detachable structure. The second temperature measurement module and the second information display module are disposed inside the detachable structure.

Abstract: A dual-purpose temperature measuring device includes a device main body, a signal control module, a first temperature measurement module, a movable structure, a second temperature measurement module and an information display module. The signal control module is disposed inside the device main body. The first temperature measurement module is disposed inside the device main body and electrically connected to the signal control module. The movable structure is movably disposed on the device main body. The second temperature measurement module is disposed inside the movable structure and electrically connected to the signal control module. The information display module is disposed on the device main body and electrically connected to the signal control module.

Abstract: In some embodiments, the present disclosure relates to a display device that includes a first reflector electrode and a second reflector electrode that is separated from the first reflector electrode. The display device further includes an isolation structure that overlies the first and second reflector electrodes. The isolation structure includes a first and second portion. The first portion overlies the first reflector electrode and has a first thickness. The second portion overlies the second reflector electrode, has a second thickness greater than the first thickness, and is separated from the first portion of the isolation structure. The display device also includes a first optical emitter structure and a second optical emitter structure that respectively overlie the first portion and the second portion of the isolation structure.

Abstract: A probe cover for an ear thermometer and a grouping method of the same are provided. The probe cover for the ear thermometer includes a conical main body having a closed end and an open end, an annular elastomer, and a flange. The closed end is penetrable by infrared rays, and has different infrared transmittances according to thickness variations of the closed end. The annular elastomer is located between the conical main body and the flange. The flange has a plurality of detection positions, each of which having a positive detection pattern or a negative detection pattern, such that the detection positions are arranged to form a plurality of different detection combinations. The different detection combinations respectively correspond to the different infrared transmittances, and any two of the different detection combinations have the two corresponding infrared transmittances that are different from one another.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a plurality of conductive contacts overlying a semiconductor substrate. A plurality of first conductive wires is disposed on the plurality of conductive contacts. A plurality of conductive vias overlies the first conductive wires. An etch stop structure is disposed on the first conductive wires. The plurality of conductive vias extend through the etch stop structure. The etch stop structure includes a first etch stop layer, a first insulator layer, and a second etch stop layer. The first insulator layer is disposed between the first etch stop layer and the second etch stop layer.

Abstract: Depositing gallium nitride and carbon (GaN:C) (e.g., in the form of composite layers) when forming a gallium nitride drain of a transistor provides a buffer between the gallium nitride of the drain and silicon of a substrate in which the drain is formed. As a result, gaps and other defects caused by lattice mismatch are reduced, which improves electrical performance of the drain. Additionally, current leakage into the substrate is reduced, which further improves electrical performance of the drain. Additionally, or alternatively, implanting silicon in an aluminum nitride (AlN) liner for a gallium nitride drain reduces contact resistance at an interface between the gallium nitride and the silicon. As a result, electrical performance of the transistor is improved.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an image sensor in which a device layer has high crystalline quality. According to some embodiments, a hard mask layer is deposited covering a substrate. A first etch is performed into the hard mask layer and the substrate to form a cavity. A second etch is performed to remove crystalline damage from the first etch and to laterally recess the substrate in the cavity so the hard mask layer overhangs the cavity. A sacrificial layer is formed lining cavity, a blanket ion implantation is performed into the substrate through the sacrificial layer, and the sacrificial layer is removed. An interlayer is epitaxially grown lining the cavity and having a top surface underlying the hard mask layer, and a device layer is epitaxially grown filling the cavity over the interlayer. A photodetector is formed in the device layer.

Abstract: Controlling power consumption at an IHS, including receiving electrical power associated with an initial voltage at a first time; determining that the IHS is to enter a low-power state, and in response: adjusting an UVP parameter for the electrical power from a first voltage to a second voltage, the second voltage less than the first voltage, the second voltage based on the low-power state; adjusting an OCP parameter for the electrical power from a first amperage to a second amperage, the second amperage less than the first amperage, the second amperage based on the low-power state; trimming the initial voltage of the electrical power to a trimmed voltage, the trimmed voltage less the initial voltage and greater than the second voltage; adjusting the power state of the IHS to the low-power state; receiving the electrical power having the trimmed voltage at a second time after the first time.