Patents by Inventor Yuri Erokhin
Yuri Erokhin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10409148Abstract: A high dynamic range projector (HDRP) is configured with at least one spatial light modulator having red, green and blue digital light projector (DPL) chips, a light laser source including red, green and blue (RGB) light laser systems which are operative to illuminate respective DLP chips; and a central processing unit (CPU) coupled to the DLP engines and respective RGB light laser systems, wherein the CPU is operative to determine an optimal average power of each of the RGB light laser systems at a frame rate based on a desired contrast ratio.Type: GrantFiled: November 7, 2017Date of Patent: September 10, 2019Assignee: IPG PHOTONICS CORPORATIONInventors: Oleg Shkurikhin, Alexey Avdokhin, Andrei Babushkin, Yuri Erokhin
-
Publication number: 20180203339Abstract: A high dynamic range projector (HDRP) is configured with at least one spatial light modulator having red, green and blue digital light projector (DPL) chips, a light laser source including red, green and blue (RGB) light laser systems which are operative to illuminate respective DLP chips; and a central processing unit (CPU) coupled to the DLP engines and respective RGB light laser systems, wherein the CPU is operative to determine an optimal average power of each of the RGB light laser systems at a frame rate based on a desired contrast ratio.Type: ApplicationFiled: November 7, 2017Publication date: July 19, 2018Inventors: Oleg SHKURIKHIN, Alexey AVDOKHIN, Andrei BABUSHKIN, Yuri EROKHIN
-
Patent number: 9941120Abstract: The inventive system for crystallizing an amorphous silicon (a-Si) film is configured with a quasi-continuous wave fiber laser source operative to emit a film irradiating pulsed beam. The fiber laser source is operative to emit a plurality of non-repetitive pulses incident on the a-Si. In particular, the fiber laser is operative to emit multiple discrete packets of film irradiating light at a burst repetition rate (BRR), and a plurality of pulses within each packet emitted at a pulse repetition rate (PRR) which is higher than the BRR. The pulse energy, pulse duration of each pulse and the PRR are controlled so that each packet has a desired packet temporal power profile (W/cm2) and packet energy sufficient to provide transformation of a-Si to polysilicon (p-Si) at each location of the film which is exposed to at least one packets.Type: GrantFiled: July 2, 2015Date of Patent: April 10, 2018Assignee: IPG PHOTONICS CORPORATIONInventors: Alexey Avdokhin, Yuri Erokhin, Manuel Leonardo, Alexander Limanov, Igor Samartsev, Michael von Dadelszen
-
Publication number: 20160013057Abstract: The inventive system for crystallizing an amorphous silicon (a-Si) film is configured with a quasi-continuous wave fiber laser source operative to emit a film irradiating pulsed beam. The fiber laser source is operative to emit a plurality of non-repetitive pulses incident on the a-Si. In particular, the fiber laser is operative to emit multiple discrete packets of film irradiating light at a burst repetition rate (BRR), and a plurality of pulses within each packet emitted at a pulse repetition rate (PRR) which is higher than the BRR. The pulse energy, pulse duration of each pulse and the PRR are controlled so that each packet has a desired packet temporal power profile (W/cm2) and packet energy sufficient to provide transformation of a-Si to polysilicon (p-Si) at each location of the film which is exposed to at least one packets.Type: ApplicationFiled: July 2, 2015Publication date: January 14, 2016Inventors: Alexey AVDOKHIN, Yuri EROKHIN, Manuel LEONARDO, Alexander LIMANOV, Igor SAMARTSEV, Michael von Dadelszen
-
Patent number: 9190498Abstract: A three-dimensional structure disposed on a substrate is processed so as to alter the etch rate of material disposed on at least one surface of the structure. In some embodiments, a conformal deposition of material is performed on the three-dimensional structure. Subsequently, an ion implant is performed on at least one surface of the three-dimensional structure. This ion implant serves to alter the etch rate of the material deposited on that structure. In some embodiments, the ion implant increases the etch rate of the material. In other embodiments, the ion implant decreases the etch rate. In some embodiments, ion implants are performed on more than one surface, such that the material on at least one surface is etched more quickly and material on at least one other surface is etched more slowly.Type: GrantFiled: September 13, 2013Date of Patent: November 17, 2015Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Adam Brand, Srinivas Nemani, John J. Hautala, Ludovic Godet, Yuri Erokhin
-
Publication number: 20140080276Abstract: A three-dimensional structure disposed on a substrate is processed so as to alter the etch rate of material disposed on at least one surface of the structure. In some embodiments, a conformal deposition of material is performed on the three-dimensional structure. Subsequently, an ion implant is performed on at least one surface of the three-dimensional structure. This ion implant serves to alter the etch rate of the material deposited on that structure. In some embodiments, the ion implant increases the etch rate of the material. In other embodiments, the ion implant decreases the etch rate. In some embodiments, ion implants are performed on more than one surface, such that the material on at least one surface is etched more quickly and material on at least one other surface is etched more slowly.Type: ApplicationFiled: September 13, 2013Publication date: March 20, 2014Inventors: Adam Brand, Srinivas Nemani, John J. Hautala, Ludovic Godet, Yuri Erokhin
-
Patent number: 8617955Abstract: A method of treating a CMOS device. The method may include providing a first stress liner on a transistor of a first dopant type in the CMOS device. The method may further include exposing the CMOS device to first ions in a first exposure, the first ions configured to reduce contact resistance in a source/drain region of a transistor of a second dopant type.Type: GrantFiled: July 12, 2011Date of Patent: December 31, 2013Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Andrew Waite, Yuri Erokhin, Stanislav Todorov
-
Patent number: 8598025Abstract: An improved method of doping a workpiece is disclosed. In this method, a film comprising the species to be implanted is introduced to the surface of a planar or three-dimensional workpiece. This film can be grown using CVD, a bath or other means. The workpiece with the film is then subjected to ion bombardment to help drive the dopant into the workpiece. This ion bombardment is performed at elevated temperatures to reduce crystal damage and create a more abrupt doped region.Type: GrantFiled: November 14, 2011Date of Patent: December 3, 2013Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Louis Steen, Yuri Erokhin, Hans-Joachin Ludwig Gossmann
-
Publication number: 20130015528Abstract: A method of treating a CMOS device. The method may include providing a first stress liner on a transistor of a first dopant type in the CMOS device. The method may further include exposing the CMOS device to first ions in a first exposure, the first ions configured to reduce contact resistance in a source/drain region of a transistor of a second dopant type.Type: ApplicationFiled: July 12, 2011Publication date: January 17, 2013Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Andrew Waite, Yuri Erokhin, Stanislav Todorov
-
Publication number: 20120135578Abstract: An improved method of doping a workpiece is disclosed. In this method, a film comprising the species to be implanted is introduced to the surface of a planar or three-dimensional workpiece. This film can be grown using CVD, a bath or other means. The workpiece with the film is then subjected to ion bombardment to help drive the dopant into the workpiece. This ion bombardment is performed at elevated temperatures to reduce crystal damage and create a more abrupt doped region.Type: ApplicationFiled: November 14, 2011Publication date: May 31, 2012Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Louis Steen, Yuri Erokhin, Hans-Joachim Ludwig Gossman
-
Patent number: 7939424Abstract: A method for wafer bonding two substrates activated by ion implantation is disclosed. An in situ ion bonding chamber allows ion activation and bonding to occur within an existing process tool utilized in a manufacturing process line. Ion activation of at least one of the substrates is performed at low implant energies to ensure that the wafer material below the thin surface layers remains unaffected by the ion activation.Type: GrantFiled: September 17, 2008Date of Patent: May 10, 2011Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Yuri Erokhin, Paul Sullivan, Steven R. Walther, Peter Nunan
-
Patent number: 7820527Abstract: An approach for providing a cleave initiation using a varying ion implant dose is described. In one embodiment, there is a method of forming a substrate. In this embodiment, a semiconductor material is provided and implanted with a spatially varying dose of one or more ion species. A handler substrate is attached to the implanted semiconductor material. A cleave of the implanted semiconductor material is initiated from the handler substrate at a preferential location that is a function of a dose gradient that develops from the spatially varying dose of one or more ion species implanted into the semiconductor material.Type: GrantFiled: May 12, 2008Date of Patent: October 26, 2010Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Peter Nunan, Steven R. Walther, Yuri Erokhin, Paul J. Sullivan
-
Publication number: 20090209084Abstract: An approach for providing a cleave initiation using a varying ion implant dose is described. In one embodiment, there is a method of forming a substrate. In this embodiment, a semiconductor material is provided and implanted with a spatially varying dose of one or more ion species. A handler substrate is attached to the implanted semiconductor material.Type: ApplicationFiled: May 12, 2008Publication date: August 20, 2009Inventors: Peter Nunan, Steven R. Walther, Yuri Erokhin, Paul J. Sullivan
-
Publication number: 20090181492Abstract: An approach for nano-cleaving a thin-film of silicon for solar cell fabrication is described. In one embodiment, there is a method of forming a substrate for use as a solar cell substrate. In this embodiment, a substrate of silicon is provided and implanted with an ion flux. A non-silicon substrate is attached to the thin-film of silicon to form a solar cell substrate.Type: ApplicationFiled: January 11, 2008Publication date: July 16, 2009Inventors: Peter Nunan, Steven R. Walther, Yuri Erokhin
-
Publication number: 20090084757Abstract: An approach for providing uniformity control in an ion beam etch is described. In one embodiment, there is a method for providing uniform etching in an ion beam based etch process. In this embodiment, an ion beam is directed at a surface of a substrate. The surface of the substrate is etched with the ion beam. The etching is controlled to attain uniformity in the etch of the substrate. The control attains uniformity as a function of at least one ion beam based parameter selected from a plurality of ion beam based parameters.Type: ApplicationFiled: September 28, 2007Publication date: April 2, 2009Inventors: Yuri Erokhin, Steven R. Walther, Peter D. Nunan
-
Publication number: 20090084988Abstract: An ion implanter is disclosed. One such ion implanter includes an ion beam source configured to generate oxygen, nitrogen, helium, or hydrogen ions into an ion beam with a specific dose range, and an analyzer magnet configured to remove undesired species from the ion beam. The ion implanter includes an electrostatic chuck having a backside gas thermal coupling that is configured to hold a single workpiece for silicon-on-insulator implantation by the ion beam and is configured to cool the workpiece to a temperature in a range of approximately 300° C. to 600° C.Type: ApplicationFiled: September 27, 2007Publication date: April 2, 2009Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Julian Blake, Yuri Erokhin, Jonathan England
-
Publication number: 20090081848Abstract: A method for wafer bonding two substrates activated by ion implantation is disclosed. An in situ ion bonding chamber allows ion activation and bonding to occur within an existing process tool utilized in a manufacturing process line. Ion activation of at least one of the substrates is performed at low implant energies to ensure that the wafer material below the thin surface layers remains unaffected by the ion activation.Type: ApplicationFiled: September 17, 2008Publication date: March 26, 2009Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Yuri EROKHIN, Paul SULLIVAN, Steven R. WALTHER, Peter NUNAN
-
Patent number: 7294561Abstract: The present invention provides methods for forming SOI wafers having internal gettering layers for sequestering metallic impurities. More particularly, in one embodiment of the invention, a plurality of sites for sequestering metallic impurities are formed in a silicon substrate by implanting a selected dose of oxygen ions therein. In one embodiment, an epitaxial layer of crystalline silicon is formed over the substrate, and a buried continuous oxide layer is generated in the epitaxial layer, for example, by employing a SIMOX process.Type: GrantFiled: August 14, 2003Date of Patent: November 13, 2007Assignee: Ibis Technology CorporationInventors: Yuri Erokhin, Kevin J. Dempsey
-
Publication number: 20070184194Abstract: Techniques for depositing metallic films using ion implantation surface modification for catalysis of electroless deposition are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for depositing a metallic film. The method may comprise depositing a catalyzing material on a structure, wherein the structure comprises a substrate, a dielectric layer on the substrate, and a resist layer on the dielectric layer, wherein the dielectric layer and the resist layer have one or more openings. The method may also comprise stripping the resist layer. The method may further comprise depositing a metallic film on the catalyzing material in the one or more openings of the structure to fill the one or more openings.Type: ApplicationFiled: February 7, 2007Publication date: August 9, 2007Applicant: Varian Semiconductor Equipment AssociatesInventors: Peter D. Nunan, Yuri Erokhin
-
Patent number: RE48398Abstract: The inventive system for crystallizing an amorphous silicon (a-Si) film is configured with a quasi-continuous wave fiber laser source operative to emit a film irradiating pulsed beam. The fiber laser source is operative to emit a plurality of non-repetitive pulses incident on the a-Si. In particular, the fiber laser is operative to emit multiple discrete packets of film irradiating light at a burst repetition rate (BRR), and a plurality of pulses within each packet emitted at a pulse repetition rate (PRR) which is higher than the BRR. The pulse energy, pulse duration of each pulse and the PRR are controlled so that each packet has a desired packet temporal power profile (W/cm2) and packet energy sufficient to provide transformation of a-Si to polysilicon (p-Si) at each location of the film which is exposed to at least one packets.Type: GrantFiled: August 8, 2019Date of Patent: January 19, 2021Assignee: IPG PHOTONICS CORPORATIONInventors: Alexey Avdokhin, Yuri Erokhin, Manuel Leonardo, Alexander Limanov, Igor Samartsev, Michael von Dadelszen