Abstract: A semiconductor light-emitting device includes: a board including a front surface, a back surface facing an opposite side of the front surface, a first wiring pattern formed on the front surface, and a second wiring pattern formed on the side of the back surface with respect to the first wiring pattern; and a light-emitting element, a switching element, and a capacitor, which are electrically connected to one another by both the first wiring pattern and the second wiring pattern. Among the light-emitting element, the switching element, and the capacitor, a first predetermined element and a second predetermined element are arranged in a first direction and the second predetermined element and a third predetermined element are arranged in a second direction. The second wiring pattern forms a second current path opposite to a direction of a first current path. The second current path overlaps the first current path.

Abstract: A laser diode driving circuit includes a switching element, a controller configured to turn on an off the switching element, a second series circuit connected in parallel with a first series circuit including a laser diode, and a capacitor. The second series circuit includes a rectifying element and a current limiter configured to limit a current passing through the rectifying element, and is connected in parallel with the first series circuit such that the direction pointing from the anode to the cathode of the rectifying element is opposite to the direction pointing from the anode to the cathode of the laser diode. The capacitor is configured to be charged when the switching element is off and to form a closed circuit with the switching element and the first and second series circuits when the switching element is on.

Abstract: A gate drive circuit, which drives a gate of a first transistor, includes a first switch on a high potential side and a second switch on a low potential side connected in series at a second connection node between a high potential end and a low potential end of a series connection structure, constituted of a first voltage source and a second voltage source connected in series at a first connection node; and a third switch and an inductor connected in series between the first connection node and the second connection node. The gate of the first transistor can be electrically connected to the second connection node.

Abstract: A switching power supply circuit (100XA) includes switching elements (SW31 and SW41), a detector (310) configured to detect a physical quantity (Tout) related to the output power of the switching power supply circuit, and a variable controller (42) configured to variably control the gate driving voltages (G3 and G4) for the switching elements based on the result (Idet) of detection by the detector.

Abstract: A semiconductor device includes a conductive member including first, second and third conductors mutually spaced, a first semiconductor element having a first obverse surface provided with a first drain electrode, a first source electrode and a first gate electrode, and a second semiconductor element having a second obverse surface provided with a second drain electrode, a second source electrode and a second gate electrode. The first conductor is electrically connected to the first source electrode and the second drain electrode. The second conductor is electrically connected to the second source electrode. As viewed in a first direction crossing the first obverse surface, the second conductor is adjacent to the first conductor in a second direction crossing the first direction. The third conductor is electrically connected to the first drain electrode and is adjacent to the first conductor and the second conductor as viewed in the first direction.

Abstract: A semiconductor light-emitting device includes: a board including a front surface, a back surface facing an opposite side of the front surface, a first wiring pattern formed on the front surface, and a second wiring pattern formed on the side of the back surface with respect to the first wiring pattern; and a light-emitting element, a switching element, and a capacitor, which are electrically connected to one another by both the first wiring pattern and the second wiring pattern. Among the light-emitting element, the switching element, and the capacitor, a first predetermined element and a second predetermined element are arranged in a first direction and the second predetermined element and a third predetermined element are arranged in a second direction. The second wiring pattern forms a second current path opposite to a direction of a first current path. The second current path overlaps the first current path.

Abstract: A negative voltage generation circuit 200 includes a first DC voltage source 201 having a positive terminal connected to a first node N1 (Vin), a first diode 202 having a cathode connected to a negative terminal of the first DC voltage source 201 and an anode connected to an output terminal of a first negative voltage VC1 (fourth node N4), and a first capacitor 204 having a first terminal connected to an output terminal of the first negative voltage VC1 and a second terminal connected to a second node N2 (Vs_high), so as to supply the first negative voltage VC1 to a first driver 20 that performs switching control of a first NMOSFET 11 (first switch element) connected between the first node N1 (Vin) and the second node N2 (Vs_high).

Abstract: A semiconductor light emitting device includes a substrate, a common conductive portion formed on the substrate, a semiconductor light emitting element mounted on the common conductive portion, and an electronic component mounted on the common conductive portion and electrically connected to the semiconductor light emitting element by the common conductive portion. This structure shortens the conductive path between the semiconductor light emitting element and the electronic component, thereby reducing capacitance caused by the conductive path between the semiconductor light emitting element and the electronic component. Thus, while reducing parasitic capacitance, the semiconductor light emitting element and the electronic component are electrically connected.

Abstract: A ripple injection circuit equipped with: a capacitor that passes a frequency component of an input voltage or a frequency component of an output voltage and that generates a first ripple voltage having a first ripple component; and an integration circuit that integrates a comparison result signal and that generates a second ripple voltage having a second ripple component. The first ripple component and the second ripple component are added to a feedback voltage.

Abstract: A gate drive circuit, which drives a gate of a first transistor, includes a first switch on a high potential side and a second switch on a low potential side connected in series at a second connection node between a high potential end and a low potential end of a series connection structure, constituted of a first voltage source and a second voltage source connected in series at a first connection node; and a third switch and an inductor connected in series between the first connection node and the second connection node. The gate of the first transistor can be electrically connected to the second connection node.

Abstract: A gate drive circuit, which drives a gate of a first transistor, includes a first switch on a high potential side and a second switch on a low potential side connected in series at a second connection node between a high potential end and a low potential end of a series connection structure, constituted of a first voltage source and a second voltage source connected in series at a first connection node; and a third switch and an inductor connected in series between the first connection node and the second connection node.

Abstract: The alternating-current power supply device 1 has: an alternating-current generation bridge 10 for obtaining an alternating-current output; PWM control bridges 20, 30, each including two switch components; and a coupling reactor 40 connected to the PWM control bridges 20, 30. The coupling reactor 40 includes: a core 43; and windings 41, 42 which are connected at one end to respective output ends of the PWM control bridges 20, 30 while being coupled with each other via the core 43. The windings 41, 42 are respectively wound in such directions that magnetic fluxes generated in the core 43 cancel each other out.

Abstract: A negative voltage generation circuit 200 includes a first DC voltage source 201 having a positive terminal connected to a first node N1 (Vin), a first diode 202 having a cathode connected to a negative terminal of the first DC voltage source 201 and an anode connected to an output terminal of a first negative voltage VC1 (fourth node N4), and a first capacitor 204 having a first terminal connected to an output terminal of the first negative voltage VC1 and a second terminal connected to a second node N2 (Vs_high), so as to supply the first negative voltage VC1 to a first driver 20 that performs switching control of a first NMOSFET 11 (first switch element) connected between the first node N1 (Vin) and the second node N2 (Vs_high).

Abstract: A gate drive circuit, which drives a gate of a first transistor, includes a first switch on a high potential side and a second switch on a low potential side connected in series at a second connection node between a high potential end and a low potential end of a series connection structure, constituted of a first voltage source and a second voltage source connected in series at a first connection node; and a third switch and an inductor connected in series between the first connection node and the second connection node. The gate of the first transistor can be electrically connected to the second connection node.

Abstract: The power circuit includes: a main substrate; a first electrode pattern disposed on the main substrate and connected to a positive-side power terminal P; a second electrode pattern disposed on a main substrate and connected to a negative-side power terminal N; a third electrode pattern disposed on the main substrate and connected to an output terminal O; a first MISFET Q1 of which a first drain is disposed on the first electrode pattern; a second MISFET Q4 of which a second drain is disposed on the third electrode pattern; a first control circuit (DG1) connected between a first gate G1 and a first source S1 of the first MISFET, and configured to control a current path conducted from the first source towards the first gate.

Abstract: A ripple injection circuit equipped with: a capacitor that passes a frequency component of an input voltage or a frequency component of an output voltage and that generates a first ripple voltage having a first ripple component; and an integration circuit that integrates a comparison result signal and that generates a second ripple voltage having a second ripple component. The first ripple component and the second ripple component are added to a feedback voltage.

Abstract: The power circuit includes: a main substrate; a first electrode pattern disposed on the main substrate and connected to a positive-side power terminal P; a second electrode pattern disposed on a main substrate and connected to a negative-side power terminal N; a third electrode pattern disposed on the main substrate and connected to an output terminal O; a first MISFET Q1 of which a first drain is disposed on the first electrode pattern; a second MISFET Q4 of which a second drain is disposed on the third electrode pattern; a first control circuit (DG1) connected between a first gate G1 and a first source S1 of the first MISFET, and configured to control a current path conducted from the first source towards the first gate.

Abstract: The power circuit includes: a main substrate; a first electrode pattern disposed on the main substrate and connected to a positive-side power terminal P; a second electrode pattern disposed on a main substrate and connected to a negative-side power terminal N; a third electrode pattern disposed on the main substrate and connected to an output terminal O; a first MISFET Q1 of which a first drain is disposed on the first electrode pattern; a second MISFET Q4 of which a second drain is disposed on the third electrode pattern; a first control circuit (DG1) connected between a first gate G1 and a first source S1 of the first MISFET, and configured to control a current path conducted from the first source towards the first gate.