Abstract: An interconnect substrate includes an insulating resin layer having a first surface and a second surface opposite the first surface, a redistribution layer provided on the first surface of the insulating resin layer, a first connection terminal exposed at the second surface of the insulating resin layer, and a conductive via provided in the insulating resin layer to electrically connect the redistribution layer and the first connection terminal, wherein the insulating resin layer includes a first resin layer constituting the second surface and containing a first filler, a second resin layer provided on the first resin layer, and a third resin layer provided on the second resin layer, the third resin layer containing a second filler and constituting the first surface, and wherein an average particle diameter of the first filler is greater than an average particle diameter of the second filler.

Abstract: A multi-stage helical gear manufacturing apparatus includes a first mold member, a second mold member, a large gear rotation core, a sleeve pin, a small gear rotation insert, and an insert pin. The second mold member moves the insert pin and the small gear rotation insert after the insert pin is caused to retreat in relation to the small gear rotation insert at the time of mold opening. The first mold member prohibits rotation of the large gear rotation core at the time of mold clamping, permits rotation of the large gear rotation core when the insert pin and the small gear rotation insert of the second mold member are moved at the time of mold opening, and causes the sleeve pin to advance toward the second mold member in relation to the plastic after the insert pin and the small gear rotation insert are separated from the plastic.

Abstract: A wiring board includes: an insulating layer; and a connection terminal formed on the insulating layer. The connection terminal includes a first metal layer laminated on the insulating layer, a second metal layer laminated on the first metal layer, a metal pad laminated on the second metal layer, and a surface treatment layer that covers an upper surface and a side surface of the pad and that is in contact with the upper surface of the insulating layer. An end portion of the second metal layer is in contact with the surface treatment layer, and an end portion of the first metal layer is positioned closer to a center side of the pad than the end portion of the second metal layer is to form a gap between the end portion of the first metal layer and the surface treatment layer.

Abstract: An interconnect substrate includes an insulating resin layer having a first surface and a second surface opposite the first surface, a redistribution layer provided on the first surface of the insulating resin layer, a first connection terminal exposed at the second surface of the insulating resin layer, and a conductive via provided in the insulating resin layer to electrically connect the redistribution layer and the first connection terminal, wherein the insulating resin layer includes a first resin layer constituting the second surface and containing a first filler, a second resin layer provided on the first resin layer, and a third resin layer provided on the second resin layer, the third resin layer containing a second filler and constituting the first surface, and wherein an average particle diameter of the first filler is greater than an average particle diameter of the second filler.

Abstract: A wiring board includes: an insulating layer; and a connection terminal formed on the insulating layer. The connection terminal includes a first metal layer laminated on the insulating layer, a second metal layer laminated on the first metal layer, a metal pad laminated on the second metal layer, and a surface treatment layer that covers an upper surface and a side surface of the pad and that is in contact with the upper surface of the insulating layer. An end portion of the second metal layer is in contact with the surface treatment layer, and an end portion of the first metal layer is positioned closer to a center side of the pad than the end portion of the second metal layer is to form a gap between the end portion of the first metal layer and the surface treatment layer.

Abstract: A wiring substrate includes a first wiring structure and a second wiring structure having a higher wiring density. The second wiring structure includes a wiring layer formed on a first insulation layer of the first wiring structure. The wiring layer includes a first wiring pattern, the upper surface of which includes smooth and rough surfaces. A protective film, formed from a conductive material having a higher migration resistance than the wiring layer, covers only the smooth surface and includes a smooth upper surface. A second insulation layer stacked on the first insulation layer covers the wiring layer and the protective film. The smooth surface is continuous with and downwardly recessed from the smooth surface to expose a peripheral portion of the protective film. The second insulation layer covers upper, lower, and side surfaces of the peripheral portion.

Abstract: A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.

Abstract: A wiring substrate includes a first wiring structure and a second wiring structure having a higher wiring density. The second wiring structure includes a wiring layer formed on a first insulation layer of the first wiring structure. The wiring layer includes a first wiring pattern, the upper surface of which includes smooth and rough surfaces. A protective film, formed from a conductive material having a higher migration resistance than the wiring layer, covers only the smooth surface and includes a smooth upper surface. A second insulation layer stacked on the first insulation layer covers the wiring layer and the protective film. The smooth surface is continuous with and downwardly recessed from the smooth surface to expose a peripheral portion of the protective film. The second insulation layer covers upper, lower, and side surfaces of the peripheral portion.

Abstract: A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.

Abstract: A wiring substrate includes a wiring layer on a projection of an insulating layer. The wiring layer includes a first metal layer on an end face of the projection with a peripheral portion of the end face exposed, a second metal layer that is on the first metal layer and wider than the end face, and a third metal layer. The second metal layer includes first and second opposite surfaces with the second surface on the first metal layer with a peripheral portion thereof exposed. The third metal layer covers side surfaces of the first metal layer, and the first surface, the peripheral portion of the second surface, and side surfaces of the second metal layer, and fills in a region where the end face and the peripheral portion of the second surface face each other. The materials of the second and third metal layers are different.

Abstract: A method of manufacturing a wiring substrate, includes forming a laminated body in which a nickel copper alloy layer is formed via an insulating resin layer, on a first wiring layer, forming a via hole reaching the first wiring layer in the nickel copper alloy layer and the insulating resin layer, applying a desmear process to an inside of the via hole, forming a seed layer on the nickel copper alloy layer and an inner surface of the via hole, forming a plating resist in which an opening portion is provided on a part containing the via hole, forming a metal plating layer in the opening portion in the plating resist by an electroplating, removing the plating resist, and forming a second wiring layer by etching the seed layer and the nickel copper alloy layer while using the metal plating layer as a mask.

Abstract: A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.

Abstract: A wiring board includes a core substrate including an insulation base member; linear conductors configured to pierce from a first surface of the insulation base member to a second surface of the insulation base member; a ground wiring group including a first ground wiring formed on the first surface of the core substrate, and a belt-shaped second ground wiring formed on the second surface of the core substrate and electrically connected to the first ground wiring by way of a part of the linear conductors; and an electric power supply wiring group including a first electric power supply wiring formed on the first surface, and a second electric power supply wiring formed on the second surface and electrically connected to the first electric power supply wiring by way of a part of the plural linear conductors.

Abstract: A method of manufacturing a wiring substrate, includes forming a laminated body in which a nickel copper alloy layer is formed via an insulating resin layer, on a first wiring layer, forming a via hole reaching the first wiring layer in the nickel copper alloy layer and the insulating resin layer, applying a desmear process to an inside of the via hole, forming a seed layer on the nickel copper alloy layer and an inner surface of the via hole, forming a plating resist in which an opening portion is provided on a part containing the via hole, forming a metal plating layer in the opening portion in the plating resist by an electroplating, removing the plating resist, and forming a second wiring layer by etching the seed layer and the nickel copper alloy layer while using the metal plating layer as a mask.

Abstract: In a semiconductor device, a substrate includes a plurality of line conductors which penetrate the substrate from a top surface to a bottom surface of the substrate. A semiconductor chip is secured in a hole of the substrate. A first insulating layer is formed on the top surfaces of the substrate and the semiconductor chip. A first wiring layer is formed on the first insulating layer and electrically connected via through holes of the first insulating layer to the semiconductor chip and some line conductors exposed to one of the through holes. A second insulating layer is formed on the bottom surfaces of the substrate and the semiconductor chip. A second wiring layer is formed on the second insulating layer and electrically connected via a through hole of the second insulating layer to some line conductors exposed to the through hole.

Abstract: A wiring board includes a core substrate including an insulation base member; linear conductors configured to pierce from a first surface of the insulation base member to a second surface of the insulation base member; a ground wiring group including a first ground wiring formed on the first surface of the core substrate, and a belt-shaped second ground wiring formed on the second surface of the core substrate and electrically connected to the first ground wiring by way of a part of the linear conductors; and an electric power supply wiring group including a first electric power supply wiring formed on the first surface, and a second electric power supply wiring formed on the second surface and electrically connected to the first electric power supply wiring by way of a part of the plural linear conductors.

Abstract: A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.

Abstract: In a semiconductor device, a substrate includes a plurality of line conductors which penetrate the substrate from a top surface to a bottom surface of the substrate. A semiconductor chip is secured in a hole of the substrate. A first insulating layer is formed on the top surfaces of the substrate and the semiconductor chip. A first wiring layer is formed on the first insulating layer and electrically connected via through holes of the first insulating layer to the semiconductor chip and some line conductors exposed to one of the through holes. A second insulating layer is formed on the bottom surfaces of the substrate and the semiconductor chip. A second wiring layer is formed on the second insulating layer and electrically connected via a through hole of the second insulating layer to some line conductors exposed to the through hole.