Patents by Inventor Yutaka Hori
Yutaka Hori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160243855Abstract: A printer is provided which includes an output part, a carriage, a cover, and a movable part. The output part outputs a medium, the cover covers the output part, the carriage reciprocates in a predetermined direction, and the movable part has a contact point with which the carriage comes into contact and includes a holding part that holds the cover in a closed state such that the movable part opens the cover by pivoting when the carriage comes into contact with the contact point.Type: ApplicationFiled: May 3, 2016Publication date: August 25, 2016Inventors: Yutaka HORI, Daisuke OGAWA
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Patent number: 9352924Abstract: A printer is provided which includes an output part, a carriage, a cover, and a movable part. The output part outputs a medium, the cover openably and closably covers the output part, the carriage reciprocates in a predetermined direction, and the movable part has a contact point with which the carriage comes into contact and includes a holding part that holds the cover in a closed state such that the movable part opens the cover by pivoting when the carriage comes into contact with the contact point.Type: GrantFiled: January 30, 2015Date of Patent: May 31, 2016Assignee: FUNAI ELECTRIC CO., LTD.Inventors: Yutaka Hori, Daisuke Ogawa
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Publication number: 20160016742Abstract: This paper sheet conveyance device (100) includes an upstream-side roller pair (3) and a downstream-side roller pair (4) as well as an upstream-side guide member (8) and a downstream-side guide member (9). The upstream-side guide member is arranged to traverse a tangent (11) to the upstream-side roller pair extending along a conveyance direction, while the downstream-side guide member is arranged to traverse a tangent (12) to the downstream-side roller pair extending along the conveyance direction.Type: ApplicationFiled: September 30, 2015Publication date: January 21, 2016Inventors: Masaaki TAKAGI, Yutaka HORI, Shouichi FUKUYAMA
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Patent number: 9106575Abstract: An integrated circuit with two operating modes is described. During a first operating mode, a de-multiplexer selectively couples information received via a common set of pads to first control logic, which decodes the information based on a first serial-interface technique. Moreover, during a second operating mode, the de-multiplexer selectively couples a first portion of the information to the first control logic and a second portion of the information to second control logic, which decodes the second portion based on a second serial-interface technique. By facilitating time-domain de-multiplexing of two similar serial-interface techniques, the integrated circuit can overcome the constraints imposed by a low or limited pin count.Type: GrantFiled: January 31, 2013Date of Patent: August 11, 2015Assignee: APPLE INC.Inventors: Thomas J. Wilson, Yutaka Hori
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Publication number: 20150217962Abstract: A printer including: an output part for outputting a medium; a carriage that reciprocates in a predetermined direction; a cover that is openably and closably disposed so as to cover the output part; and a movable part that brings the cover to an open state when the carriage comes in contact with a point of contact of the movable part and does work on the cover at a working point.Type: ApplicationFiled: January 30, 2015Publication date: August 6, 2015Inventors: Yutaka HORI, Daisuke OGAWA
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Publication number: 20150210093Abstract: A printer including: a feed portion into which a medium is inserted; and a second feed tray pivoting between a first position and a second position. In the printer, both when the second feed tray is at the first position and when the second feed tray is at the second position, a feed opening of the feed portion is exposed from a direction in which the medium is inserted.Type: ApplicationFiled: January 23, 2015Publication date: July 30, 2015Inventors: Daisuke OGAWA, Yutaka HORI
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Publication number: 20140211817Abstract: An integrated circuit with two operating modes is described. During a first operating mode, a de-multiplexer selectively couples information received via a common set of pads to first control logic, which decodes the information based on a first serial-interface technique. Moreover, during a second operating mode, the de-multiplexer selectively couples a first portion of the information to the first control logic and a second portion of the information to second control logic, which decodes the second portion based on a second serial-interface technique. By facilitating time-domain de-multiplexing of two similar serial-interface techniques, the integrated circuit can overcome the constraints imposed by a low or limited pin count.Type: ApplicationFiled: January 31, 2013Publication date: July 31, 2014Applicant: APPLE INC.Inventors: Thomas J. Wilson, Yutaka Hori
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Patent number: 8510481Abstract: A method and system for accessing a computer system memory without processor intervention is disclosed. In one embodiment, the method includes initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the second device including a second processor, a second memory and a second communication interface. The predetermined communication protocol enables an access operation to be performed on the first or second memory without intervention by the first or second processor. In one embodiment, the predetermined communication protocol utilizes a plurality of predefined packet types which are identified by a packet header decoder.Type: GrantFiled: January 3, 2007Date of Patent: August 13, 2013Assignee: Apple Inc.Inventors: Thomas James Wilson, Yutaka Hori
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Patent number: 8510485Abstract: This relates to interface circuits for synchronous protocols which do not rely on a dedicated high frequency clock signal. Instead, the interface circuit may rely on a clock signal received over the interface from another device in order to transfer data between the interface and an internal buffer. Furthermore, the interface circuits can rely on a clock signal provided by a bus for a device the interface circuit is located in to transfer data between the internal buffer and the bus. The internal buffer can be, but is not limited to a FIFO. Alternatively, it can be a stack or another data structure. The internal buffer can be configured so that each of its multiple of cells is a shift register. Thus, a preparatory step of moving a byte of data from the buffer to a separate shift register can be avoided.Type: GrantFiled: November 29, 2007Date of Patent: August 13, 2013Assignee: Apple Inc.Inventors: Thomas James Wilson, Yutaka Hori
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Patent number: 8363021Abstract: Compensating for the frequency dependence of sense signal preprocessing in preprocessing channel circuitry is provided. The frequency dependence of the preprocessing channels can be modified to change a frequency dependent channel into a frequency independent channel, to change a frequency independent channel into a frequency dependent channel, or to change the frequency dependency characteristics of a frequency dependent channel. Modification of frequency dependency may be accomplished, for example, by modifying certain parameters of a preprocessing channel's components, which can include components for amplifying, filtering, phase adjusting, demodulating, decrypting, for example. A pipelined process may be used to modify the frequency dependency of multiple channels. Compensating for frequency dependencies can have multiple advantages, such as reduction of memory requirements and DIE size.Type: GrantFiled: September 11, 2009Date of Patent: January 29, 2013Assignee: Apple Inc.Inventors: Christoph Horst Krah, Yutaka Hori
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Publication number: 20110063229Abstract: Compensating for the frequency dependence of sense signal preprocessing in preprocessing channel circuitry is provided. The frequency dependence of the preprocessing channels can be modified to change a frequency dependent channel into a frequency independent channel, to change a frequency independent channel into a frequency dependent channel, or to change the frequency dependency characteristics of a frequency dependent channel. Modification of frequency dependency may be accomplished, for example, by modifying certain parameters of a preprocessing channel's components, which can include components for amplifying, filtering, phase adjusting, demodulating, decrypting, for example. A pipelined process may be used to modify the frequency dependency of multiple channels. Compensating for frequency dependencies can have multiple advantages, such as reduction of memory requirements and DIE size.Type: ApplicationFiled: September 11, 2009Publication date: March 17, 2011Inventors: Christoph Horst KRAH, Yutaka Hori
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Patent number: 7848825Abstract: A computer system having two or more controllers operating in a Master/Slave configuration is disclosed. In one embodiment, the computer system includes: a sensor panel having a first portion for generating a first set of sense signals indicative of a touch or no-touch condition on the first portion, and a second portion for generating a second set of sense signals indicative of a touch or no-touch condition on the second portion; a first device for receiving and processing the first set of output signals from the first portion of the panel; and a second device for receiving and processing the second set of output signals from the second portion of the panel, wherein the first and second devices operate cooperatively in a Master/Slave configuration.Type: GrantFiled: January 3, 2007Date of Patent: December 7, 2010Assignee: Apple Inc.Inventors: Thomas James Wilson, Minh-Dieu Thi Vu, Yutaka Hori
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Publication number: 20090138673Abstract: This is directed to allowing a processor of a device to use ordinary internal memory read and write instructions that read and write to external memory. Thus, the complexities associated with the existing methods of accessing external memory can be avoided. More specifically, an address space portion that does not correspond to any existing internal memory can be defined as associated with an external memory. When access to the external memory is required, the processor can simply issue ordinary internal memory read/write instructions that are addressed to the above mentioned address space. An interface controller can receive the read and write instructions and communicate with an external memory in order to execute them. The controller can then send a result back to the processor (if required) in the format that would be expected from an internal memory access operation.Type: ApplicationFiled: November 28, 2007Publication date: May 28, 2009Applicant: Apple Inc.Inventors: Thomas James WILSON, Yutaka Hori
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Publication number: 20090063736Abstract: This relates to interface circuits for synchronous protocols which do not rely on a dedicated high frequency clock signal. Instead, the interface circuit may rely on a clock signal received over the interface from another device in order to transfer data between the interface and an internal buffer. Furthermore, the interface circuits can rely on a clock signal provided by a bus for a device the interface circuit is located in to transfer data between the internal buffer and the bus. The internal buffer can be, but is not limited to a FIFO. Alternatively, it can be a stack or another data structure. The internal buffer can be configured so that each of its multiple of cells is a shift register. Thus, a preparatory step of moving a byte of data from the buffer to a separate shift register can be avoided.Type: ApplicationFiled: November 29, 2007Publication date: March 5, 2009Applicant: Apple Inc.Inventors: Thomas James Wilson, Yutaka Hori
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Publication number: 20080158177Abstract: A computer system having two or more controllers operating in a Master/Slave configuration is disclosed. In one embodiment, the computer system includes: a sensor panel having a first portion for generating a first set of sense signals indicative of a touch or no-touch condition on the first portion, and a second portion for generating a second set of sense signals indicative of a touch or no-touch condition on the second portion; a first device for receiving and processing the first set of output signals from the first portion of the panel; and a second device for receiving and processing the second set of output signals from the second portion of the panel, wherein the first and second devices operate cooperatively in a Master/Slave configuration.Type: ApplicationFiled: January 3, 2007Publication date: July 3, 2008Applicant: Apple Inc.Inventors: Thomas James Wilson, Minh-Dieu Thi Vu, Yutaka Hori
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Publication number: 20080162835Abstract: A method and system for accessing a computer system memory without processor intervention is disclosed. In one embodiment, the method includes initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the second device including a second processor, a second memory and a second communication interface. The predetermined communication protocol enables an access operation to be performed on the first or second memory without intervention by the first or second processor. In one embodiment, the predetermined communication protocol utilizes a plurality of predefined packet types which are identified by a packet header decoder.Type: ApplicationFiled: January 3, 2007Publication date: July 3, 2008Applicant: Apple Inc.Inventors: Thomas James Wilson, Yutaka Hori
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Patent number: 5296571Abstract: An aminotriazine prepolymer is provided which gives resin with toughness and favorable transparency without use of filler agent by mixing 2-hydroxyethyl methacrylate (781 g: 6 mole), melamine (126 g: 1 mole), 95% by weight of p-formaldehyde (189 g: 6 mole as formaldehyde), p-toluene sulfonate (3.0 g), hydroquinone monomethyl ether (0.2 g) in a two liter separation flask with a stirring device, a thermometer, an air-inlet tube, and a cooling tube for removing the distillate. The mixture is heated while air is blown in. After the melamine and paraformaldehyde are dissolved in 2-hydroxyethyl methacrylate, at the temperature of 80.degree. C. to 100.degree. C., the reaction is continued in the temperature range of 105.degree. C. to 115.degree. C. until the quantity of extracted water is 108 g (6 mole). The triazine ring structure-containing methacrylate prepolymer thus obtained has a viscosity of 2,000 cP at 20.degree. C., a bromine number of 92.1 (Br g/100 g), and a Gardner color degree of not greater than 5.Type: GrantFiled: October 30, 1992Date of Patent: March 22, 1994Assignee: Aica Kogyo Co., Ltd.Inventors: Yutaka Hori, Takashi Kamiya, Takayuki Mano, Ryuzo Asami
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Patent number: 5290893Abstract: An aminotriazine prepolymer is provided which gives resin with toughness and favorable trans-Darency without use of filler agent by mixing 2-hydroxyethyl methacrylate (781 g: 6 mole), melamine (126 g: 1 mole), 95% by weight of p-formaldehyde (189 g: 6 mole as formaldehyde), p-toluene sulfonate (3.0 g), hydroquinone monomethyl ether (0.2 g) in a two liter separation flask with a stirring device, a thermometer, an air-inlet tube, and a cooling tube for removing the distillate. The mixture is heated while air is blown in. After the melamine and paraformaldehyde are dissolved in 2-hydroxyethyl methacrylate, at the temperature of 80.degree. C. to 100.degree. C., the reaction is continued in the temperature range of 105.degree. C. to 115.degree. C. until the quantity of extracted water is 108 g (6 mole). The triazine ring structure-containing methacrylate prepolymer thus obtained has a viscosity of 2,000 cP at 20.degree. C., a bromine number of 92.1 (Br g/100 g), and a Gardner color degree of not greater than 5.Type: GrantFiled: May 18, 1992Date of Patent: March 1, 1994Assignee: Aica Kogyo Co., Ltd.Inventors: Yutaka Hori, Takashi Kamiya, Takayuki Mano, Ryuzo Asami
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Patent number: 4830633Abstract: A depilation method is disclosed, comprising coating a depilatory agent containing an aqueous solution or emulsion of a polymer compound having a film forming ability and a depilatory medicine, drying the resulting coating to form a film and peeling off the film. This method permits to remove hair without causing any pain and producing any unpleasant odor due to the decomposition of hair.Type: GrantFiled: June 22, 1987Date of Patent: May 16, 1989Assignee: Nitto Denko CorporationInventors: Yutaka Hori, Katsuo Matsumoto, Katsuhiro Yamamoto, Toshimitsu Sasaki, Masayuki Shida
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Patent number: 4510181Abstract: A method for coating a metal surface by forming a corrosion-protective layer on the metal surface or a defective area of a corrosion-protective layer formed on the metal surface, which comprises using a coating material selected from the group consisting of a tape-like, sheet-like and chip-like polymerizable coating material comprising a vinyl monomer and/or a vinyl group-containing oligomer and a liquid material comprising a vinyl monomer and/or a vinyl group-containing oligomer, wherein either the coating material or the liquid material contains a polymerization initiator and the material not containing the polymerization initiator contains a polymerization accelerator, and polymerizing the vinyl monomer and/or the vinyl monomer-containing oligomer in the state such that the metal surface or the defective area is covered with the coating material by interposing the liquid material therebetween, to form the corrosion-protective layer.Type: GrantFiled: December 28, 1983Date of Patent: April 9, 1985Assignee: Nitto Electric Industrial Co., Ltd.Inventors: Toshimitsu Okuno, Yutaka Hori, Makoto Sunakawa, Sadayuki Inagaki