Patents by Inventor Yuuichi Hasegawa
Yuuichi Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9497867Abstract: A thin display device includes a display unit and an outer casing accommodating a device component constituting a display unit together with the display unit. Upper corner regions and lower corner regions of the outer casing are held by upper corner shock-absorbing members and lower corner shock-absorbing members disposed separately at upper corners and lower corners of a packing box when the thin display device is accommodated in the packing box. The device component is accommodated in a peripheral portion in the outer casing. A center of gravity of the device component is positioned within a region of the outer casing where the upper corner shock-absorbing member holds the outer casing and a region of the outer casing where the lower shock-absorbing member holds the outer casing.Type: GrantFiled: July 5, 2013Date of Patent: November 15, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Motonari Ogura, Yuuichi Hasegawa, Tadahiro Kugimaru
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Patent number: 9134558Abstract: A flat display device includes a display unit and an outer casing accommodating the display unit. Upper corner regions and lower corner regions of the outer casing are held by upper corner shock-absorbing members and lower corner shock-absorbing members disposed separately at upper corners and lower corners of a packing box when the flat display device is accommodated in the packing box. The outer casing includes a front cabinet disposed on a side of a display surface of the display unit and a back cabinet covering a rear surface of the display unit. The back cabinet is attached to the front cabinet by screw fastening portions at a peripheral portion of the back cabinet. In the upper and lower corner regions of the outer casing, the screw fastening portions of the back cabinet are positioned within regions held by the shock-absorbing members.Type: GrantFiled: July 5, 2013Date of Patent: September 15, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Motonari Ogura, Yuuichi Hasegawa, Tadahiro Kugimaru
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Patent number: 8837094Abstract: A DC/AC inverter substrate includes a voltage abnormality detector circuit. All of a high voltage side detection sensor, a low voltage side detection sensor, and a high-voltage and low-voltage detection sensor in the voltage abnormality detector circuit are disposed without being electrically connected to a secondary side of a transformer or to a connection point. Those detection sensors are not damaged since overvoltage is not applied to the voltage abnormality detector circuit when abnormal discharge occurs because the detection sensors are not electrically connected.Type: GrantFiled: March 16, 2011Date of Patent: September 16, 2014Assignee: NLT Technologies, Ltd.Inventor: Yuuichi Hasegawa
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Publication number: 20130294043Abstract: A thin display device includes a display unit and an outer casing accommodating a device component constituting a display unit together with the display unit. Upper corner regions and lower corner regions of the outer casing are held by upper corner shock-absorbing members and lower corner shock-absorbing members disposed separately at upper corners and lower corners of a packing box when the thin display device is accommodated in the packing box. The device component is accommodated in a peripheral portion in the outer casing. A center of gravity of the device component is positioned within a region of the outer casing where the upper corner shock-absorbing member holds the outer casing and a region of the outer casing where the lower shock-absorbing member holds the outer casing.Type: ApplicationFiled: July 5, 2013Publication date: November 7, 2013Inventors: Motonari OGURA, Yuuichi HASEGAWA, Tadahiro KUGIMARU
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Publication number: 20130293805Abstract: A thin flat display includes a display unit and an outer casing accommodating the display unit. Upper corner regions and lower corner regions of the outer casing are held by upper corner shock-absorbing members and lower corner shock-absorbing members disposed separately at upper corners and lower corners of a packing box when the flat display device is accommodated in the packing box. The outer casing includes a front cabinet disposed on a side of a display surface of the display unit and a back cabinet covering a rear surface of the display unit. The back cabinet is attached to the front cabinet by screw fastening portions at a peripheral portion of the back cabinet. In the upper and lower corner regions of the outer casing, the screw fastening portions of the back cabinet are positioned within regions held by the shock-absorbing members. Damages caused by a mechanical impact suffered during transportation can be prevented.Type: ApplicationFiled: July 5, 2013Publication date: November 7, 2013Inventors: Motonari OGURA, Yuuichi HASEGAWA, Tadahiro KUGIMARU
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Patent number: 8035941Abstract: A DC/AC inverter substrate includes a voltage abnormality detector circuit. All of a high voltage side detection sensor, a low voltage side detection sensor, and a high-voltage and low-voltage detection sensor in the voltage abnormality detector circuit are disposed without being electrically connected to a secondary side of a transformer or to a connection point. Those detection sensors are not damaged since overvoltage is not applied to the voltage abnormality detector circuit when abnormal discharge occurs because the detection sensors are not electrically connected.Type: GrantFiled: August 29, 2008Date of Patent: October 11, 2011Assignee: NEC LCD Technologies, Ltd.Inventor: Yuuichi Hasegawa
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Publication number: 20110163669Abstract: A DC/AC inverter substrate includes a voltage abnormality detector circuit. All of a high voltage side detection sensor, a low voltage side detection sensor, and a high-voltage and low-voltage detection sensor in the voltage abnormality detector circuit are disposed without being electrically connected to a secondary side of a transformer or to a connection point. Those detection sensors are not damaged since overvoltage is not applied to the voltage abnormality detector circuit when abnormal discharge occurs because the detection sensors are not electrically connected.Type: ApplicationFiled: March 16, 2011Publication date: July 7, 2011Applicant: NEC LCD TECHNOLOGIES, LTD.Inventor: Yuuichi HASEGAWA
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Publication number: 20090185105Abstract: A DC/AC inverter substrate includes a voltage abnormality detector circuit. All of a high voltage side detection sensor, a low voltage side detection sensor, and a high-voltage and low-voltage detection sensor in the voltage abnormality detector circuit are disposed without being electrically connected to a secondary side of a transformer or to a connection point. Those detection sensors are not damaged since overvoltage is not applied to the voltage abnormality detector circuit when abnormal discharge occurs because the detection sensors are not electrically connected.Type: ApplicationFiled: August 29, 2008Publication date: July 23, 2009Applicant: NEC LCD TECHNOLOGIES, LTD.Inventor: Yuuichi HASEGAWA
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Patent number: 7336094Abstract: A plurality of individually retractable racks on which a single module is mounted on each rack is disposed on the upper and middle tiers of a portable carriage main body. Provided to the lower tier of the carriage main body are a operating panel for setting work content and conditions; a signal source for selectively outputting a circuit adjustment signal, an aging testing signal, and a display inspection signal; a power supply for circuit adjustment, a power supply for aging testing, and a power supply for display inspection; and an output unit for selecting an operation from circuit adjustment, aging testing, and display inspection on the basis of the work content and work conditions that have been input in the operating panel, and feeding the power and signals for the selected operation to the modules.Type: GrantFiled: March 29, 2006Date of Patent: February 26, 2008Assignee: NEC LCD Technologies, Ltd.Inventor: Yuuichi Hasegawa
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Publication number: 20070229109Abstract: A plurality of individually retractable racks on which a single module is mounted on each rack is disposed on the upper and middle tiers of a portable carriage main body. Provided to the lower tier of the carriage main body are a operating panel for setting work content and conditions; a signal source for selectively outputting a circuit adjustment signal, an aging testing signal, and a display inspection signal; a power supply for circuit adjustment, a power supply for aging testing, and a power supply for display inspection; and an output unit for selecting an operation from circuit adjustment, aging testing, and display inspection on the basis of the work content and work conditions that have been input in the operating panel, and feeding the power and signals for the selected operation to the modules.Type: ApplicationFiled: March 29, 2006Publication date: October 4, 2007Applicant: NEC LCD TECHNOLOGIES, LTD.Inventor: Yuuichi Hasegawa
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Patent number: 6494359Abstract: A thermo-compression bonding apparatus is for thermo-compressing a TCP and a substrate layer to connect electrode terminals. The thermo-compression bonding apparatus has a heating unit 1 for auxiliary heating a laminate which is heated by a compression bonding head whose temperature is kept at a predetermined temperature.Type: GrantFiled: July 20, 2000Date of Patent: December 17, 2002Assignee: NEC CorporationInventor: Yuuichi Hasegawa
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Patent number: 5643811Abstract: A field effect transistor including a gate electrode divided into a plurality of parts in the gate-length direction. The gate electrode makes Schottky-contacts with a semiconductor layer or is formed on the semiconductor layer through a gate insulating film.Type: GrantFiled: June 20, 1995Date of Patent: July 1, 1997Assignee: Fujitsu LimitedInventor: Yuuichi Hasegawa
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Patent number: 5399886Abstract: A field effect semiconductor device which restricts current flow through a drain-gate path, but allows current to easily flow through a gate-source path. A high potential barrier layer is formed on the drain side of an active layer. The potential barrier layer has a wider energy band gap than the active layer. A source electrode and a drain electrode make ohmic contact with the active layer and a gate electrode exists between the source electrode and the drain electrode. The gate electrode is partially formed on the potential barrier layer and makes Schottky contact with the active layer on the source side of the semiconductor device and makes Schottky contact with the potential barrier layer on the drain side of the semiconductor device.Type: GrantFiled: January 26, 1994Date of Patent: March 21, 1995Assignee: Fujitsu LimitedInventor: Yuuichi Hasegawa
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Patent number: 4910157Abstract: A method of producing a compound semiconductor device comprises the steps of: forming a recess portion on a compound semiconductor substrate; forming an ion penetrating mask on the recess portion in such a manner that the surfaces of the compound semiconductor substrate and the ion penetrating mask are level; forming an active layer having a substantially uniform depth is the compound semiconductor by implanting impurity ions into the entire exposed surface and, removing the ion penetrating mask and forming a gate electrode at the recess portion.Type: GrantFiled: August 23, 1989Date of Patent: March 20, 1990Assignee: Fujitsu LimitedInventors: Yuuichi Hasegawa, Hidetake Suzuki