Patents by Inventor Zen-Dar Hsu

Zen-Dar Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9983042
    Abstract: An embodiment of the invention provides a liquid-level sensor to detect liquid-level information of a liquid to be tested in a container. The sensor includes an electrode, a sensing circuit, an amplifier and a controller. The electrode is disposed on the outer surface of the container, comprising a first electrode and a second electrode. The sensing circuit is coupled to a first electrode and a second electrode, and receives a clock signal to generate a first voltage signal and a second voltage signal. The amplifier receives the first voltage signal and the second voltage signal to output an output voltage. The controller acquires liquid-level information of the liquid to be tested according to the output voltage and a voltage-volume table.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: May 29, 2018
    Assignee: Industrial Technology Research Institute
    Inventors: Li-Ren Huang, Zen-Dar Hsu, Cheng-Hsun Lin, Huan-Ke Chiu, Cihun-Siyong Gong, Po-Hsun Tu
  • Publication number: 20170153139
    Abstract: An embodiment of the invention provides a liquid-level sensor to detect liquid-level information of a liquid to be tested in a container. The sensor includes an electrode, a sensing circuit, an amplifier and a controller. The electrode is disposed on the outer surface of the container, comprising a first electrode and a second electrode. The sensing circuit is coupled to a first electrode and a second electrode, and receives a clock signal to generate a first voltage signal and a second voltage signal. The amplifier receives the first voltage signal and the second voltage signal to output an output voltage. The controller acquires liquid-level information of the liquid to be tested according to the output voltage and a voltage-volume table.
    Type: Application
    Filed: December 30, 2015
    Publication date: June 1, 2017
    Inventors: Li-Ren Huang, Zen-Dar Hsu, Cheng-Hsun Lin, Huan-Ke Chiu, Cihun-Siyong Gong, Po-Hsun Tu
  • Patent number: 5799207
    Abstract: A computer system is disclosed which has a master, such as a processor, a memory, and I/O device, a first transfer path, which includes a bus, and a second transfer path, which includes a transfer interconnection. Transfers between the memory and the I/O device are effected via the first path while transfers between the processor and the I/O device are transferred via the second path. The disparate treatment between these two types of transfers reduces the likelihood that the transfer via the second path is delayed and thereby reduces the likelihood that the master is totally blocked from operation.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: August 25, 1998
    Assignee: Industrial Technology Research Institute
    Inventors: Shih-Chieh Wang, Wei-Wen Chang, Zen-Dar Hsu