Abstract: Semiconductor trilayer structures that are doped and strained are provided. Also provided are mechanically flexible transistors, including radiofrequency transistors, incorporating the trilayer structures and methods for fabricating the trilayer structures and transistors. The trilayer structures comprise a first layer of single-crystalline semiconductor material, a second layer of single-crystalline semiconductor material and a third layer of single-crystalline semiconductor material. In the structures, the second layer is in contact with and sandwiched between the first and third layers and the first layer is selectively doped to provide one or more doped regions in the layer.

Abstract: The present invention provides continuous, free-standing metal oxide films and methods for making said films. The methods are able to produce large-area, flexible, thin films having one or more continuous, single-crystalline metal oxide domains. The methods include the steps of forming a surfactant monolayer at the surface of an aqueous solution, wherein the headgroups of the surfactant molecules provide a metal oxide film growth template. When metal ions in the aqueous solution are exposed to the metal oxide film growth template in the presence of hydroxide ions under suitable conditions, a continuous, free-standing metal oxide film can be grown from the film growth template downward into the aqueous solution.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: The present invention provides flexible devices, such as integrated circuits, having a multilevel electronic device structure including two or more electronic components. The electronic components within the structure are electrically connected by an interconnect structure having multiple interconnect levels. In addition to the multilevel electronic device structure, the flexible devices include an elastomeric material disposed around the interconnect levels, including within the spaces between the interconnect levels.

Abstract: The present invention provides continuous, free-standing metal oxide films and methods for making said films. The methods are able to produce large-area, flexible, thin films having one or more continuous, single-crystalline metal oxide domains. The methods include the steps of forming a surfactant monolayer at the surface of an aqueous solution, wherein the headgroups of the surfactant molecules provide a metal oxide film growth template. When metal ions in the aqueous solution are exposed to the metal oxide film growth template in the presence of hydroxide ions under suitable conditions, a continuous, free-standing metal oxide film can be grown from the film growth template downward into the aqueous solution.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: Vertical cavity light emitting sources that utilize patterned membranes as reflectors are provided. The vertical cavity light emitting sources have a stacked structure that includes an active region disposed between an upper reflector and a lower reflector. The active region, upper reflector and lower reflector can be fabricated from single or multi-layered thin films of solid states materials (“membranes”) that can be separately processed and then stacked to form a vertical cavity light emitting source.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: Vertical cavity light emitting sources that utilize patterned membranes as reflectors are provided. The vertical cavity light emitting sources have a stacked structure that includes an active region disposed between an upper reflector and a lower reflector. The active region, upper reflector and lower reflector can be fabricated from single or multi-layered thin films of solid states materials (“membranes”) that can be separately processed and then stacked to form a vertical cavity light emitting source.

Abstract: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

Abstract: This invention provides methods for fabricating high speed TFTs from silicon-on-insulator and bulk single crystal semiconductor substrates, such as Si(100) and Si(110) substrates. The TFTs may be designed to have a maximum frequency of oscillation of 3 GHz, or better.

Abstract: Improved radio frequency gain in a silicon-based bipolar transistor may be provided by adoption of a common-base configuration, preferably together with excess doping of the base to provide extremely low base resistances boosting performance over similar common-emitter designs.

Abstract: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.

Abstract: A common-base amplifier for a bipolar junction transistor or a heterojunction bipolar transistor employs an active current source output biasing to provide for improved power output in a power saturation region providing increased power for a given transistor area such as may be advantageous in mobile radio transmitters or the like.

Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.

Abstract: Vertical cavity light emitting sources that utilize patterned membranes as reflectors are provided. The vertical cavity light emitting sources have a stacked structure that includes an active region disposed between an upper reflector and a lower reflector. The active region, upper reflector and lower reflector can be fabricated from single or multi-layered thin films of solid states materials (“membranes”) that can be separately processed and then stacked to form a vertical cavity light emitting source.

Abstract: The present invention provides high-speed, high-efficiency PIN diodes for use in photodetector and CMOS imagers. The PIN diodes include a layer of intrinsic semiconducting material, such as intrinsic Ge or intrinsic GeSi, disposed between two tunneling barrier layers of silicon oxide. The two tunneling barrier layers are themselves disposed between a layer of n-type silicon and a layer of p-type silicon.

Abstract: A high-power solid-state transistor structure comprised of a plurality of emitter or gate fingers arranged in a uniform or non-uniform manner to provide improved high power performance is disclosed. Each of the fingers is associated with a corresponding one of a plurality of sub-cells. In an exemplary embodiment, the fingers may be arranged in a 1-D or 2-D form having a “hollow-center” layout where one or more elongated emitter fingers or subcells are left out during design or disconnected during manufacture. In another exemplary embodiment, the fingers may be arranged in a 1-D or 2-D form having one or more “arc-shaped” rows that includes one or more elongated emitter fingers or subcells. The structure can be practically implemented and the absolute thermal stability can be maintained for very high power transistors with reduced adverse effects due to random variation in the manufacturing and design process.

Abstract: This invention provides methods for fabricating high speed TFTs from silicon-on-insulator and bulk single crystal semiconductor substrates, such as Si(100) and Si(110) substrates. The TFTs may be designed to have a maximum frequency of oscillation of 3 GHz, or better.