Patents by Inventor Zhi-Cheng Lee

Zhi-Cheng Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8232152
    Abstract: A removing method of a hard mask includes the following steps. A substrate is provided. At least two MOSFETs are formed on the substrate. An isolating structure is formed in the substrate and located between the at least two MOSFETs. Each of the MOSEFTs includes a gate insulating layer, a gate, a spacer and a hard mask on the gate. A protecting structure is formed on the isolating structure and the hard mask is exposed from the protecting structure. The exposed hard mask is removed to expose the gate.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: July 31, 2012
    Assignee: United Microelectronics Corp.
    Inventors: Che-Hua Hsu, Shao-Hua Hsu, Zhi-Cheng Lee, Cheng-Guo Chen, Shin-Chi Chen, Hung-Ling Shih, Hung-Yi Wu, Heng-Ching Huang
  • Publication number: 20120142157
    Abstract: The method of fabricating a semiconductor structure according to the present invention includes planarizing an inter-layer dielectric layer and further a hard mask to remove a portion of hard mask in a thickness direction. The remaining hard mask has a thickness less than the original thickness of the hard mask. The remaining hard mask and the dummy gate are removed to form a recess. After a gate material is filled into the recess, a gate with a relatively accurate height can be obtained.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 7, 2012
    Inventors: Cheng-Guo Chen, Zhi-Cheng Lee, Shao-Hua Hsu, Jung-Tsung Tseng, Chien-Ting Lin, Cheng-Hsien Chou
  • Publication number: 20120088368
    Abstract: A method of selectively removing a patterned hard mask is described. A substrate with a patterned target layer thereon is provided, wherein the patterned target layer includes a first target pattern and at least one second target pattern, and the patterned hard mask includes a first mask pattern on the first target pattern and a second mask pattern on the at least one second target pattern. A first photoresist layer is formed covering the first mask pattern. The sidewall of the at least one second target pattern is covered by a second photoresist layer. The second mask pattern is removed using the first photoresist layer and the second photoresist layer as a mask.
    Type: Application
    Filed: October 8, 2010
    Publication date: April 12, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Che-Hua Hsu, Shao-Hua Hsu, Zhi-Cheng Lee, Cheng-Guo Chen
  • Publication number: 20120070952
    Abstract: A removing method of a hard mask includes the following steps. A substrate is provided. At least two MOSFETs are formed on the substrate. An isolating structure is formed in the substrate and located between the at least two MOSFETs. Each of the MOSEFTs includes a gate insulating layer, a gate, a spacer and a hard mask on the gate. A protecting structure is formed on the isolating structure and the hard mask is exposed from the protecting structure. The exposed hard mask is removed to expose the gate.
    Type: Application
    Filed: September 16, 2010
    Publication date: March 22, 2012
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Che-Hua HSU, Shao- Hua Hsu, Zhi-Cheng Lee, Cheng-Guo Chen, Shin-Chi Chen, Hung-Ling Shih, Hung-Yi Wu, Heng-Ching Huang
  • Publication number: 20110294274
    Abstract: A method of forming metal gate transistor includes providing a substrate; forming a gate dielectric layer, a work function metal layer and a polysilicon layer stacked on the substrate; forming a hard mask and a patterned photoresist on the polysilicon layer; removing the patterned photoresist, and next utilizing the hard mask as an etching mask to remove parts of the polysilicon layer and parts of the work function metal layer. Thus, a gate stack is formed. Since the patterned photoresist is removed before forming the gate stack, the gate stack is protected from damages of the photoresist-removing process. The photoresist-removing process does not attack the sidewalls of the gate stack, so a bird's beak effect of the gate dielectric layer is prevent.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 1, 2011
    Inventors: Che-Hua Hsu, Shao-Hua Hsu, Zhi-Cheng Lee, Cheng-Guo Chen
  • Patent number: 8003461
    Abstract: A method of fabricating an efuse structure, a resistor structure and a transistor structure. First, a work function metal layer, a polysilicon layer and a first hard mask layer are formed to cover a transistor region, a resistor region and an e-fuse region on a substrate. Then, the work function metal layer on the resistor region and the efuse region is removed by using a first photomask. Later, a gate, a resistor, an efuse are formed in the transistor region, the resistor region and the efuse region respectively. After that, a dielectric layer aligning with the top surface of the gate is formed. Later, the polysilicon layer in the gate is removed by taking a second hard mask as a mask to form a recess. Finally, a metal layer fills up the recess.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: August 23, 2011
    Assignee: United Microelectronics Corp.
    Inventors: Che-Hua Hsu, Zhi-Cheng Lee, Cheng-Guo Chen, Shao-Hua Hsu
  • Publication number: 20110189827
    Abstract: A method of fabricating an efuse structure, a resistor structure and a transistor structure. First, a work function metal layer, a polysilicon layer and a first hard mask layer are formed to cover a transistor region, a resistor region and an e-fuse region on a substrate. Then, the work function metal layer on the resistor region and the efuse region is removed by using a first photomask. Later, a gate, a resistor, an efuse are formed in the transistor region, the resistor region and the efuse region respectively. After that, a dielectric layer aligning with the top surface of the gate is formed. Later, the polysilicon layer in the gate is removed by taking a second hard mask as a mask to form a recess. Finally, a metal layer fills up the recess.
    Type: Application
    Filed: February 4, 2010
    Publication date: August 4, 2011
    Inventors: Che-Hua Hsu, Zhi-Cheng Lee, Cheng-Guo Chen, Shao-Hua Hsu