Patents by Inventor Zhikuang CAI

Zhikuang CAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11520934
    Abstract: A method for preventing a differential cryptanalysis attack is provided. The method is implemented by an adaptive scan chain, a control module, and a plaintext analysis module. The plaintext analysis module controls the adaptive scan chain, so that two plaintexts differing in the last bit of only one byte are input through scan chains with different structures. Consequently, the two input plaintexts for which differential cryptanalysis attack technology originally can be used to crack the key are unable to generate outputs that can be used by the differential cryptanalysis attack technology.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: December 6, 2022
    Assignees: Nanjing University Of Posts And Telecommunications, NANTONG INSTITUTE OF NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS CO., LTD.
    Inventors: Zhikuang Cai, Xun Xu, Ming Wang, Zixuan Wang, Henglu Wang, Jingqi Yao, Jiafei Yao, Yufeng Guo
  • Publication number: 20220300662
    Abstract: A method for preventing a differential cryptanalysis attack is provided. The method is implemented by an adaptive scan chain, a control module, and a plaintext analysis module. The plaintext analysis module controls the adaptive scan chain, so that two plaintexts differing in the last bit of only one byte are input through scan chains with different structures. Consequently, the two input plaintexts for which differential cryptanalysis attack technology originally can be used to crack the key are unable to generate outputs that can be used by the differential cryptanalysis attack technology.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 22, 2022
    Applicants: Nanjing University Of Posts And Telecommunications, NANTONG INSTITUTE OF NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS CO.,LTD.
    Inventors: Zhikuang CAI, Xun XU, Ming WANG, Zixuan WANG, Henglu WANG, Jingqi YAO, Jiafei YAO, Yufeng GUO
  • Patent number: 11309871
    Abstract: A narrow pulse generation circuit used in a sequential equivalent sampling system. The circuit comprises a crystal oscillator, an edge sharpening circuit, an avalanche transistor single-tube amplifying circuit and a shaping network connected in sequence, wherein the edge sharpening circuit is used for carrying out edge sharpening on a square wave signal generated by the crystal oscillator; the avalanche transistor single-tube amplifying circuit is used for carrying out avalanche amplification on the sharpened square wave signal to generate a Gaussian pulse signal to adjust the amplitude of a pulse; and the RC shaping network is used for shaping the Gaussian pulse signal to adjust the pulse width at the bottom of the pulse to form a narrow pulse signal. The narrow pulse circuit has a simple structure and narrow pulse width at the bottom and facilitates increasing a signal-to-noise ratio of a whole sequential sampling system.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: April 19, 2022
    Assignee: Nantong Institute of Nanjing University of Posts and Telecommunications Co., Ltd.
    Inventors: Zhikuang Cai, Xuanchen Qi, Wenhua Lin, Guowei Shi, Jian Xiao, Yufeng Guo
  • Publication number: 20210364627
    Abstract: An ultra-wideband ground penetrating radar control system, comprising a synchronous clock generating circuit, a GPS positioning module, a measuring wheel encoder module, a digitally controlled delay circuit for equivalent sampling, an analog-to-digital conversion (ADC) circuit, and a main controller. The synchronous clock generating circuit, the GPS positioning module, the measuring wheel encoder module, the digitally controlled delay circuit and the ADC circuit are all connected to the main controller. The synchronous clock generating circuit is further connected to an external ultra-wideband radar transmitter. The digitally controlled delay circuit is further connected to an external sampling pulse generation circuit for equivalent sampling. The ADC circuit is further connected to an external sampling gate for equivalent sampling. The main controller is further connected to an external server via Ethernet. The volume of an ultra-wideband ground penetrating radar control system is reduced.
    Type: Application
    Filed: January 14, 2019
    Publication date: November 25, 2021
    Applicant: Nantong Institute of Nanjing University of Posts and Telecommunications Co.,Ltd.
    Inventors: Zhikuang CAI, Xuanchen QI, Wenhua LIN, Ji WANG, Jian XIAO, Yufeng GUO
  • Publication number: 20210359668
    Abstract: A narrow pulse generation circuit used in a sequential equivalent sampling system. The circuit comprises a crystal oscillator, an edge sharpening circuit, an avalanche transistor single-tube amplifying circuit and a shaping network connected in sequence, wherein the edge sharpening circuit is used for carrying out edge sharpening on a square wave signal generated by the crystal oscillator; the avalanche transistor single-tube amplifying circuit is used for carrying out avalanche amplification on the sharpened square wave signal to generate a Gaussian pulse signal to adjust the amplitude of a pulse; and the RC shaping network is used for shaping the Gaussian pulse signal to adjust the pulse width at the bottom of the pulse to form a narrow pulse signal. The narrow pulse circuit has a simple structure and narrow pulse width at the bottom and facilitates increasing a signal-to-noise ratio of a whole sequential sampling system.
    Type: Application
    Filed: January 14, 2019
    Publication date: November 18, 2021
    Applicant: Nantong Institute of Nanjing University of Posts and Telecommunications Co.,Ltd.
    Inventors: Zhikuang CAI, Xuanchen QI, Wenhua LIN, Guowei SHI, Jian XIAO, Yufeng GUO