Patents by Inventor Zhimin Wan

Zhimin Wan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200273776
    Abstract: An integrated circuit package may be formed having a heat transfer fluid chamber, wherein the heat transfer fluid chamber may be positioned to allow a heat transfer fluid to directly contact an integrated circuit device within the integrated circuit package. In one embodiment, a first surface of the integrated circuit device may be electrically attached to a first substrate. The first substrate may then may be electrically attached to a second substrate, such that the integrated circuit device is between the first substrate and the second substrate. The second substrate may include a cavity, wherein the heat transfer fluid chamber may be formed between a second surface of the integrated circuit device and the cavity of the second substrate. Thus, at least a portion of a second surface of the integrated circuit device is exposed to the heat transfer fluid which flows into the heat transfer fluid chamber.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Applicant: Intel Corporation
    Inventors: Cheng Xu, Junnan Zhao, Zhimin Wan, Ying Wang, Yikang Deng, Chong Zhang, Jiwei Sun, Zhenguo Jiang, Kyu-Oh Lee
  • Publication number: 20200243418
    Abstract: Embodiments include a cooling solution having a first array of fins, where the first array of fins extend vertically from the substrate, and where adjacent individual fins of the first array are separated from each other by a microchannel. A second array of fins extend vertically from the substrate, where a channel region is between the first array of fins and the second array of fins.
    Type: Application
    Filed: January 24, 2019
    Publication date: July 30, 2020
    Applicant: Intel Corporation
    Inventors: Nicholas Neal, Zhimin Wan, Shankar Devasenathipathy, Je-Young Chang
  • Publication number: 20200211927
    Abstract: Microelectronic assemblies that include a cooling channel, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a surface, a die having a surface, and a fluidic channel between the surface of the die and the surface of the package substrate, wherein a top surface of the fluidic channel is defined by the surface of the die and a bottom surface of the fluidic channel is defined by the surface of the package substrate. In some embodiments, a microelectronic assembly may include a package substrate having a surface; a die having a surface; and an interposer having a fluidic channel between the surface of the die and the surface of the package substrate.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 2, 2020
    Applicant: Intel Corporation
    Inventors: Zhimin Wan, Cheng Xu, Yikang Deng, Junnan Zhao, Ying Wang, Chong Zhang, Kyu Oh Lee, Chandra Mohan Jha, Chia-Pin Chiu
  • Publication number: 20200185300
    Abstract: An integrated circuit (IC) package comprises a substrate comprising a dielectric and a thermal conduit that is embedded within the dielectric. The thermal conduit has a length that extends laterally within the dielectric from a first end to a second end. An IC die is thermally coupled to the first end of the thermal conduit. The IC die comprises an interconnect that is coupled to the first end of the thermal conduit. An integrated heat spreader comprises a lid over the IC die and at least one sidewall extending from the edge of the lid to the substrate that is thermally coupled to the second end of the thermal conduit.
    Type: Application
    Filed: December 10, 2018
    Publication date: June 11, 2020
    Applicant: INTEL CORPORATION
    Inventors: Cheng Xu, Zhimin Wan, Lingtao Liu, Yikang Deng, Junnan Zhao, Chandra Mohan Jha, Kyu-oh Lee
  • Publication number: 20200119250
    Abstract: A semiconductor device package structure is provided. The semiconductor device package structure includes a substrate, a die coupled to the substrate, and a thermoelectric device. The thermoelectric device may include a P-type semiconductor material, a N-type semiconductor material, and a plurality of interconnect structures to transmit current through the P-type and N-type semiconductor material. In an example, the P-type semiconductor material and the N-type semiconductor material may be at least in part embedded within the substrate. The thermoelectric device has a first side proximal to the die, and a second side separated from the die by the first side.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 16, 2020
    Applicant: Intel Corporation
    Inventors: Cheng Xu, Zhimin Wan, Yikang Deng, Junnan Zhao, Chong Zhang, Ying Wang, Kyu-oh Lee
  • Publication number: 20200118990
    Abstract: A semiconductor device package structure is provided. The semiconductor device package structure includes a substrate having a cavity, and phase change material within the cavity. In an example, the phase change material has a phase change temperature lower than 120 degree centigrade. A die may be coupled to the substrate. In an example, the semiconductor device package structure includes one or more interconnect structures that are to couple the die to the phase change material within the cavity.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 16, 2020
    Applicant: Intel Corporation
    Inventors: Cheng Xu, Zhimin Wan, Yikang Deng, Junnan Zhao, Chong Zhang, Chandra Mohan M. Jha, Ying Wang, Kyu-oh Lee
  • Publication number: 20200111720
    Abstract: An Integrated Circuit (IC) device structure is provided. The IC device structure includes a first substrate, first one or more dies coupled to a first side of the first substrate by a first plurality of interconnect structures, second one or more dies coupled to a first section of a second side of the substrate by a second plurality of interconnect structures, and a third plurality of interconnect structures to couple a second section of the second side of the substrate to a second substrate. In an example, at least a part of the second one or more dies are within a cavity in the second substrate.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 9, 2020
    Inventors: Zhimin Wan, Shankar Devasenathipathy, Chia-Pin Chiu, Chandra Mohan Jha, Weihua Tang
  • Publication number: 20200105643
    Abstract: An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be implemented with metal having a high thermal conductivity (e.g., copper). The channel structures can be used in conjunction with liquid-based cooling or air-based cooling. The frame can be implemented with low thermal conductivity molding compound or plastic so the heat transfer from one channel structure to another is inhibited. The channel structures can have different configurations (e.g., straight, pillars, and/or pin fins) to provide different rates of flow, mixing, and/or cooling. The flow direction of air or liquid for the channel structures can be the same (parallel) or different (counter).
    Type: Application
    Filed: September 27, 2018
    Publication date: April 2, 2020
    Applicant: INTEL CORPORATION
    Inventors: ZHIMIN WAN, CHIA-PIN CHIU, CHANDRA MOHAN JHA, WEIHUA TANG, SHANKAR DEVASENATHIPATHY
  • Publication number: 20200098666
    Abstract: Heat dissipation techniques include using metal features having one or more slanted or otherwise laterally-extending aspects. The metal features include, for example, tilted metal pillars, or metal bodies or fillets having an angled or sloping sidewall, or other metal features that extend both vertically and laterally. Such metal features increase the effective heat transfer area significantly by spreading heat in the in-plane (lateral) direction, in addition to the vertical direction. In some embodiments, slanted trenches are formed in photoresist/mold material deposited over a lower die, using photolithography and a multi-angle lens, or by laser drilling mold material deposited over the lower die. The trenches are then filled with metal. In other embodiments, metal features are printed on the lower die, and then molding material is deposited over the printed features. In any such cases, heat is conducted from a lower die to an upper die and/or an integrated heat spreader.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Applicant: INTEL CORPORATION
    Inventors: ZHIMIN WAN, CHIA-PIN CHIU, POOYA TADAYON, JOE F. WALCZYK, CHANDRA MOHAN JHA, WEIHUA TANG, SHRENIK KOTHARI, SHANKAR DEVASENATHIPATHY
  • Publication number: 20200051894
    Abstract: Disclosed herein are thermal assemblies for multi-chip packages (MCPs), as well as related methods and devices. For example, in some embodiments, a thermal assembly for an MCP may include a heat pipe having a ring shape.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 13, 2020
    Applicant: Intel Corporation
    Inventors: Zhimin Wan, Je-Young Chang, Chia-Pin Chiu, Shankar Devasenathipathy, Betsegaw Kebede Gebrehiwot, Chandra Mohan Jha
  • Patent number: 10361059
    Abstract: The time-averaged ion beam profile of an ion beam for implanting ions on a work piece may be smoothed to reduce noise, spikes, peaks, and the like and to improve dosage uniformity. Auxiliary magnetic field devices, such as electromagnets, may be located along an ion beam path and may be driven by periodic signals to generate a fluctuating magnetic field to smooth the ion beam profile (i.e., beam current density profile). The auxiliary magnetic field devices may be positioned outside the width and height of the ion beam, and may generate a non-uniform fluctuating magnetic field that may be strongest near the center of the ion beam where the highest concentration of ions may be positioned. The fluctuating magnetic field may cause the beam profile shape to change continuously, thereby averaging out noise over time.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: July 23, 2019
    Assignee: Advanced Ion Beam Technology, Inc.
    Inventors: Xiao Bai, Zhimin Wan, Donald Wayne Berrian
  • Publication number: 20190148109
    Abstract: Methods and apparatuses for providing an anisotropic ion beam for etching and treatment of substrate are discussed. In one embodiment, a system for processing a substrate includes a chamber, a chuck assembly, an ion source, and a grid system. The ion source includes grid system interfaces both the chamber and the ion source and includes a plurality of holes through which ions are extracted from the ion source to form an ion beam. The size of the plurality holes varies along an axis such that the ion density of the ion beam also varies along the axis. The density of the plurality of holes varies along an axis such that the ion density of the ion beam also varies along the axis. In some embodiments, the energies of a beamlet or multiple beamlets may be individual defined to adjust beam energy density.
    Type: Application
    Filed: November 10, 2017
    Publication date: May 16, 2019
    Inventors: Seokmin Yun, Shuogang Huang, Zhimin Wan, Mark Merrill
  • Publication number: 20190103385
    Abstract: The present disclosure is directed to systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A thermally conductive member that includes at least one thermally conductive member may be disposed between the first semiconductor package and the second semiconductor package. The thermally conductive member may include: a single thermally conductive element; multiple thermally conductive elements; or a core that includes at least one thermally conductive element. The thermally conductive elements are thermally conductively coupled to an upper surface of the first semiconductor package and to the lower surface of the second semiconductor package to facilitate the transfer of heat from the first semiconductor package to the second semiconductor package.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Applicant: Intel Corporation
    Inventors: OMKAR KARHADE, ROBERT L. SANKMAN, NITIN A. DESHPANDE, MITUL MODI, THOMAS J. DE BONIS, ROBERT M. NICKERSON, ZHIMIN WAN, HAIFA HARIRI, SRI CHAITRA J. CHAVALI, NAZMIYE ACIKGOZ AKBAY, FADI Y. HAFEZ, CHRISTOPHER L. RUMER
  • Publication number: 20180186472
    Abstract: Described herein is an unmanned aerial vehicle (“UAV”) apparatus comprising a 360-degree camera system mounted onboard a UAV platform. The camera system comprises a pair of cameras with a pair of wide-angle lenses that have a collective angle of view equal to or greater than 360 degrees, and as such, the lenses can capture images of the entire 360-degree spherical space surrounding the apparatus, except for an exclusive region defined by an overlap radius. The overlap radius is calculated using the equation R=H/[tan(??180 degrees)+tan(??180 degrees)], wherein ? and ? are the respective angles of view of the lenses, and H is the vertical distance between the lenses. The UAV platform comprises a body with a symmetric appearance and a retractable landing gear that can retract within the body during flight and extend out at landing.
    Type: Application
    Filed: December 28, 2017
    Publication date: July 5, 2018
    Inventors: Zhimin Wan, Ben Freudberg, Neal Jing, Peicong Liu, Kevin Kelin Wan, Minh Dang, Long Cheng
  • Patent number: 9852887
    Abstract: An ion source uses at least one induction coil to generate ac magnetic field to couple rf/VHF power into a plasma within a vessel, where the excitation coil may be a single set of turns each turn having lobes or multiple separate sets of windings. The excitation coil is positioned outside and proximate that side of the vessel that is opposite to the extraction slit, and elongated parallel to the length dimension of the extraction slit. The conducting shield(s) positioned outside or integrated with the well of the vessel are used to block the capacitive coupling to the plasma and/or to collect any rf/VHF current may be coupled into the plasma. The conducting shield positioned between the vessel and the coil set can either shield the plasma from capacitive coupling from the excitation coils, or be tuned to have a higher rf/VHF voltage to ignite or clean the source.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: December 26, 2017
    Assignee: Advanced Ion Beam Technology, Inc.
    Inventors: Stephen Edward Savas, Xiao Bai, Zhimin Wan, Peter M. Kopalidis
  • Patent number: 9824850
    Abstract: A deceleration apparatus capable of decelerating a short spot beam or a tall ribbon beam is disclosed. In either case, effects tending to degrade the shape of the beam profile are controlled. Caps to shield the ion beam from external potentials are provided. Electrodes whose position and potentials are adjustable are provided, on opposite sides of the beam, to ensure that the shape of the decelerating and deflecting electric fields does not significantly deviate from the optimum shape, even in the presence of the significant space-charge of high current low-energy beams of heavy ions.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: November 21, 2017
    Assignee: Advanced Ion Beam Technology, Inc.
    Inventors: Nicholas White, Zhimin Wan, Erik Collart
  • Patent number: 9748072
    Abstract: In an exemplary process for lower dose rate ion implantation of a work piece, an ion beam may be generated using an ion source and an extraction manipulator. The extraction manipulator may be positioned at a gap distance from an exit aperture of the ion source. A current of the ion beam exiting the extraction manipulator may be maximized when the extraction manipulator is positioned at an optimal gap distance from the exit aperture. The gap distance at which the extraction manipulator is positioned from the exit aperture may differ from the optimal gap distance by at least 10 percent. A first potential may be applied to a first set of electrodes. An x-dimension of the ion beam may increase as the ion beam passes through the first set of electrodes. The work piece may be positioned in the ion beam to implant ions into the work piece.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: August 29, 2017
    Assignee: ADVANCED ION BEAM TECHNOLOGY, INC.
    Inventors: Zhimin Wan, Rekha Padmanabhan, Xiao Bai, Gary N. Cai, Ching-I Li, Ger-Pin Lin, Shao-Yu Hu, David Hoglund, Robert E. Kaim, Kourosh Saadatmand
  • Patent number: 9697988
    Abstract: Ion implantation systems and processes are disclosed. An exemplary ion implantation system may include an ion source, an extraction manipulator, a magnetic analyzer, and an electrode assembly. The extraction manipulator may be configured to generate an ion beam by extracting ions from the ion source. A cross-section of the generated ion beam may have a long dimension and a short dimension orthogonal to the long dimension of the ion beam. The magnetic analyzer may be configured to focus the ion beam in an x-direction parallel to the short dimension of the ion beam. The electrode assembly may be configured to accelerate or decelerate the ion beam. One or more entrance electrodes of the electrode assembly may define a first opening and the electrode assembly may be positioned relative to the magnetic analyzer such that the ion beam converges in the x-direction as the ion beam enters through the first opening.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: July 4, 2017
    Assignee: Advanced Ion Beam Technology, Inc.
    Inventors: Zhimin Wan, Kourosh Saadatmand, Nicholas White
  • Publication number: 20170110287
    Abstract: Ion implantation systems and processes are disclosed. An exemplary ion implantation system may include an ion source, an extraction manipulator, a magnetic analyzer, and an electrode assembly. The extraction manipulator may be configured to generate an ion beam by extracting ions from the ion source. A cross-section of the generated ion beam may have a long dimension and a short dimension orthogonal to the long dimension of the ion beam. The magnetic analyzer may be configured to focus the ion beam in an x-direction parallel to the short dimension of the ion beam. The electrode assembly may be configured to accelerate or decelerate the ion beam. One or more entrance electrodes of the electrode assembly may define a first opening and the electrode assembly may be positioned relative to the magnetic analyzer such that the ion beam converges in the x-direction as the ion beam enters through the first opening.
    Type: Application
    Filed: October 14, 2015
    Publication date: April 20, 2017
    Inventors: Zhimin WAN, Kourosh SAADATMAND, Nicholas WHITE
  • Publication number: 20160293734
    Abstract: In forming a punch-through stopper region in a fin field effect transistor (finFET) device, a substrate may be etched to form a pair of trenches that define a fin structure. A portion of a first dose of ions may be implanted into the substrate through a bottom wall of each trench to form a pair of first dopant regions that at least partially extend under a channel region of the fin structure. The substrate at the bottom wall of each trench may be etched to increase a depth of each trench. Etching the substrate at the bottom wall of each trench may remove a portion of each first dopant region under each trench. A remaining portion of the pair of first dopant regions under the fin structure may at least partially define the punch-through stopper region of the finFET device.
    Type: Application
    Filed: April 3, 2015
    Publication date: October 6, 2016
    Inventors: Daniel TANG, Zhimin WAN, Ching-I LI, Ger-Pin LIN