Patents by Inventor Zhongli He
Zhongli He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11330293Abstract: A method of scaling complexity of a video processing system including determining a power saving factor based on an operating parameter and adjusting processing of video information based on the power saving factor to reduce computation complexity. The operating parameter may include available power and/or available processing capacity. A method of complexity scalability for a video processing system using prioritized layered coding including determining a power saving factor based on one or more metrics, such as power capacity and/or available processing capacity, and reducing processing complexity of multiple prioritized coding functions in a predetermined order of priority based on the level of the power saving factor. A video processing system including a power management circuit which determines the power saving factor and a video encoder system which correspondingly adjusts computation complexity.Type: GrantFiled: December 14, 2017Date of Patent: May 10, 2022Assignee: NXP USA, INC.Inventors: Zhongli He, Yong Yan
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Patent number: 9961372Abstract: A method of adaptively disabling deblock filtering of video information including determining a content characteristic of the video information, and adaptively disabling deblock filtering of the video information based on the content characteristic. The content characteristic may be a content complexity, such as an average of minimum sums of absolute differences of pixel values determined during motion estimation, or the mean square error of the video information, or the number of bits used for coding the video content. The content characteristic may be other than complexity, such as motion vector information. A video information processing system including a video processing circuit which processes video information and which determines a content characteristic of the video information, and a deblocking filter circuit which adaptively disables deblock filtering of the video information based on the content characteristic.Type: GrantFiled: December 8, 2006Date of Patent: May 1, 2018Assignee: NXP USA, INC.Inventor: Zhongli He
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Publication number: 20180115784Abstract: A method of scaling complexity of a video processing system including determining a power saving factor based on an operating parameter and adjusting processing of video information based on the power saving factor to reduce computation complexity. The operating parameter may include available power and/or available processing capacity. A method of complexity scalability for a video processing system using prioritized layered coding including determining a power saving factor based on one or more metrics, such as power capacity and/or available processing capacity, and reducing processing complexity of multiple prioritized coding functions in a predetermined order of priority based on the level of the power saving factor. A video processing system including a power management circuit which determines the power saving factor and a video encoder system which correspondingly adjusts computation complexity.Type: ApplicationFiled: December 14, 2017Publication date: April 26, 2018Inventors: ZHONGLI HE, YONG YAN
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Patent number: 9883202Abstract: A method of scaling complexity of a video processing system including determining a power saving factor based on an operating parameter and adjusting processing of video information based on the power saving factor to reduce computation complexity. The operating parameter may include available power and/or available processing capacity. A method of complexity scalability for a video processing system using prioritized layered coding including determining a power saving factor based on one or more metrics, such as power capacity and/or available processing capacity, and reducing processing complexity of multiple prioritized coding functions in a predetermined order of priority based on the level of the power saving factor. A video processing system including a power management circuit which determines the power saving factor and a video encoder system which correspondingly adjusts computation complexity.Type: GrantFiled: October 6, 2006Date of Patent: January 30, 2018Assignee: NXP USA, INC.Inventors: Zhongli He, Yong Yan
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Patent number: 9445128Abstract: A method of generating a video sequence including setting a state of a deblocking control flag in a frame header of a frame to indicate that a deblocking parameter is presented for some but not all layers. A method of processing a received video sequence including determining a state of a deblocking control flag of a frame header and retrieving a deblocking parameter for some but not all layers. A scalable video system including a deblocking control circuit which sets a state of a deblocking control flag in a frame header to indicate that a deblocking parameter is presented for some but not all layers. A scalable video system including a deblocking control circuit which determines the state of a deblocking control flag in a frame header of a received video sequence and which retrieves a deblocking parameter for some but not all layers of the frame.Type: GrantFiled: December 8, 2006Date of Patent: September 13, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventor: Zhongli He
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Patent number: 9374586Abstract: A video information processing system including a processing circuit and a deblocking filter. The processing circuit provides video information including a chroma component and a luma component. The deblocking filter has an input receiving the video information and an output providing filtered video information, and is configured to selectively disable chroma deblock filtering while luma deblock filtering is enabled. The processing circuit may include a video encoder or a video decoder. The processing circuit may further include control logic providing a control signal to disable chroma deblock filtering within either or both the encoder and decoder. The video encoder may incorporate control information in the output bitstream to control deblock filtering in the downstream decoder to maintain consistency between the encoder and the decoder.Type: GrantFiled: March 5, 2015Date of Patent: June 21, 2016Assignee: NORTH STAR INNOVATIONS INC.Inventor: Zhongli He
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Publication number: 20150181211Abstract: A video information processing system including a processing circuit and a deblocking filter. The processing circuit provides video information including a chroma component and a luma component. The deblocking filter has an input receiving the video information and an output providing filtered video information, and is configured to selectively disable chroma deblock filtering while luma deblock filtering is enabled. The processing circuit may include a video encoder or a video decoder. The processing circuit may further include control logic providing a control signal to disable chroma deblock filtering within either or both the encoder and decoder. The video encoder may incorporate control information in the output bitstream to control deblock filtering in the downstream decoder to maintain consistency between the encoder and the decoder.Type: ApplicationFiled: March 5, 2015Publication date: June 25, 2015Inventor: ZHONGLI HE
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Patent number: 9001899Abstract: A video information processing system including a processing circuit and a deblocking filter. The processing circuit provides video information including a chroma component and a luma component. The deblocking filter has an input receiving the video information and an output providing filtered video information, and is configured to selectively disable chroma deblock filtering while luma deblock filtering is enabled. The processing circuit may include a video encoder or a video decoder. The processing circuit may further include control logic providing a control signal to disable chroma deblock filtering within either or both the encoder and decoder. The video encoder may incorporate control information in the output bitstream to control deblock filtering in the downstream decoder to maintain consistency between the encoder and the decoder.Type: GrantFiled: September 15, 2006Date of Patent: April 7, 2015Assignee: Freescale Semiconductor, Inc.Inventor: Zhongli He
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Patent number: 8743970Abstract: A system and method of decoding input video information is disclosed which includes performing error detection for each video block of a frame, determining whether a scene change occurs for the frame, and when an error is detected in a video block, performing spatial concealment by concealing error of the erroneous video block using neighboring video information within the frame when the erroneous video block is intraframe encoded or when a scene change is detected for the frame, or performing temporal concealment by replacing the erroneous video block with a reference video block from a reference frame when the erroneous video block is interframe encoded and when a scene change is not detected for the frame. The method may further include detecting false frames based on comparing current and new frame number and picture order count values of a new slice.Type: GrantFiled: April 13, 2009Date of Patent: June 3, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Zhongli He, Xianzhong Li
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Patent number: 8325280Abstract: A video adjustment system for processing video information is disclosed which includes a motion analyzer and an adjustment module. The motion analyzer determines a motion level metric of the video information based on at least one motion parameter. The adjustment adjusts an initial dynamic light scaling factor to provide an adjusted dynamic light scaling factor based on the motion level. The dynamic light scaling factor may be used for luminance compensation and backlight display scaling. The motion level may be based on any type of motion information, such as motion vector information or information indicating a scene change. A distortion module may perform a distortion evaluation of the video information for calculating the initial scaling factor. Alternatively, the distortion module may include a memory which stores predetermined scaling factors based on statistical distortion level characterization.Type: GrantFiled: August 6, 2009Date of Patent: December 4, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Yolanda Prieto, Zhongli He
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Patent number: 8204129Abstract: A method of simplifying deblock filtering of video blocks of an enhanced layer of scalable video information is disclosed which includes selecting an adjacent pair of video blocks, determining whether boundary strength of the video blocks is a first value, evaluating first conditions using component values of a first component line if the boundary strength is not the first value, and bypassing deblock filtering between the video blocks if the boundary strength is the first value or if any of the first conditions is false. The method may include bypassing evaluating conditions and deblock filtering associated with the maximum boundary strength. The method may include bypassing evaluating second conditions and bypassing corresponding deblock filtering if the intermediate edge is a horizontal edge. The method may include bypassing less efficient memory reads associated with component values used for evaluating the second conditions.Type: GrantFiled: March 27, 2007Date of Patent: June 19, 2012Assignee: Freescale Semiconductor, Inc.Inventor: Zhongli He
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Patent number: 8077775Abstract: A method of adaptively adjusting a QP of a video encoder to control output bit rate including estimating the QP based on a complexity of a previous frame and encoding bit rate information of a current frame to provide an estimated QP, determining a threshold value based on a video quality factor, a target bit rate and a complexity of a previous interval of the current frame or the same interval of the previous frame, and if the estimated QP is greater than the threshold value, adaptively adjusting the estimated QP using the threshold value, the target bit rate and the complexity of the previous interval. The method may include adaptively limiting a change of the QP between frame intervals based on a difference between the QP and the threshold value. Complexity information may be based on an average of minimum SAD values.Type: GrantFiled: May 12, 2006Date of Patent: December 13, 2011Assignee: Freescale Semiconductor, Inc.Inventor: Zhongli He
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Publication number: 20110116539Abstract: A method of reducing processing of fast inverse transform of an input transform block by a video decoder includes determining whether a block type is one of zero, DC, left, and top. If not, the inverse transform is performed and a residual video block is provided as residual information. When the block type is zero, inverse transform is bypassed. When the block type is DC, reduced complexity inverse transform of a DC coefficient is performing and a single residual coefficient is provided as residual information. When the block type is left, reduced complexity inverse transform of a left column of the input transform block is performed and a single column of residual coefficients is provided as residual information. When the block type is top, reduced complexity inverse transform of a top row is performed and a single row of residual coefficients is provided as residual information.Type: ApplicationFiled: November 13, 2009Publication date: May 19, 2011Applicant: Freescale Semiconductor, Inc.Inventors: Zhongli He, Xianzhong Li, Peng Zhou
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Patent number: 7924925Abstract: A video encoder including a processing block and an external memory storing a current frame and a reference frame. The processing block includes a memory interface, a local memory and a processor. The processor encodes the current frame in raster scan macroblock order for FMO using information from the reference frame, converts encoded information into compressed information, and organizes the compressed information according to a predetermined FMO. The processor organizes the compressed information according to any suitable FMO organization such as scattered, interleaved, etc. The processor stores the compressed information into multiple slice groups into the local memory or into the external memory, where the slice groups are organized according to the FMO. The processor loads a search window macroblock into the local memory if not already stored in the local memory. The processor may generate unfiltered reconstructed information and store the unfiltered reconstructed information into the local memory.Type: GrantFiled: February 24, 2006Date of Patent: April 12, 2011Assignee: Freescale Semiconductor, Inc.Inventor: Zhongli He
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Publication number: 20110032430Abstract: A video adjustment system for processing video information is disclosed which includes a motion analyzer and an adjustment module. The motion analyzer determines a motion level metric of the video information based on at least one motion parameter. The adjustment adjusts an initial dynamic light scaling factor to provide an adjusted dynamic light scaling factor based on the motion level. The dynamic light scaling factor may be used for luminance compensation and backlight display scaling. The motion level may be based on any type of motion information, such as motion vector information or information indicating a scene change. A distortion module may perform a distortion evaluation of the video information for calculating the initial scaling factor. Alternatively, the distortion module may include a memory which stores predetermined scaling factors based on statistical distortion level characterization.Type: ApplicationFiled: August 6, 2009Publication date: February 10, 2011Applicant: Freescale Semiconductor, Inc.Inventors: Yolanda Prieto, Zhongli He
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Publication number: 20100260269Abstract: A system and method of decoding input video information is disclosed which includes performing error detection for each video block of a frame, determining whether a scene change occurs for the frame, and when an error is detected in a video block, performing spatial concealment by concealing error of the erroneous video block using neighboring video information within the frame when the erroneous video block is intraframe encoded or when a scene change is detected for the frame, or performing temporal concealment by replacing the erroneous video block with a reference video block from a reference frame when the erroneous video block is interframe encoded and when a scene change is not detected for the frame. The method may further include detecting false frames based on comparing current and new frame number and picture order count values of a new slice.Type: ApplicationFiled: April 13, 2009Publication date: October 14, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Zhongli He, Xianzhong Li
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Patent number: 7773672Abstract: A rate control system for a video encoder including rate control logic which determines a first QP corresponding to a selected encoding layer of multiple encoding layers, and scaling logic configured to scale the first QP to a second QP corresponding to any other encoding layer based on at least one encoding layer parameter. A template of stored QP values may be used to reduce computational complexity, such as a QP value for each frame interval or a QP value for each of multiple rate control interval complexity values. The QP values in the template may be predetermined or programmed and updated during periodic training sessions. Several encoding layer parameters are contemplated, such as any combination of bit rate, frame rate and frame resolution. The scaling logic may be configured to scale from any one encoding layer to another and vice-versa for bi-directional scaling.Type: GrantFiled: May 30, 2006Date of Patent: August 10, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Yolanda Prieto, Zhongli He
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Patent number: 7760960Abstract: A localized content adaptive filter system including a tile buffer having an output providing first image information, a frequency analyzer providing a frequency information signal based on frequency content of the first image information, and an adaptive filter which is adjusted based on the frequency information signal. The frequency analyzer may include a wavelet transform filter and a frequency content analyzer. The adaptive filter may include filter select logic which receives the frequency information signal and second image information associated with the first image information, and which provides filtered image information. The filter select logic determines a filter based on the frequency information signal and the determined filter filters the second image information to provide the filtered image information.Type: GrantFiled: September 15, 2006Date of Patent: July 20, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Yong Yan, Zhongli He, Yolanda Prieto
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Patent number: 7705885Abstract: A motion stabilization system including a filter bank and motion stabilization logic. The filter bank receives a video signal and provides at least one high frequency sub-band signal which includes edge information of the video signal. The motion stabilization logic receives the high frequency sub-band signal, a reference image, and the video signal and provides a stabilized image. The reference image is generated from image stabilization information developed during motion processing. The motion stabilization system may include an edge detector which receives and binarizes the high frequency sub-band signal. Binarization significantly reduces the amount of information to be processes by the motion stabilization logic. The motion stabilization system may further include a tile buffer which stores a portion of the video signal and which provides a video signal portion to the filter bank. The filter bank may be implemented as a discrete wavelet transformation filter.Type: GrantFiled: June 15, 2006Date of Patent: April 27, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Yolanda Prieto, Zhongli He
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Publication number: 20090060035Abstract: A method of processing video information which includes receiving encoded video information including an encoded base layer frame and encoded enhanced layer frames for providing temporal scalability, decoding the encoded video information in display order, and using a decoded first enhanced layer frame as a reference frame for decoding a second enhanced layer frame for forward prediction. Processing the video information in display order and using a decoded enhanced layer frame as a reference frame for processing another enhanced layer frame for forward prediction reduces coding latency for achieving temporal scalability for low delay scalable video coding. The coding memory space may also be reduced as compared to bidirectional prediction coding since the number of reference frames used for coding may be reduced.Type: ApplicationFiled: August 28, 2007Publication date: March 5, 2009Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Zhongli He, Yong Yan, Yolanda Prieto