Patents by Inventor Zhuxian Xu

Zhuxian Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10705118
    Abstract: A testing apparatus includes a holster including a jack defining a conductive periphery configured to connect with a reference lead of the voltage probe to form a common ground. The apparatus includes a shunt defining first and second regions of different potential having predetermined difference. The second region is configured to connect with a reference lead of the shunt probe. The apparatus includes a bridge configured to connect the shunt probe lead with the common ground.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: July 7, 2020
    Assignee: Ford Global Technologies, LLC
    Inventors: Xi Lu, Krishna Prasad Bhat, Chingchi Chen, Zhuxian Xu, Guangyin Lei
  • Publication number: 20200153362
    Abstract: A multiphase inverter for an electric vehicle drive has a plurality of drivers to provide drive signals to respective gate loops of upper and lower transistors in the phase legs. A transformer has a secondary winding in a first gate loop of a first transistor in one phase leg and a primary winding connecting a Kelvin-emitter of the first transistor to a Kelvin-emitter of a second transistor in the other phase leg. Switching transients of transistors are shortened because when gate signal is toggled to change a conduction state of a transistor in a first phase leg, a rate of current change in the first leg is sensed in a transformer primary winding connected across a stray inductance of the first leg. A voltage proportional to the sensed rate is added to the gate signal via a transformer secondary winding, thereby increasing a common source inductance of the transistor.
    Type: Application
    Filed: November 12, 2018
    Publication date: May 14, 2020
    Inventors: Zhuxian Xu, Chingchi Chen
  • Patent number: 10640003
    Abstract: The methods and systems for correcting for an inductive load when testing high voltages devices are described. A high voltages device is a device under test (DUT) in a double-pulse test, which may require the inductive load. The method can include in a low current, high voltage time period, estimating an inductor current contribution range after a turn on of the device-under-test connected to an inductive load with an air core inductor. The method subtracts the estimated inductor current contribution from a device-under-test collector current to output a corrected collector current. This allows the double pulse test to be conducted with an air-core inductor. Vehicles can use the DUT in traction power applications.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: May 5, 2020
    Assignee: Ford Global Technologies, LLC
    Inventors: Xi Lu, Chingchi Chen, Zhuxian Xu, Krishna Prasad Bhat, Lan Yu, Michael W. Degner
  • Patent number: 10622593
    Abstract: A power module includes a packaging structure having a pair of side-by-side spaced apart busbars, each connected to a corresponding switch. The power module includes a conductive pad, between and electrically isolated from the busbars and the switches, and configured to, responsive to flow of current through the busbars generated by the switches and resulting in power loop magnetic flux between the busbars, generate magnetic flux that partially cancels the power loop magnetic flux.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 14, 2020
    Assignee: Ford Global Technologies, LLC
    Inventors: Zhuxian Xu, Guangyin Lei, Nevin Altunyurt, Chingchi Chen
  • Patent number: 10622909
    Abstract: An inverter for an electric vehicle drive has a bridge configuration using power transistors packaged in actively cooled power modules. Control electrodes in the power modules carrying gate signals to drive the transistors contain inductive coils to increase a common source inductance in order to reduce power losses. Each inverter power module comprises a pair of transistor dies with output electrodes defining a power loop. The control electrodes with inductive coils carrying respective gate signals are arranged to be magnetically coupled with the power loop. For active cooling, a heat conductive plate underlies the dies. A magnetic interrupter is disposed at the heat conductive plate. A localized eddy current preventer is interposed at the heat conductive plate in alignment with the inductive coils to avoid eddy currents that could otherwise reduce the coupling of the inductive coils with the power loop.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: April 14, 2020
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Zhuxian Xu, Guangyin Lei, Chingchi Chen
  • Patent number: 10527653
    Abstract: A method includes measuring an impedance of a shunt as a function of frequency and converting the impedance to an admittance in a time domain. The method further includes connecting the shunt in a circuit and measuring voltage data across the shunt over a predetermined interval. The method includes outputting a signal indicative of a current through the shunt derived from the voltage data convolved with the admittance. The method may be implemented in a controller configured to interface with the shunt.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: January 7, 2020
    Assignee: Ford Global Technologies, LLC
    Inventors: Richard William Kautz, Xi Lu, Zhuxian Xu, Guangyin Lei, Chingchi Chen, Lan Yu, Michael W. Degner
  • Publication number: 20190372063
    Abstract: A power module includes a packaging structure having a pair of side-by-side spaced apart busbars, each connected to a corresponding switch. The power module includes a conductive pad, between and electrically isolated from the busbars and the switches, and configured to, responsive to flow of current through the busbars generated by the switches and resulting in power loop magnetic flux between the busbars, generate magnetic flux that partially cancels the power loop magnetic flux.
    Type: Application
    Filed: June 5, 2018
    Publication date: December 5, 2019
    Inventors: Zhuxian XU, Guangyin LEI, Nevin ALTUNYURT, Chingchi CHEN
  • Patent number: 10439485
    Abstract: An electrified vehicle propulsion system uses current feedback to modify gate drive signals to suppress voltage spikes and increase switching efficiency. A DC link having a link capacitor and a link inductance is connected to first and second converters. A first converter bridge has a first phase leg with first upper and lower switching devices, each switching device having a respective gate loop. A second converter bridge has a second phase leg with second upper and lower switching devices, each switching device having a respective gate loop. A plurality of gate drivers provide gate drive signals to respective gate loops for turning the respective switching devices on and off. A plurality of gate coils are provided, wherein each gate coil is connected in series between a respective gate driver and a respective gate loop. Each gate coil is respectively inductively coupled to the link inductance.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: October 8, 2019
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Zhuxian Xu, Chingchi Chen
  • Patent number: 10388460
    Abstract: A capacitor comprising first and second end sprays respectively located at distal ends of a capacitor cell, a positive polarity bus bar extending from a first wound conductive layer of the capacitor cell adjacent to the first end spray, a negative polarity bus bar extending from a second wound conductive layer of the capacitor cell adjacent to the second end spray, and a capacitor film wrapped around an area between the first and second conductive layers.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: August 20, 2019
    Assignee: Ford Global Technologies, LLC
    Inventors: Guangyin Lei, Xi Lu, Zhuxian Xu, Chingchi Chen
  • Patent number: 10361147
    Abstract: A power module has upper and lower transistor dies carried by a lead frame assembly. The assembly has a positive DC paddle for the upper die and an AC paddle for the lower die. An upper plate interconnects a second side of the upper die with the AC paddle, and a lower plate interconnects a second side of the lower die with a negative power bar. Current flowing via positive and negative power bars defines a power loop creating a main magnetic flux with a first direction in a central region and a return direction outside the central region. The upper and lower plates have outer edges having respective notches to concentrate respective portions of a return magnetic flux. Each die has a gate pad connected in a gate loop, wherein the gate loops each overlap a respective concentrated return flux thereby enhancing a common source inductance for each transistor.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: July 23, 2019
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Zhuxian Xu, Nevin Altunyurt, Chingchi Chen
  • Publication number: 20190222108
    Abstract: An electrified vehicle propulsion system uses current feedback to modify gate drive signals to suppress voltage spikes and increase switching efficiency. A DC link having a link capacitor and a link inductance is connected to first and second converters. A first converter bridge has a first phase leg with first upper and lower switching devices, each switching device having a respective gate loop. A second converter bridge has a second phase leg with second upper and lower switching devices, each switching device having a respective gate loop. A plurality of gate drivers provide gate drive signals to respective gate loops for turning the respective switching devices on and off. A plurality of gate coils are provided, wherein each gate coil is connected in series between a respective gate driver and a respective gate loop. Each gate coil is respectively inductively coupled to the link inductance.
    Type: Application
    Filed: January 17, 2018
    Publication date: July 18, 2019
    Inventors: Zhuxian Xu, Chingchi Chen
  • Patent number: 10352968
    Abstract: A shunt includes a power terminal having a planar first potential region (FPR) connected to a second potential region (SPR) through a resistive element, the SPR being offset from and parallel to the FPR. The shunt includes a sensor terminal having a first potential lead (FPL) connected to the FPR, and a second potential lead (SPL) connected to the SPR and separated from the FPL by an insulation sheet. The SPL and sheet cover the resistive element.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: July 16, 2019
    Assignee: Ford Global Technologies, LLC
    Inventors: Chingchi Chen, Xi Lu, Guangyin Lei, Zhuxian Xu
  • Patent number: 10340811
    Abstract: A selectable increase in the common source inductance is obtained by a layout for a power module used for a half-bridge phase leg in an inverter for an electrically-driven vehicle. The power module comprises a pair of transistor dies connected to positive, negative, and AC conductive tracks for carrying bridge currents. The module includes a pair of gate drive pins and a pair of gate drive coils connecting a respective pin and die. The gate drive coils are disposed in a region between the positive and negative tracks containing a flux generated by the currents having a locally greatest rate of change. The coils may preferably be comprised of traces on an auxiliary printed circuit board incorporated in the module. The gate drive pins can be on the gate side or the emitter side of the transistor dies.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: July 2, 2019
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Zhuxian Xu, Chingchi Chen, Michael W. Degner
  • Patent number: 10250115
    Abstract: A phase leg in an inverter bridge has an upper transistor with upper gate, collector, and emitter terminals, wherein the upper gate and emitter terminals are arranged to create an upper common source inductance. A lower transistor has lower gate, collector, and emitter terminals, wherein the lower gate and emitter terminals are arranged to create a lower common source inductance. An upper diode is coupled across the upper collector and emitter terminals and substantially in parallel with the upper common source inductance. A lower diode is coupled across the lower collector and emitter terminals and substantially in parallel with the lower common source inductance. Thus, the diodes substantially bypass the common source inductances when carrying commutation current when one of the transistors is switching off. This allows the phase leg to possess significant common source inductance at the gate terminals while avoiding “shoot-through” issues.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: April 2, 2019
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Zhuxian Xu, Chingchi Chen
  • Publication number: 20180354384
    Abstract: The methods and systems for correcting for an inductive load when testing high voltages devices are described. A high voltages device is a device under test (DUT) in a double-pulse test, which may require the inductive load. The method can include in a low current, high voltage time period, estimating an inductor current contribution range after a turn on of the device-under-test connected to an inductive load with an air core inductor. The method subtracts the estimated inductor current contribution from a device-under-test collector current to output a corrected collector current. This allows the double pulse test to be conducted with an air-core inductor. Vehicles can use the DUT in traction power applications.
    Type: Application
    Filed: June 8, 2017
    Publication date: December 13, 2018
    Inventors: Xi LU, Chingchi CHEN, Zhuxian XU, Krishna Prasad BHAT, Lan YU, Michael W. DEGNER
  • Patent number: 10141254
    Abstract: A direct bonded copper (DBC) power module with elevated common source inductance is adapted for use as a half bridge in an electric drive for an electric vehicle. Etching patterns on the DBC substrates provide indented notches for concentrating magnetic flux in the power loops. Etched gate traces form gate loops with coil windings disposed within or overlapping the notches in order to enhanced the common source inductance for each switching transistor (such as an IGBT). Switching loss is reduced and fuel economy is improved for the electric vehicle with minimal impact on packaging size and at no additional cost.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: November 27, 2018
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Zhuxian Xu, Chingchi Chen
  • Patent number: 10122357
    Abstract: An inverter for an electric vehicle drive has a bridge including a plurality of power switching devices having respective insulated gate terminals and emitter terminals. A PWM circuit determines switching commands for controlling the bridge. A plurality of gate drivers receive the switching commands and provide gate drive signals to respective gate terminals. A plurality of gate capacitors are each thermally coupled to a respective switching device and are electrically connected between the respective gate and emitter terminals. Each gate capacitor has a negative temperature coefficient adapted to counter changes in a switching speed of the switching devices over a predetermined range of temperature. As a result, a consistent switching speed is maintained so that power loss and switching device reliability are optimal across the full temperature range.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: November 6, 2018
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Xi Lu, Chingchi Chen, Michael W. Degner, Zhuxian Xu, Ke Zou
  • Patent number: 10122294
    Abstract: An inverter phase leg has upper and lower gate drive circuits supplying gate drive signals to upper and lower transistors. Each gate drive circuit includes an active clamp for selectively deactivating the upper and lower transistors. The transistors are comprised of semiconductor devices, each having respective gate, source, and emitter terminals. Each emitter terminal is connected to a respective output electrode structured to enhance a common source inductance between the respective gate and emitter terminals. Each emitter terminal is further connected to a respective Kelvin emitter electrode substantially bypassing the respective output electrode. Each respective active clamp is connected between the respective gate terminal and Kelvin emitter electrode so that the active clamping function remains effective in the presence of the enhanced common source inductance.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: November 6, 2018
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Zhuxian Xu, Chingchi Chen, Michael W. Degner
  • Patent number: 10114041
    Abstract: A voltage probe holster includes a support member disposed on a base. The support member defines a plurality of apertures sized to receive a plurality of single-ended probes having coaxial leads. Each of the apertures have a conductive periphery configured to conduct electricity from one of the coaxial leads such that a common ground loop through the support member and the base is formed and that differences in ground potential are reduced.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: October 30, 2018
    Assignee: Ford Global Technologies, LLC
    Inventors: Xi Lu, Krishna Prasad Bhat, Chingchi Chen, Mark Allan Lippman, Zhuxian Xu, Guangyin Lei
  • Publication number: 20180284154
    Abstract: A voltage probe holster includes a support member disposed on a base. The support member defines a plurality of apertures sized to receive a plurality of single-ended probes having coaxial leads. Each of the apertures have a conductive periphery configured to conduct electricity from one of the coaxial leads such that a common ground loop through the support member and the base is formed and that differences in ground potential are reduced.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 4, 2018
    Inventors: Xi Lu, Krishna Prasad Bhat, Chingchi Chen, Mark Allan Lippman, Zhuxian Xu, Guangyin Lei