COMPOUND SEMICONDUCTOR DEVICE, MANUFACTURING METHOD FOR COMPOUND SEMICONDUCTOR DEVICE, AND AMPLIFIER
A compound semiconductor device includes a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from compound semiconductor, a source electrode, a gate electrode, and a drain electrode that are provided above the semiconductor laminate structure and arranged in a first direction, and a first insulating film having a first internal stress and formed over the semiconductor laminate structure and between the gate electrode and the drain electrode, wherein a slit extending in the first direction is defined in the first insulating film.
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This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2019-19110, filed on Feb. 5, 2019, the entire contents of which are incorporated herein by reference.
FIELDThe embodiments discussed herein are related to a compound semiconductor device, a manufacturing method for a compound semiconductor device, and an amplifier.
BACKGROUNDNitride semiconductors have characteristics such as a high saturation electron velocity and a wide band gap. For this reason, various studies have been made to apply a nitride semiconductor to a compound semiconductor device having a high breakdown voltage and a high output by utilizing these characteristics. For example, the band gap of GaN, which is a kind of nitride semiconductor, is 3.4 eV, which is larger than the band gap (1.1 eV) of Si and the band gap (1.4 eV) of GaAs. Therefore, GaN has a high breakdown electric field strength and is very promising as a material for a compound semiconductor device for a power source for achieving high voltage operation and high output.
As compound semiconductor devices formed from nitride semiconductor, there have been many reports about field effect transistors, particularly high electron mobility transistors (HEMTs). For example, among GaN-based HEMTs, AlGaN/GaN-HEMTs in which GaN is used as an electron transit layer (channel layer) and AlGaN is used as an electron supply layer have been attracting attention. In AlGaN/GaN-HEMTs, distortion due to a difference in lattice constant between GaN and AlGaN occurs in AlGaN. A two-dimensional electron gas (2DEG) of high concentration is obtained by spontaneous polarization of AlGaN and piezoelectric polarization generated by the distortion. Therefore, AlGaN/GaN-HEMTs are expected as high-power devices for communication, high-efficiency switch elements, high-breakdown voltage power devices for electric vehicles and the like, and the like.
For example, Japanese Laid-open Patent Publication No. 2008-205095, Japanese Laid-open Patent Publication No. 2010-182829, and the like are disclosed as related art.
SUMMARYAccording to an aspect of the embodiments, a compound semiconductor device includes a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from compound semiconductor, a source electrode, a gate electrode, and a drain electrode that are provided above the semiconductor laminate structure and arranged in a first direction, and a first insulating film having a first internal stress and formed over the semiconductor laminate structure and between the gate electrode and the drain electrode, wherein a slit extending in the first direction is defined in the first insulating film.
The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention.
In a compound semiconductor device of related art, it is difficult to improve the current density.
An object of the present disclosure is to provide a compound semiconductor device, a manufacturing method for a compound semiconductor device, and an amplifier, with which the current density may be improved.
The present inventors have made extensive studies to solve the above problems. As a result, it has been found that it is effective to improve the linearity of the electric charges in the channel.
Hereinafter, embodiments of the present disclosure will be described in detail with reference to accompanying drawings. In the specification and drawings, constituent elements having substantially the same functional configuration may be denoted by the same reference signs and redundant description thereof may be omitted.
First EmbodimentA first embodiment relates to a compound semiconductor device including a high electron mobility transistor (HEMT).
As illustrated in
For example, the semiconductor laminate structure 102 is formed over the substrate 101, and the source electrode 111s, the gate electrode 112g, and the drain electrode 111d are provided within an element region defined by element separation regions 103 formed in the semiconductor laminate structure 102.
As illustrated in
In contrast, in a reference example in which the slits 110 are not defined in the tensile stress film 105, no quantum well is present. Therefore, as illustrated in
As described above, according to the compound semiconductor device 100, the current density may be improved. By using the compound semiconductor device 100 for an amplifier, the output may be improved.
The material of the tensile stress film 105 is not limited. For example, silicon nitride (SiN), magnesium oxide (MgO), or the like may be used for the tensile stress film 105. The depth of the quantum wells of the conduction band associated with the definition of the slits 110 is approximately proportional to the tensile stress of the tensile stress film 105. The magnitude of the tensile stress of the tensile stress film 105 is not limited, but is, for example, 1 GPa to 20 GPa.
The width of each of the slits 110 is not limited, but is preferably 100 nm or less from the viewpoint of confining electrons in the Y direction. If the width is too large, an excellent confinement effect may not be obtained. The width of each of the slits 110 is preferably 10 nm or more from the viewpoint of processing accuracy. If the width is too small, it may be difficult to define the slits 110 with high accuracy.
The plurality of slits 110 are not necessarily arranged at equal intervals in the Y direction. For example, the slits 110 may be sparse at the center and dense at both ends in the gate width direction. In this case, current flows more easily in the vicinity of both ends than in the center in the gate width direction, and thus heat generated by the operation of the compound semiconductor device 100 is easily dissipated to the outside.
When an internal stress film having internal stress is formed over a silicon substrate, the silicon substrate is deformed in response to internal stress from the internal stress film, and exhibits curvature. When the thickness of the silicon substrate is h (m), the radius of curvature of the silicon substrate is r (m), and the thickness of the internal stress film is t (m), the internal stress s (Pa) of the internal stress film may be expressed by the following formula (1). If s is a positive value, the internal stress film is a tensile stress film having internal stress of tensile force, and if s is a negative value, the internal stress film is a compressive stress film having compressive stress. s=1.805×1011×h2/6rt . . . (1)
The material of the semiconductor laminate structure 102 is not limited. For example, GaN may be used for the electron transit layer 102c, and AlxGa1-xN (0<x≤1) may be used for the electron supply layer 102e. The thickness of the electron transit layer 102c and the thickness of the electron supply layer 102e are not limited. However, as the electron supply layer 102e becomes thicker, the tensile stress of the tensile stress film 105 becomes less likely to act on the channel, and the confinement effect of electrons becomes weaker. From the viewpoint of the influence of the tensile stress, the thickness of the electron supply layer 102e is preferably 10 nm or less. Furthermore, in order to generate a two-dimensional electron gas (2DEG) of a sufficient concentration, Al composition x of AlxGa1-xN is preferably 0.32 or more, more preferably 0.50 or more, and further preferably 1.00. That is, preferably 32% or more, more preferably 50% or more, and further preferably 100% of metal atoms in the nitride (AlxGa1-xN) are Al. The concentration of the 2DEG is not limited, but is preferably 2×1013 cm−2 or higher. By increasing the Al composition x, the quantum wells are formed also in the Z direction, thereby making it easier to confine electrons. InAlN or InAlGaN may be used for the electron supply layer 102e.
In the case of using AlN for the electron supply layer 102e, it is preferable that a recess for source and a recess for drain are defined in the semiconductor laminate structure 102, a low resistance re-grown layer such as n+ GaN is formed in the recesses, and the source electrode 111s and the drain electrode 111d are formed over the re-grown layer.
Second EmbodimentA second embodiment relates to a compound semiconductor device including an HEMT.
As illustrated in
In the compound semiconductor device 200, the quantum wells present in the regions overlapping the slits 110 are deeper. Therefore, according to the compound semiconductor device 200, the linearity of electrons in the channel may be further improved and the current density may be further improved.
From another perspective, by combining the tensile stress film 105 having a tensile stress of 5 GPa and the compressive stress film 201 having a compressive stress of 5 GPa, quantum wells similar to the case of using the tensile stress film 105 having a tensile stress of 10 GPa in the first embodiment. Although the film forming conditions of films having larger internal stress are more restrictive, the flexibility of the film forming conditions may be improved according to the second embodiment.
Third EmbodimentA third embodiment relates to a compound semiconductor device including an HEMT.
In a compound semiconductor device 300 according to the third embodiment, as illustrated in
As described above, quantum wells are present in the regions overlapping the slits 110, and electrons are accumulated therein. In the compound semiconductor device 100 according to the first embodiment, the slits 110 are defined so as to extend to the gate electrode 112g in the X direction. In contrast, in the compound semiconductor device 300 according to the third embodiment, the end portions of the slits 310 on the gate electrode 112g side are spaced apart from the gate electrode 112g in the X direction. Therefore, according to the compound semiconductor device 300, the gate leakage current derived from accumulation of electrons in the regions overlapping the slits 310 may be reduced more than the gate leakage current derived from accumulation of electrons in the regions overlapping the slits 110 in the compound semiconductor device 100.
The distance from the end portions of the slits 310 on the gate electrode 112g side to the gate electrode 112g in the X direction is not limited, but is preferably 0.2 μm or more from the viewpoint of effectively reducing the gate leakage current.
As in the second embodiment, the compressive stress film 201 may be formed in the slits 310. Also in this case, the effect of reducing the gate leakage current may be obtained.
Fourth EmbodimentA fourth embodiment relates to a compound semiconductor device including an HEMT.
As illustrated in
Although a method of forming the tensile stress film 105 is not limited, the tensile stress film 105 may be sometimes formed under a condition in which damage to a layer thereunder is likely to occur. In the compound semiconductor device 100 according to the first embodiment, the object to be damaged is mainly the semiconductor laminate structure 102, whereas in the compound semiconductor device 400 according to the fourth embodiment, the object to be damaged is mainly the protective film 404. Therefore, the influence of damage to the channel may be reduced.
From another viewpoint, a film which is preferable in view of tensile stress but is not preferable in the first embodiment in view of the damage may be used as the tensile stress film 105. That is, it is possible to expand the range of types of film which may be suitably used for the tensile stress film 105.
The material of the protective film 404 is not limited. For example, silicon nitride, polyimide, or the like may be used for the protective film 404. When the Young's modulus of the protective film 404 is too high, tensile stress of the tensile stress film 105 becomes less likely to act on the channel. The Young's modulus of the protective film 404 is preferably 220 GPa or less, more preferably 200 GPa or less, and further preferably 100 GPa or less from the viewpoint of the influence of the tensile stress. The Young's modulus of silicon nitride is about 200 GPa, and the Young's modulus of polyimide is about 10 GPa to 100 GPa. It is preferable that the internal stress of the protective film 404 itself is smaller, and for example, the absolute value of the internal stress is preferably 300 MPa or less, regardless of whether the internal stress is tensile stress or compressive stress.
Experiments carried out by the present inventors have confirmed the following effects of the protective film. As a result of forming a laminate of a GaN layer and an AlGaN layer and measuring the mobility of the two-dimensional electron gas, a mobility of about 2200 cm2/V·s was obtained. When a tensile stress film was formed over the AlGaN layer without forming a protective film, the mobility was reduced to about 1000 m2/V·s to 1050 m2/V·s. In contrast, when a protective film was formed over the AlGaN layer and a tensile stress film was formed over the protective film, a mobility of about 2110 m2/V·s was obtained.
The protective film 404 may also be formed between the gate electrode 112g and the semiconductor laminate structure 102. In this configuration, a part of the protective film 404 may be used as a gate insulating film. According to this configuration, as compared with the configuration in which the gate insulating film is formed in addition to the protective film 404, the number of interfaces between films of different kinds in the vicinity of the gate electrode 112g is small, and therefore transient response due to interface trap may be reduced.
The protective film 404 may be included in the second embodiment and the third embodiment.
Fifth EmbodimentA fifth embodiment relates to a compound semiconductor device including an HEMT.
In a compound semiconductor device 500 according to the fifth embodiment, as illustrated in
According to the compound semiconductor device 500 of the fifth embodiment, the current density may be improved similarly to the compound semiconductor device 100.
In the second to fourth embodiments, the tensile stress film 105 may be formed not only between the gate electrode 112g and the drain electrode 111d but also between the gate electrode 112g and the source electrode 111s, and so forth.
Sixth EmbodimentA sixth embodiment relates to a compound semiconductor device including an HEMT.
As illustrated in
As illustrated in
In the second to fifth embodiment, the compressive stress film 605 may be formed instead of the tensile stress film 105.
Seventh EmbodimentA seventh embodiment relates to a manufacturing method for a compound semiconductor device including an HEMT.
First, as illustrated in
As the nucleation layer 2a, for example, an AlN layer is formed. As the buffer layer 2b, for example, an AlGaN layer is formed. As the electron transit layer 2c, for example, a GaN layer (i-GaN layer) not having undergone intentional doping with impurities is formed. As the intermediate layer 2d, for example, an AlN layer is formed. As the electron supply layer 2e, for example, an AlGaN layer is formed. As the cap layer 2f, for example, a GaN layer is formed.
For the formation of the semiconductor laminate structure 2, for example, a mixed gas of trimethylaluminum (TMA) gas serving as an Al source, a trimethylgallium (TMG) gas serving as a Ga source, and an ammonia (NH3) gas serving as a N source is used. At this time, whether or not to supply the trimethylaluminum gas and the trimethylgallium gas and the flow rate thereof are appropriately set in accordance with the composition of the compound semiconductor layer to be grown. The intermediate layer 2d between the electron transit layer 2c and the electron supply layer 2e may be formed if necessary. The cap layer 2f may be also formed if necessary.
Next, as illustrated in
Thereafter, as illustrated in
Subsequently, as illustrated in
Thereafter, as illustrated in
Subsequently, as illustrated in
Thereafter, as illustrated in
Thereafter, as illustrated in
Then, as illustrated in
Subsequently, as illustrated in
A portion that covers the regions where the slits 10 are to be defined may be provided in the resist pattern 51, and the slits 10 may be defined when forming the tensile stress film 5.
Subsequently, as illustrated in
Next, as illustrated in
Subsequently, as illustrated in
Thereafter, as illustrated in
Subsequently, as illustrated in
Then, a protective film and wiring are formed if necessary, and thus the compound semiconductor device is completed.
The formation of the protective film 4 may be omitted. The slits 10 may be defined so as to extend to the gate electrode 12g in the X direction. A compressive stress film may be formed in the slits 10. The tensile stress film 5 may be also formed between the source electrode 11s and the gate electrode 12g. A compressive stress film may be formed instead of the tensile stress film 5. In this case, tensile stress may be generated in the slits of the compressive stress film. The definition of the opening portion 6g may be omitted, and the gate electrode 112g may be formed so as to be in contact with the protective film 4.
Modification Example of Seventh EmbodimentA modification example of the seventh embodiment is different from the seventh embodiment in terms of a method of forming the gate electrode 12g.
In this modification example, first, as illustrated in
Thereafter, as illustrated in
Subsequently, as illustrated in
Then, a protective film and wiring are formed if necessary, and thus the compound semiconductor device is completed.
As illustrated in
Next, an eighth embodiment will be described. The eighth embodiment relates to a discrete package of an HEMT.
In the eighth embodiment, as illustrated in
For example, such a discrete package may be manufactured as follows. First, the compound semiconductor device 1210 is fixed to the land 1233 of a lead frame by using the die attaching agent 1234 such as solder. Next, via bonding using the wires 1235g, 1235d, and 1235s, the gate pad 1226g is coupled to the gate lead 1232g of the lead frame, the drain pad 1226d is coupled to the drain lead 1232d of the lead frame, and the source pad 1226s is coupled to the source lead 1232s of the lead frame. Then, sealing is performed by a transfer mold method using the mold resin 1231. Subsequently, the lead frame is cut off.
Ninth EmbodimentNext, a ninth embodiment will be described. The ninth embodiment relates to a power factor correction (PFC) circuit including an HEMT.
A PFC circuit 1250 includes a switch element (transistor) 1251, a diode 1252, a choke coil 1253, capacitors 1254 and 1255, a diode bridge 1256, and an alternate current power source (AC) 1257. A drain electrode of the switch element 1251 is coupled to an anode terminal of the diode 1252 and a first terminal of the choke coil 1253. A source electrode of the switch element 1251 is coupled to a first terminal of the capacitor 1254 and a first terminal of the capacitor 1255. A second terminal of the capacitor 1254 is coupled to a second terminal of the choke coil 1253. A second terminal of the capacitor 1255 is coupled to a cathode terminal of the diode 1252. A gate driver is coupled to a gate electrode of the switch element 1251. The AC 1257 is coupled to the first and second terminals of the capacitor 1254 with the diode bridge 1256 therebetween. A direct current power source (DC) is coupled to the first and second terminals of the capacitor 1255. In the present embodiment, a compound semiconductor device having a similar structure to any one of the first to sixth embodiments is used as the switch element 1251.
When manufacturing the PFC circuit 1250, for example, the switch element 1251 is coupled to the diode 1252, the choke coil 1253, and so forth by using solder.
Tenth EmbodimentNext, a tenth embodiment will be described. The tenth embodiment relates to a power source apparatus including an HEMT that is suitable for a server power source.
The power source apparatus includes a primary circuit 1261 of high voltage, a secondary circuit 1262 of low voltage, and a transformer 1263 provided between the primary circuit 1261 and the secondary circuit 1262.
The primary circuit 1261 includes the PFC circuit 1250 according to the ninth embodiment, and an inverter circuit coupled to the first and second terminals of the capacitor 1255 of the PFC circuit 1250, for example, a full-bridge inverter circuit 1260. The full-bridge inverter circuit 1260 includes a plurality of (in this case, four) switch elements 1264a, 1264b, 1264c, and 1264d.
The secondary circuit 1262 includes a plurality of (in this case, three) switch elements 1265a, 1265b, and 1265c.
In the present embodiment, compound semiconductor devices having a similar structure to any one of the first to sixth embodiments are used for the switch element 1251 of the PFC circuit 1250 constituting the primary circuit 1261 and the switch elements 1264a, 1264b, 1264c, and 1264d of the full-bridge inverter circuit 1260. In contrast, normal metal-insulator-semiconductor-type field effect transistors (MIS-FETs) formed from silicon are used for the switch elements 1265a, 1265b, and 1265c of the secondary circuit 1262.
Eleventh EmbodimentNext, an eleventh embodiment will be described. The eleventh embodiment relates to an amplifier including an HEMT.
The amplifier includes a digital predistortion circuit 1271, mixers 1272a and 1272b, and a power amplifier 1273.
The digital predistortion circuit 1271 compensates nonlinear distortion of an input signal. The mixer 1272a mixes the input signal whose nonlinear distortion has been compensated with an alternate current signal. The power amplifier 1273 includes a compound semiconductor device having a similar structure to any one of the first to sixth embodiments, and amplifies the input signal mixed with the alternate current signal. In the present embodiment, for example, by switching a switch, an output signal may be mixed with an alternate current signal in the mixer 1272b and transmitted to the digital predistortion circuit 1271. This amplifier may be used as a high-frequency amplifier or a high-output amplifier. The high-frequency amplifier may be used for, for example, a communication apparatus used in a mobile phone base station, a radar apparatus, and a microwave generation apparatus.
All examples and conditional language provided herein are intended for the pedagogical purposes of aiding the reader in understanding the invention and the concepts contributed by the inventor to further the art, and are not to be construed as limitations to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although one or more embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.
Claims
1. A compound semiconductor device comprising:
- a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from compound semiconductor;
- a source electrode, a gate electrode, and a drain electrode that are provided above the semiconductor laminate structure and arranged in a first direction; and
- a first insulating film having a first internal stress and formed over the semiconductor laminate structure and between the gate electrode and the drain electrode,
- wherein a slit extending in the first direction is defined in the first insulating film.
2. The compound semiconductor device according to claim 1, further comprising a second insulating film formed in the slit and having a second internal stress in a direction opposite to the first internal stress.
3. The compound semiconductor device according to claim 1, wherein the first internal stress is a tensile stress.
4. The compound semiconductor device according to claim 1, wherein the electron supply layer contains metal nitride, and 32% or more of metal atoms in the metal nitride are Al.
5. The compound semiconductor device according to claim 4, wherein 50% or more of the metal atoms in the metal nitride are Al.
6. The compound semiconductor device according to claim 4, wherein a thickness of the electron supply layer is 10 nm or less.
7. The compound semiconductor device according to claim 1, wherein the slit is spaced apart from the gate electrode in the first direction.
8. The compound semiconductor device according to claim 7, wherein the slit is spaced apart from the gate electrode by 0.2 μm or more in the first direction.
9. The compound semiconductor device according to claim 1, further comprising a protective film formed between the semiconductor laminate structure and the first insulating film.
10. The compound semiconductor device according to claim 9, wherein the protective film is also formed below the slit.
11. A manufacturing method for a compound semiconductor device, the manufacturing method comprising:
- forming a semiconductor laminate structure including an electron transit layer and an electron supply layer that are from compound semiconductor;
- forming a source electrode, a gate electrode, and a drain electrode arranged in a first direction above the semiconductor laminate structure; and
- forming, above the semiconductor laminate structure and between the gate electrode and the drain electrode, a first insulating film which has a first internal stress and in which a slit extending in the first direction is defined.
12. An amplifier comprising:
- a compensating circuit that compensates distortion of an input signal; and
- a compound semiconductor device including
- a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from compound semiconductor,
- a source electrode, a gate electrode, and a drain electrode that are provided above the semiconductor laminate structure and arranged in a first direction, and
- a first insulating film having a first internal stress and formed above the semiconductor laminate structure and between the gate electrode and the drain electrode,
- wherein a slit extending in the first direction is defined in the first insulating film.
Type: Application
Filed: Jan 31, 2020
Publication Date: Aug 6, 2020
Applicant: FUJITSU LIMITED (Kawasaki-shi)
Inventor: Kozo Makiyama (Kawasaki)
Application Number: 16/777,944