Abstract: The invention relates to a method of determining the flow characteristics of a multiphase fluid along a flow path. The method involves applying a primary magnetic field to the flow of fluid in order to align the nuclei of the flow with the direction of this magnetic field, imparting a radio frequency on the flow in order to excite its nuclei and receiving a radio frequency emitted by the excited nuclei in order to obtain a Nuclear Magnetic Resonance (NMR) signal alternating between a phase ratio mode and a phase flow mode. The phase ratio mode involves processing the received radio frequency in order to determine the ratio of one phase with respect to another phase in the flow. The phase flow mode involves applying a secondary magnetic field in the region of the fluid flow which varies in magnitude along the length of the fluid flow path in order to provide a variation in the magnetic field experienced by the nuclei of the fluid flow dependent upon their position along the fluid flow path.

Abstract: A novel spin resonance microscope is disclosed, the microscope design comprising an integrated evanescent wave probe and scanning tunneling microscope tip. The probe and tip may be either the same structure, or they may be separate structures. The integrated design allows for coherent excitation of precessing electron spin states in the sample such that spin resonance may be detected because the tunneling current is modulated by the spin resonance. Spin resonance may be affected by either adjacent nuclei, or by adjacent electrons. The present apparatus requires significantly reduced power inputs, such that the dead time of the system is short, and relaxation phenomena may be evaluated without swamping the instrument's electronics.

Abstract: The present invention generally relates to an apparatus and method for detecting the physical condition of a tubular. In one aspect, an apparatus for use in a tubular is provided. The apparatus includes a body and a drive member for urging the apparatus through the tubular. The apparatus further includes at least two independent caliper assemblies capable of generating data representative of an interior surface of the tubular, wherein each caliper assembly includes an independent force sensor with a sensing member operatively attached thereto. In another aspect, a method for obtaining data in a tubular is provided. In yet another aspect, an apparatus for collecting data in a tubular is provided.

Abstract: An electromagnetic prober comprising a transmission antenna, a reception antenna, a reception signal processing section for generating an analytic signal on the basis of a detection signal of the reception antenna, and an analytic processing section for performing a predefined analytic process on the basis of the analytic signal, wherein the analytic processing section divides the analytic signal into a plurality of time-based ranges and performs a predefined computation on average cycle periods in the respective time-based ranges of the analytic signal to calculate average dielectric constants in depth ranges of the medium corresponding to the respective time-based ranges.

Abstract: A preparative mass spectrometer system includes an ionizer which converts the mixture into gas phase ions of the molecules in the mixture, and a separator which separates the ions according to their mass to charge ratio or mobility. The separator is a linear ion trap mass analyzer that accumulates the ions based on their mass to charge ratio. A surface is in cooperative relationship with the separator so that the separated molecules are soft landed onto the surface at different locations such that the collected molecules can be stored or further processed/analyzed.

Abstract: A system and method is provided for monitoring the operating condition of a pump by evaluating fault data encoded in the instantaneous current of the motor driving the pump. The data is converted to a frequency spectrum which is analyzed to create a fault signature having fault attributes relating to various fault conditions associated with the pump. The fault signature is then input to a neural network that operates in conjunction with a preprocessing and post processing module to perform decisions and output those decisions to a user interface. A stand alone module is also provided that includes an adaptive preprocessing module, a one-shot unsupervised neural network and a fuzzy based expert system to provide a decision making module that operates with limited human supervision.

Abstract: In the measurement of partial discharge, a voltage detected by an antenna is input to a spectrum analyzer and a phase difference between an operating voltage and a power supply of the spectrum analyzer is obtained by phase domain analysis using the spectrum analyzer. Based on the phase difference and the voltage phase shift associated with the input impedance of a signal converter circuit, the time axis displayed on the screen of the spectrum analyzer is compensated. After the compensation has been carried out, the voltage detected by the antenna is input into the spectrum analyzer and the partial discharge pattern which synchronizes with the operating voltage is measured by phase domain analysis using the spectrum analyzer.

Abstract: A mobile platform is provided which has at least one component having an array of distributed piezoelectric transmitters and an associated array of distributed receivers. The receivers are configured to receive ultrasonic transmissions from the transmitters. Data from the receivers is stored in memory and processed through an algebraic reconstruction tomography algorithm which forms an image of the defect within the component. An algorithm is used to determine the position and size of the defect.

Abstract: A method and apparatus for measuring an electric field distribution according to the present invention calculates a distribution of electric field intensity and its direction at arbitrary positions on the surface of the electronic apparatus or its circumference with use of data of measurement positions and measurement results of a potential distribution on a surface of an electronic apparatus. Further, it clearly indicates a flow of electromagnetic energy on the surface or in the circumference of the electronic apparatus by applying mathematical treatments to a magnetic field distribution at circumferential positions of the electronic apparatus. Thus, a distribution of high-frequency electric field generated from the electronic apparatus is measured with high accuracy.

Abstract: A device is disclosed, comprising a microwave resonator, for or on a spinner preparation machine with drawing gear (2) for drawing fibre material (FB), in particular a carding, drawing or combing machine, whereby the resonator (30) is embodied for connection to a measuring device (16) for measuring the strip density (mass per unit length) or the strip thickness and/or the dampness of the fibre material (FB), continuously passing through the resonator chamber (31). Said device is characterized in that the resonator (30) is integrated in a functional group (20; 120; 220; 320; 420) of the spinner preparation machine which is typical for the machine. A spinner preparation machine, in particular a carding, drawing or combing machine, is further disclosed which comprises a corresponding device.

Abstract: One embodiment of the present invention comprises a sensor with a face having several tracks spaced apart from one another. One of these tracks has a first electrode and a second electrode separated by an electrically nonconductive gap. Also included is a detection device extending across the tracks to receive signals by capacitive coupling. Sensor circuitry electrically coupled to the tracks and the detection device is structured to generate a first number of bits from a sequential signal pattern applied to the tracks in accordance with an established sequence. The circuitry is also structured to generate a second number of bits as a function of a first signal and a second signal. The first bits and second bits represent a position of the detection device along the tracks with the first bits being more numerically significant than the second bits.

Abstract: One embodiment of the present invention comprises a sensor with a face having several tracks spaced apart from one another. One of these tracks has a first electrode and a second electrode separated by an electrically nonconductive gap. Also included is a detection device extending across the tracks to receive signals by capacitive coupling. Sensor circuitry electrically coupled to the tracks and the detection device is structured to generate a first number of bits from a sequential signal pattern applied to the tracks in accordance with an established sequence. The circuitry is also structured to generate a second number of bits as a function of a first signal and a second signal. The first bits and second bits represent a position of the detection device along the tracks with the first bits being more numerically significant than the second bits.

Abstract: A water supply for sanitary devices has a sensor, is activatable without contact, has a first capacitor with first and second conductive layers and a dielectric layer positioned there-between. A second capacitor having a first and second electrically conductive layers and a dielectric layer there-between. An AC voltage generator is electrically connected to the second layer of the first capacitor for coupling an AC voltage. The supply has a sensor amplifier for amplifying an output signal and the first layer is shared by the capacitors and has a shared absorption area. Upon approach or contact of an object or a liquid, an additional capacitor is formed whose effective capacitance experiences a detectable change that is tapped at the second layer.

Abstract: An apparatus, system and methods are provided for collecting information on the geographic positions of several moving or immobile objects simultaneously. A plurality of large scale printed circuits having charge transfer capacitance sensing properties are linked by a communication network in order to form a coherent sensing surface for the collection and reconnaissance of positioning and movement information. The positioning and movement information gathered can be used as input information by media control systems.

Abstract: A loop impedance meter for testing A.C. electrical mains supplies, comprises an electronic control circuit for connecting a load resistance intermittently between the A.C. mains supply terminal and the earth terminal to measure the potential difference between those terminals and to provide an indication of the loop impedance of the A.C. mains supply from that potential difference, wherein the value of the load resistance measured in ohms is in the range of one sixth to twice times the value of the r.m.s. mains voltage rating of the meter measured in volts, so as to deliver about ½ A to 6 A intermittent current flow.

Abstract: Novel structures and methods for evaluating lines in semiconductor integrated circuits. A first plurality of lines can be formed on a wafer each of which comprises multiple line sections. All the line sections are of the same length. The electrical resistances of the line sections are measured. Then, a first line geometry adjustment is determined based on the electrical resistances of all the sections of all the lines. The first line geometry adjustment represents an effective reduction of cross-section size of the lines due to grain boundary electrical resistance. A second plurality of lines of same length and thickness can be formed on the same wafer. Then, second and third line geometry adjustments can be determined based on the electrical resistances of these lines measured at different temperatures. The second and third line geometry adjustments represent an effective reduction of cross-section size of the lines due to grain boundary electrical resistance and line surface roughness.

Abstract: A flexible circuit includes a plurality of electrical traces and a plurality of probe tips directly formed thereto. The electrical traces are made of a first electrically conductive material and the probe tips are made of a second electrically conductive material that is harder than the first electrically conductive material. The first material is copper or a copper alloy and the second matieral is nickel or a nickel alloy, where the second material may be plated with gold. Portions of the probe tips are exposed to facilitate electrical contact with contact pads of another electrical circuit. The flexible circuit may also include a ground layer to facilitate electrical correction with another electrical circuit at relatively high frequencies.

Abstract: A method includes installing a device under test (DUT) into each of a plurality of burn-in boards. The method further includes docking each of the burn-in boards to a respective docking location, each of the burn-in boards with a single respective DUT installed therein. The method further includes subjecting the DUTs to a self-heating burn-in procedure while the burn-in boards are docked to the docking locations. Other embodiments are described and claimed.

Abstract: According to one embodiment of the invention, a method for probing a wafer includes positioning a testhead relative to a prober supporting a wafer in a testing position. The method also includes receiving at least one prober signal identifying the angular position of the prober and at least one testhead signal identifying the angular position of the testhead. The at least one prober signal and the at least one testhead signal are processed to determine if the testhead is substantially parallel with the prober, and output is provided to allow for adjustment of the position of the testhead in response to determining that the testhead is not substantially parallel with the prober.

Abstract: In one embodiment, a tester interface module for connecting a plurality of signal paths from at least one electronic assembly to at least one other electronic assembly is provided. The interface module includes a capture board having center conductor vias with center conductor holes extending through the capture board. Axial cables secured to the capture board have center conductors extending at least part way through a corresponding center conductor hole of the center conductor via. An interface component is adjacent to the capture board, the conductor paths being conductively bonded to the conductor vias of the capture board so as to electrically connect center conductors to corresponding conductor paths. The conductor paths of the interface component are arranged to allow connection with an electronic assembly.

Abstract: A semiconductor-device characteristic measurement apparatus includes first measuring means for measuring a first electrical characteristic of a device under test, second measuring means, switching means for switching between the first measuring means and the second measuring means such that one of the measuring means is connected to the device under test, and controlling means for controlling the switching means. The switching means includes switches that switch between a first wiring configuration for electrically connecting the first measuring means to the device under test and a second wiring configuration for electrically connecting the second measuring means to the device under test. The switching means is electrically connected to the device under test at a position closer to the device under test than the first measuring means and the second measuring means.

Abstract: A current measuring apparatus for measuring a power supply current received by an electronic device includes: a first current supplying unit for outputting a first current which is a part of the power supply current; a smoothing capacitor for smoothing the first current output by the first current supplying unit connected with one end thereof; a capacitor of device side for smoothing the power supply current, electrostatic capacity of the capacitor of device side being smaller than that of the smoothing capacitor and one end of the capacitor of device side being connected with the electronic device; a switch for making the first current flow from the smoothing capacitor to the capacitor of device side in case of being ON; a second current supplying unit for outputting a second current smaller than the first current to the capacitor of device side via a path parallel to the switch; and a power supply current acquiring unit for acquiring the power supply current on the basis of the second current output by the

Abstract: Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a transmitter die and a receiver die interconnected via one or more signal transmission lines. An ODT control system in accordance with one embodiment calibrates and maintains the termination resistances for the signal transmission lines. The ODT control system derives a number of calibration currents from precision voltage and resistance references and distributes the reference currents to a number of transmitters. Each transmitter then derives an ODT calibration signal using the respective reference current and another precision resistor, and then employs the calibration signal to calibrate local termination elements. Distributing calibrated currents provides excellent noise immunity, while limiting the requisite number of external voltage references reduces cost.

Abstract: An active SAN discovery system and method responds to events occurring in SAN by automatically broadcasting for information related to the occurred events and updating the SAN topology according to the collected information.

Abstract: An integrated circuit chip with a high area utilization rate includes: a plurality of logic circuits in a logic area; a first input and output circuit near a first side of the logic area for exchanging signals with the logic circuit; a second input and output circuit near a second side of the logic area for exchanging signals with the logic circuit; a plurality of first probe pads coupled to the first and the second input and output circuits for inputting or outputting signals to the first and the second input and output circuits; a corner cell comprising a plurality of wires coupled to the first and the second input and output circuits for exchanging signals between the first and the second input and output circuits; and a first process monitor circuit formed in the corner cell for monitoring a semiconductor process of the integrated circuit chip.

Abstract: A level shifter has a current mirror and a set of oppositely driven NMOS switch. A voltage holding module is added to help an output of the level shifter to work with a full-swing fashion. Additionally, a DC current switch is used to eliminate a DC current.

Abstract: In an output driver circuit and method, a control circuit generates a control signal in response to a current internal data signal. An output driver generates an output data signal in response to the control signal. A pre-emphasis circuit adjusts a current flowing through a node having the control signal generated thereon in response to a previous internal data signal. The pre-emphasis circuit may also adjust the output signal in response to the previous internal data signal.

Abstract: Disclosed is an output buffer circuit provided with a pre-emphasis function, including a first buffer circuit, receiving a first logic signal to drive a transmission line, and a second buffer circuit. The second buffer circuit includes an inverting buffer, receiving a second logic signal that is in a predetermined logical relationship with respect to the aforementioned first logic signal, and having outputs connected in common with an output of the aforementioned first buffer circuit, a first switch, connected across the inverting buffer and a first power supply, and controlled to be turned on or off based on a signal supplied to a control terminal, and a second switch, connected across the inverting buffer and a second power supply and controlled to be turned on or off based on a signal supplied to a control terminal in association operatively with the first switch.

Abstract: A circuit comprises an output terminal, an output driver for providing an output signal at the output terminal, a switching device for producing one or more connections of the output terminal to a respective fixed or variable potential, and a control device for controlling the switching device, the control device being designed to produce the connection or the connections in the event of a transition in the output signal from a first logic level to a second logic level and to disconnect it at the latest when the output signal attains the second level.

Abstract: In a band gap reference voltage circuit, a band gap cell circuit composed of two transistors is driven with different current densities under a bias condition in which first and second reference voltages output in accordance with the operating states of the two transistors are equal to each other, thereby outputting a band gap reference voltage from a reference voltage output line. A differential amplifying circuit that is supplied with the first and second reference voltages as differential input signals subjects the differential input signals thus supplied to differential amplification. A level shift circuit is connected between a power supply line and the reference voltage output line and supplied with an output voltage of the differential amplifying circuit to carry out a level shift operation on the output voltage concerned.

Abstract: Described are approaches to routing buffered reference clock signals to a plurality of input/output (I/O) cell instances on an integrated circuit (IC) die. All or a subset of the I/O cell instances include clock routing resources optimized to deliver high-speed, low jitter clock signals within and through the particular instance. The clock routing resources in physically adjacent instances of the input/output cells for a given IC die automatically interconnect, collectively forming clock routing infrastructure optimized for groups of cell instances. This modular approach to clock routing simplifies the task of combining I/O cell instances with other I/O cell instances and with other types of circuitry.

Abstract: A system and a method are presented for detecting the presence of at least one clock signal of a defined clock frequency applied to at least one input port of an integrated circuit system, wherein the a first number M of clock pulses related to the at least one clock signal within a predefined cycle period is counted and the counted first number M of clock pulses is compared with a reference number. Depending on the result of the comparison the presence of the at least one clock signal is detected or not.

Abstract: A semiconductor integrated circuit has: a differential amplifier circuit including a first MOS transistor connected between a first node and a common node and a second MOS transistor connected between a second node and the common node; a first current supply circuit configured to supply current to the first node; and a second current supply circuit configured to supply current to the second node. A current supply ability of the first current supply circuit is variable.

Abstract: The present invention provides a system for limiting energy levels across the output of a driver circuitry segment (100). The system provides an output structure (102) adapted to drive an output load (104). A transconductance component (106) is communicatively coupled to the output structure, and adapted to output a transconductance current that is proportional to the voltage across the output structure. A scaling component (108) is communicatively coupled to the output structure, and adapted to output a scaled current that is proportional, by some scaling factor, to the current through the output structure. A qualifying component (110) is communicatively coupled to the scaling component, and adapted to activate a trigger component (112) when the scaled current passes a first threshold. The trigger component is communicatively coupled to the qualifying component, the transconductance component, and the output structure.

Abstract: An input signal driving circuit includes first and second inverters that are connected in parallel between first and second reference voltages. The first and second inverters include first and second input terminals that are electrically connected together to define a common input terminal for the input signal. The first and second inverters also include first and second output terminals that are electrically connected together to define a common output terminal for an output signal. The first inverter has larger current driving capability than the second inverter. A feedback circuit is configured to feed back delayed versions of the output signal to the first and second inverters.

Abstract: Fine tuned signal phase adjustments are provided by multiple cascaded phase mixers. Each phase mixer outputs a signal having a phase between the phases of its two input signals. With each subsequent stage of phase mixers, the signals generated by the phase mixers have a smaller phase difference, thereby providing finer delay adjustments. Multiple stages of phase mixers can be provided in digital delay-locked loop circuitry to provide additional hierarchical delay adjustment.

Abstract: A PWM generator (100; 200; 300; 400) is described, which does not require a separate saw-tooth generator and a separator for generating a modulated pulsed signal. According to the invention, the input signal (Sin) is supplied to one input terminal (111) of a comparator (110), which receives at its other terminal (112) a feedback signal which is derived from the output signal (Sout) via an integrator device (150), in such a way that the circuit is self-oscillating. The feedback signal is a sloping signal. The comparator switches its output when the feedback signal crosses the level of the input signal, which in turn causes the feedback signal to invert its slope. Thus, the feedback signal in effect provides a saw-tooth signal without being generated by a separate saw-tooth generator.

Abstract: Techniques are presented for creating a second clock signal by using a first clock signal. For instance, an output is determined that corresponds to a phase relationship between the first and second clock signals. A value, corresponding to a given one of a plurality of delays, is selected based at least partially on the output. The given delay is created, by using the value, on the first clock signal to produce the second clock signal, whereby the given delay creates a phase shift between the first and second clock signals.

Abstract: A blender circuit configured to receive a first signal having a first signal phase and a second signal having a second signal phase. The first and second signals have a similar frequency and the first and second signal phases are separated by a time delay. The blender circuit includes a first, second and third circuits. The first circuit is configured to receive the first signal and to generate a plurality of first intermediate signals that are independent of the time delay between the first and second signals. The second circuit is configured to receive the second signal and to generate a plurality of second intermediate signals that are independent of the time delay between the first and second signals. The third circuit is configured to receive the first plurality and second plurality of intermediate signals and to generate plurality of out signals. Each of the plurality of out signals have different signal phases that are spaced in time relative to each other.

Abstract: A semiconductor device is disclosed. In one embodiment the semiconductor device includes a semiconductor body of which is integrated a temperature sensor for measuring the temperature prevailing in the semiconductor body. The temperature sensor has a MOS transistor and a bipolar transistor. The MOS transistor is integrated into the semiconductor body nd configured such that the substhreshold current intensity of the MOS transistor is proportional to the temperature to be measured. The subthreshold current of the MOS transistor is amplified by the bipolar transistor.

Abstract: Circuits, methods, and apparatus for using redundant circuitry on integrated circuits in order to increase manufacturing yields. One exemplary embodiment of the present invention provides a circuit configuration wherein functional circuit blocks in a group of circuit blocks are selected by multiplexers. Multiplexers at the input and output of the group of circuit blocks steer input and output signals to and from functional circuit blocks, avoiding circuit blocks found to be defective or nonfunctional. Multiple groups of these circuit blocks may be arranged in series and in parallel. Alternate multiplexer configurations may be used in order to provide a higher level of redundancy. Other embodiments use all functional circuit blocks and sort integrated circuits based on the level of functionality or performance. Other embodiments provide methods of testing integrated circuits having one or more of these circuit configurations.

Abstract: A well bias module outputs a voltage used to bias the wells of transistors or other semiconductor components. The well bias module includes a feedback loop having a voltage generation module and a subthreshold leakage sense module that is operable to model the transistors or other semiconductor components so as to sense the subthreshold leakage resulting from a particular well bias voltage output by the voltage generation module. The subthreshold leakage sense module provides a representation of the sensed subthreshold leakage to the voltage generation module, which adjusts the magnitude of the well bias voltage based on this representation so as to reduce or minimize the subthreshold leakage in the transistors or other semiconductor components.

Abstract: An improved on-chip voltage regulator providing improved reliability by eliminating voltage stresses on critical components, comprising, a reference-signal generating block providing a first-order temperature-compensated voltage-reference signal and a first-order temperature-compensated current-reference signal, an operational-amplifier block providing a regulated voltage, connected to the outputs of said reference signal generating block; a standby protection block receiving an external signal for enabling/disabling said reference-signal generating block and said operational-amplifier block, and; a protection voltage block connected to all said blocks; wherein critical elements of said blocks are connected such that voltage difference between any two terminals is always less than the break down voltage of said critical element.

Abstract: The invention provides an amplifying circuit for reducing electric power consumption at a standby mode time. Therefore, in DMOS and NMOS transistors constituting a cascode amplifier, the gate of the DMOS transistor of an initial stage is biased to a grounding voltage through a resistor, and the source of the DMOS transistor is connected to the output side of an inverter through an inductor. When a control signal is set to a level “H”, the output of the inverter becomes a level “L”, and the DMOS transistor attains a turning-on state and a sufficient operating electric current is flowed to the cascode amplifier. Thus, an input signal is amplified and is outputted as an output signal. In contrast to this, when the control signal is set to the level “L”, the output of the inverter becomes the level “H”, and the DMOS transistor attains a turning-off state and the operating electric current of the cascode amplifier is stopped.

Abstract: A bandgap reference circuit as may be used in ultra-low current applications is provided. An exemplary bandgap circuit can be configured to generate a positive temperature coefficient without the need for a resistor to offset a negative temperature coefficient. In accordance with an exemplary embodiment of the present invention, a bandgap circuit comprises a negative temperature coefficient generated from a junction device and a positive temperature coefficient generated from an FET-based device. An exemplary junction device can comprise a bipolar, junction diode or any other device for generating a negative temperature coefficient, while an exemplary FET-based device comprises a gate-drain connected device configured to provide a gate-source voltage having a positive temperature coefficient coupled in series with the bipolar device.

Abstract: An apparatus and method for providing a reference voltage for regulating voltage levels. The apparatus includes a first voltage generation system configured to receive a first control signal and output a calibration voltage, a voltage adjustment system configured to receive the calibration voltage and a reference voltage and output a second control signal, and a second voltage generation system configured to receive the second control signal and output the reference voltage. The voltage adjustment system includes a latch system configured to receive a third control signal and a fourth control signal and output the first control signal.

Abstract: A filter intended to receive a discrete time signal at a sampling dock frequency, comprising a determined number, greater than 2, of filtering units, each filtering unit comprising head capacitors in a number equal to the determined number, assembled in parallel between an input terminal and the terminal of an integration capacitor; and means for connecting, in successive dock cycles in a number equal to the determined number, successively each head capacitor to the input terminal, and for then simultaneously connecting the head capacitors to the integration capacitor, and in which the successive dock cycles during which the head capacitors of a filtering unit are connected to the input terminal are offset by one dock cycle from one filtering unit to the next one.

Abstract: The invention relates to a demodulator to demodulate frequency-modulated signals FM including a phase locked loop PLL including at least a phase detector, a loop filter and a voltage controlled oscillator function VCO?, characterized in that said voltage controlled oscillator function VCO? has modifiable gain. The invention allows to eliminate drawbacks presented by the conventional use of a complex gain modifiable amplifier at the input of demodulated signal processing means. Application: demodulation of modulated signals: wireless phone, home network.

Abstract: Operational amplifier circuits (20, 30) including error capacitors (C3, C13) for storing finite gain effect error voltages for correction of output voltages of the circuits (20, 30), are disclosed. The circuits (20, 30) are operated in a sample clock phase to produce an approximation of the output voltage, using negative polarity versions of the input voltages to the circuit. The approximate output voltage is used to produce and store an error voltage, corresponding to the differential voltage at the input of the operational amplifier (15, 25), relative to virtual ground. This error voltage is then subtracted from the input voltage applied in the operate clock phase, to correct for the finite gain effect. A pipelined analog-to-digital converter (50) using the disclosed operational amplifier circuits (20, 30) is also disclosed.

Abstract: A gain-controlled transimpedance amplifier circuit that comprises a first gain unit including an input for receiving a first current and an output, a current source for providing a second current, a second gain unit including an input and an output, a first impedance unit of a first impedance coupled in parallel with the second gain unit, and a comparator including an output, a first input coupled to the output of the first gain unit, and a second input coupled to the output of the second gain unit.