Abstract: A light-emitting device having an organic semiconductor layer and a control electrode electrically coupled to the semiconductor layer, the organic semiconductor layer being provided between a first electrode and an emission layer and having an absorption band within an emission wavelength band of the emission layer.

Abstract: An ambipolar, light-emitting transistor comprising an organic semiconductive layer in contact with an electron injecting electrode and a hole injecting electrode separated by a distance L defining the channel length of the transistor, in which the zone of the organic semiconductive layer from which the light is emitted is located more than L/10 away from both the electron as well as the hole injecting electrode.

Abstract: The invention relates to a process for producing doped organic semiconductor materials with an elevated charge carrier density and effective charge carrier mobility by doping, in which the doping agent is substantially produced by electrocrystallization in a first step, the doping agent is selected from a group of organic compounds with a low oxidation potential, and in which an organic semiconductor material is doped with the doping agent in a second step. Furthermore, the invention relates to doped organic semiconductor materials with an elevated charge carrier density and effective charge carrier mobility produced by the aforementioned process. Furthermore, the invention relates to an organic diode comprising doped organic semiconductor materials produced in accordance with the aforementioned process.

Abstract: In an organic light emitting display, the process of forming a storage capacitor is simplified, and deterioration of the properties and the reliability of the TFT is prevented. The organic light emitting display includes a substrate, a thin film transistor formed on one portion of the substrate, the thin film transistor having an active layer, a gate electrode, a gate insulating layer interposed between the active layer and the gate electrode, and a storage capacitor formed on another portion of the substrate. The storage capacitor has a first electrode formed on the same surface as the active layer, and a second electrode formed on the same surface as the gate electrode, with the gate insulating layer being interposed between the first electrode and the second electrode. The active layer and the first electrode are made of an intrinsic polysilicon layer.

Abstract: Disclosed is an organic electronic device, in which a semiconductor layer and source/drain electrodes may be formed from materials of the same type, suitable for a room-temperature wet process, and thus have surface properties similar to each other, thereby decreasing contact resistance between the semiconductor layer and the source/drain electrodes. The materials for formation of the semiconductor layer and source/drain electrodes may be organic semiconductor type materials obtained by adding carbon-based nanoparticles to organic semiconductor materials in predetermined or given amounts. As such, the conductivity of a semiconductor or conductor may vary depending on the amount of carbon-based nanoparticles.

Abstract: An organic memory device may include a stack of an organic material layer and a fullerene layer to provide a data storage element between first and second electrodes. The data storage element may include an organic material layer formed on the first electrode, and a fullerene layer between the organic material layer and the second electrode. Methods of fabricating organic memory devices are also discussed.

Abstract: A light emitting device of the present invention includes a first conductive film, a second conductive film, a half-etching hole, a light emitting element, through-hole electrodes, conductive metal layers, metallic wires and a transparent protective resin. The first conductive film is thick, and is provided on one main surface of an insulative substrate. The second conductive film is thin, and is provided on an opposite main surface of the insulative substrate. The half-etching hole is provided in the first conductive film. The through-hole electrodes connect the first conductive film with the second conductive film. Light emitted from the light emitting element is reflected by the conductive metal layer provided on a curved surface of the half-etching hole. Moreover, the conductive metal layers are bonded with the metallic wires, respectively.

Abstract: By providing a test structure for electromigration tests in semiconductor devices, which may indicate the status of a barrier layer at the bottom of a test via in the structure, a significantly increased reliability of respective electromigration tests may be obtained. Furthermore, the degree of porosity of the barrier layer may be estimated on the basis of the resulting test structure, which comprises a feed line having an increased probability for void formation compared to the test via, when a specific degree of porosity is created in the test via.

Abstract: A substrate inspection method allowing inspection of all a plurality of substrates each provided at its surface with a plurality of layers by determining quality of the plurality of layers as well as methods of manufacturing the substrate and an element using the substrate inspection method are provided. The substrate inspection method includes a step of preparing the substrate provided at its main surface with the plurality of layers, a film forming step, a local etching step, and an inspection step or a composition analysis step. In the step, a concavity is formed in a region provided with an epitaxial layer of the main surface of the substrate by removing at least partially the epitaxial layer. In the inspection step, the inspection is performed on the layer exposed in the concavity.

Abstract: A scanning head for an optical position-measuring system includes a receiver grating, formed of photosensitive areas, for the scanning of locally intensity-modulated light of differing wavelengths. The receiver grating is formed from a semiconductor layer stack of a doped p-layer, an intrinsic i-layer and a doped n-layer. The individual photosensitive areas have a first doped layer and at least a part of the intrinsic layer in common and are electrically separated from one another by interruptions in the second doped layer.

Abstract: A thin film transistor substrate and a method of manufacturing the thin film transistor substrate comprises forming a gate line and a data line intersecting each other with a gate insulating layer interposed and defining a pixel area on the substrate, a thin film transistor electrically connected to the gate line and the data line, and a stepped-structure occurring pattern overlapping at least one of the gate line and the data line; forming a passivation layer having a stepped-structure portion formed by the stepped-structure occurring pattern on the substrate; forming a photoresist pattern having a second stepped-structure portion corresponding to the stepped-structure portion on the passivation layer; patterning the passivation layer using the photoresist pattern as a mask; forming a transparent conductive layer on the substrate; and removing the photoresist pattern where the transparent conductive layer is covered by a stripper penetrating through the stepped-structure portion of the photoresist pattern an

Abstract: An electro-optical device includes pixel regions arranged at intersections of a plurality of data lines and a plurality of scanning lines on an element substrate. A sensor element, a sensor signal line for outputting a signal from the sensor element, and a common wiring line are disposed at an end of a region on the element substrate in which the pixel regions are arranged. A switching element is disposed between the sensor signal line and the common wiring line. A control wiring line for supplying a signal setting the switching element to be in a non-conducting state is disposed for the switching element.

Abstract: A structure for preventing deteriorations of a light-emitting device and retaining sufficient capacitor elements (condenser) required by each pixel is provided. A first passivation film, a second metal layer, a flattening film, a barrier film, and a third metal layer are stacked in this order over a transistor. A side face of a first opening provided with the flattening film is covered by the barrier film, a second opening is formed inside the first opening, and a third metal layer is connected to a semiconductor via the first opening and the second opening. A capacitor element that is formed of a lamination of a semiconductor of a transistor, a gate insulating film, a gate electrode, the first passivation film, and the second metal layer is provided.

Abstract: A semiconductor device includes an oxide semiconductor thin film layer of zinc oxide. The (002) lattice planes of at least a part of the oxide semiconductor thin film layer have a preferred orientation along a direction perpendicular to a substrate of the semiconductor device and a lattice spacing d002 of at least 2.619 ?.

Abstract: A liquid crystal display is provided. A liquid crystal display includes a first substrate having color filters therewith; a second substrate having plural first signal lines and plural second signal lines thereon; plural first openings located at intersections of said first signal lines and plural of second signal lines; and plural supports located at said plural first openings and between said first substrate and said second substrate, and separating said first substrate from said second substrate.

Abstract: A thin film transistor array panel including a substrate, a plurality of data lines disposed on the substrate, an interlayer insulating layer disposed on the data lines and including contact holes through which the data lines are exposed, a plurality of source electrodes, each of the source electrodes disposed on the interlayer insulating layer and connected to the data line through the contact hole, a plurality of pixel electrodes, each of the pixel electrodes disposed on the interlayer insulating layer and including a drain electrode that faces a source electrode, organic semiconductors disposed on and partially overlapping the source electrodes and the drain electrodes, a gate insulating layer disposed on the organic semiconductors and gate lines disposed on the gate insulating layer and including gate electrodes overlapping the organic semiconductors.

Abstract: An object is to provide a light-emitting element having high light extraction efficiency. Further, an object is to provide a light-emitting element and a display device having high luminance and low power consumption. A light-emitting element of the present invention includes a light-emitting layer interposed between a first and second electrodes. The light-emitting element further includes at least a dielectric layer which is interposed between the first and light-emitting layer, and light-scattering fine particles are dispersed in the dielectric layer. Light emitted from the light-emitting layer is extracted to the outside through the first electrode.

Abstract: The process relates to the production of a layer of a single-crystal first material on a second material. The second material has at least one aperture exposing a surface portion of a single-crystal third material. The process generally includes forming an at least partially crystalline first layer of said first material on said surface portion of the third material. Then, an amorphous or partially crystalline second layer of the first material is formed on the at least partially crystalline first layer of the first material and on one part of the second material that is around said aperture. Finally, the process includes recrystallization annealing of the first material. Thus, it is possible to produce, within one and the same wafer, either transistors on a germanium-on-insulator substrate with transistors on a silicon-on-insulator substrate, or transistors on a germanium-on-insulator substrate with transistors on a silicon substrate.

Abstract: A thin film transistor (“TFT”) includes a poly silicon layer formed on a flexible substrate and including a source region, a drain region, and a channel region, and a gate stack formed on the channel region of the poly silicon layer, wherein the gate stack includes first and second gate stacks, and a region of the poly silicon layer between the first and second gate stacks is an off-set region. A method of manufacturing the TFT is also provided.

Abstract: A light emitting diode is disclosed. The light emitting diode includes a substrate, a thermal spreading layer disposed on the bottom of the substrate, a soldering layer disposed on the bottom of the thermal spreading layer, a barrier layer disposed between the thermal spreading layer and the soldering layer, and a light emitting layer disposed on top of the substrate.

Abstract: Disclosed are a thin film transistor substrate where barrier metal can be omitted to be formed between a semiconductor layer of a thin film transistor and source and drain electrodes (barrier metal need not be formed between the semiconductor layer of the thin film transistor and the source and drain electrodes), and a display device. (1) A thin film transistor substrate has a semiconductor layer of a thin film transistor, a source electrode, a drain electrode, and a transparent conductive film, wherein the substrate has a structure in which the source and drain electrodes are directly connected to the semiconductor layer of the thin film transistor, and the source and drain electrodes include an Al alloy thin film containing Ni of 0.1 to 6.0 atomic percent, La of 0.1 to 1.0 atomic percent, and Si of 0.1 to 1.5 atomic percent. (2) A display device has the thin film transistor substrate.

Abstract: A light emitting device including a thin film transistor and an inorganic EL element, and a manufacturing method thereof. The present invention provides a manufacturing method of a light emitting device, including a step of forming a light emitting layer including at least a layer made from an inorganic fluorescent material over a first electrode while heating a substrate provided with the first electrode at a temperature in the range of 100 to 1200° C., preferably 200 to 800° C., and a step of forming a second electrode and a thin film transistor after the light emitting layer is formed.

Abstract: A nitride-based semiconductor LED comprises an anode; a first p-type clad layer having a second n-type clad layer coming in contact with the anode, the first p-type clad layer being formed under the anode such that a portion of the first p-type clad layer comes in contact with the anode; an active layer formed under the first p-type clad layer; a first n-type clad layer having a second p-type clad layer which does not come in contact with the active layer, the first n-type clad layer being formed on the entire lower surface of the active layer; and a cathode formed under the first n-type clad layer and the second p-type clad layer so as to come in contact with a portion of the first n-type clad layer and the second p-type clad layer.

Abstract: A package module of a light emitting diode includes a substrate, a first light emitting diode and a transistor. The first light emitting diode is disposed on the substrate, and the transistor is electrically connected with the first light emitting diode. The transistor is disposed on the substrate and turns on or off the first light emitting diode. The first light emitting diode and the transistor are disposed in a same package.

Abstract: An electronic device made by a process that includes forming a first layer over a substrate and placing a first liquid composition over a first portion of the first layer. The first liquid composition includes at least a first guest material and a first liquid medium. The first liquid composition comes in contact with the first layer and a substantial amount of the first guest material intermixes with the first layer. An electronic device includes a substrate and a continuous first layer overlying the substrate. The continuous layer includes a first portion in which an electronic component lies and a second portion where no electronic component lies. The first portion is at least 30 nm thick and includes a first guest material, and the second portion is no more than 40 nm thick.

Abstract: There is provided a semiconductor light emitting device which can prevent flickering in illumination due to an alternative current drive, and sensing incongruity at a time of turning off a switch, by providing anti-flickering means in itself, when it is assembled in an illumination device without any extra parts therein. A plurality of light emitting units (1) are formed, by forming a semiconductor lamination portion (17) by laminating semiconductor layers on a substrate (11) so as to form a light emitting layer, by electrically separating the semiconductor lamination portion (17) into a plurality of units, and by providing a pair of electrodes (19) and (20). The light emitting units (1) are respectively connected in series and/or parallel with a wiring film (3).

Abstract: A lighting device, comprising a first group of solid state light emitters and a first group of lumiphors, wherein at least some of the first group of solid state light emitters are contained in a first group of packages, each of which also comprises at least one of the first group of lumiphors. If all of the first group of solid state light emitters which are contained in the first group of packages are illuminated and/or if current is supplied to a power line, (1) a combined illumination from the first group of packages would, in the absence of any additional light, have color coordinates on a 1976 CIE Chromaticity Diagram which define a first point, and (2) at least 20% of the packages would emit light having color coordinates spaced from the first point. Also, methods of lighting.

Abstract: Methods and systems relating to solid state light sources for use in industrial processes.

Abstract: A light emitting diode array in which, when viewed from the above, the shape of an almost square light emitting diode is square-chamfered or round-chamfered at the corners thereof in order to minimize light leakage at a reverse mesa surface to allow an electrode layer to surround the three directions of a light emitting unit, and part in the vicinity of the corner of the reverse mesa surface is extended up to a substrate unit to cover it. Accordingly, the light emitting diode array minimized in light leakage at the reverse mesa surface can be provided.

Abstract: A vertical light-emitting diode (VLED) structure that may impart increased luminous efficiency over conventional LEDs and VLEDs is described. As additional benefits, some embodiments may have less susceptibility to electrostatic discharge (ESD) and higher manufacturing yields than conventional devices. To accomplish these benefits, embodiment of the invention may utilize a spacer or other means to separate the p-doped layer from the active layer, thereby increasing the distance between the active layer and the reflective layer within the VLED structure.

Abstract: A field effect transistor includes a nitride semiconductor layered structure that is formed on a substrate and includes a capping layer made of a compound represented by a general formula of InxAlyGa1-yN (wherein 0<x?1, 0?y <1 and 0<x+y?1). A non-alloy source electrode and a non-alloy drain electrode are formed on the capping layer so as to be spaced from each other.

Abstract: A thin-film LED comprising an active layer (7) made of a nitride compound semiconductor, which emits electromagnetic radiation (19) in a main radiation direction (15). A current expansion layer (9) is disposed downstream of the active layer (7) in the main radiation direction (15) and is made of a first nitride compound semiconductor material. The radiation emitted in the main radiation direction (15) is coupled out through a main area (14), and a first contact layer (11, 12, 13) is arranged on the main area (14). The transverse conductivity of the current expansion layer (9) is increased by formation of a two-dimensional electron gas or hole gas. The two-dimensional electron gas or hole gas is advantageously formed by embedding at least one layer (10) made of a second nitride compound semiconductor material in the current expansion layer (9).

Abstract: A Group III nitride semiconductor light-emitting device includes a stacked structure 11 formed on a crystal substrate (100) to be removed from it and including two Group III nitride semiconductor layers 104 and 106 having different electric conductive types and a light-emitting layer 105 which is stacked between the two Group III nitride semiconductor layers and which includes a Group III nitride semiconductor, and a plate body 111 made of material different from that of the crystal substrate and formed on a surface of an uppermost layer which is opposite from the crystal substrate that is removed from the stacked structure.

Abstract: The present invention provides in one embodiment a light emitting device that has a high efficacy even in a range of low color temperatures, a long-term reliability, and an improved color rendering property. In addition, the present invention provides in another embodiment a lighting apparatus using such a light emitting device. In the light emitting device, a mixture of a first phosphor material that emits yellow green, yellow or yellow orange light and a second phosphor material that emits light having a longer wavelength than the first phosphor material, for example, yellow orange or orange light is used as a phosphor. The first phosphor material is represented by a general formula Cax(Si, Al)12(O, N)16:EuY2+ and a main phase thereof has an alpha-SiAlON crystal structure.

Abstract: A method for producing a light-emitting device comprising: a step of electrically connecting a first electrode provided on one main surface of a semiconductor substrate (element substrate) through a light-emitting layer, and a first lead of a lead frame, so as to oppose each other; a step of electrically connecting a second electrode provided on the rear surface of a surface provided with the light-emitting layer of said element substrate, and a second lead of the above-described lead frame; a step of encapsulating a connecting part of said first electrode and said first lead, and said second electrode, and an electrode part of the second lead, with a transparent resin; and a step of producing a discrete edge by cutting said first lead and the second lead from said lead frame; wherein a film of joining material (joining material film) made of an alloy or a single metal, is formed on the first electrode of said light-emitting element, and a pattern to reduce spreading of said joining material is formed on an e

Abstract: A packaged light emitting device includes a substrate, a solid state light emitting device on the substrate, a first generally toroidal lens on the substrate and defining a cavity relative to the solid state light emitting device and having a first index of refraction, and a second lens at least partially within the cavity formed by the first lens and having a second index of refraction that is different from the first index of refraction. The second index of refraction may be higher than the first index of refraction. The lenses may be mounted on the substrate and/or may formed by dispensing and curing liquid encapsulant materials.

Abstract: There is provided a method that allows fabrication, through a simple process, of a good quality semiconductor light emitting device having a semiconductor light emitting element surrounded and thus covered with a fluorescent layer formed of resin uniform in thickness. At least two semiconductor light emitting elements are bonded to a substrate with a predetermined interval. Subsequently a first resin serving as a fluorescent layer is molded across the entire surface of the substrate substantially parallel to the top surface of the semiconductor light emitting element to cover the semiconductor light emitting element. After the first resin is cured, the first resin is at least partially diced.

Abstract: The invention relates to a semiconductor component comprising a buried temporarily n-doped area (9), which is effective only in the event of turn-off from the conducting to the blocking state of the semiconductor component and prevents chopping of the tail current in order thus to improve the turn-off softness. Said temporarily effective area is created by implantation of K centers (10).

Abstract: In one embodiment, the present invention includes an apparatus having a protection circuit to provide protection from transient surges. The protection circuit may include a silicon controlled rectifier (SCR) that is formed on a substrate via a planar process, along with one or more circuits to be protected by the protection circuit.

Abstract: The present invention provides a technology for reducing the parasitic inductance of the main circuit of a power source unit. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETS, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.

Abstract: The present invention provides semiconductor structures and a method of fabricating such structures for application of MOSFET devices. The semiconductor structures are fabricated in such a way so that the layer structure in the regions of the wafer where n-MOSFETs are fabricated is different from the layer structure in regions of the wafers where p-MOSFETs are fabricated. The structures are fabricated by first forming a damaged region with a surface of a Si-containing substrate by ion implanting of a light atom such as He. A strained SiGe alloy is then formed on the Si-containing substrate containing the damaged region. An annealing step is then employed to cause substantial relaxation of the strained SiGe alloy via a defect initiated strain relaxation. Next, a strained semiconductor cap such as strained Si is formed on the relaxed SiGe alloy.

Abstract: A method of fabricating AlGaN/GaN enhancement-mode heterostructure field-effect transistors (HFET) using fluorine-based plasma immersion or ion implantation. The method includes: 1) generating gate patterns; 2) exposing the AlGaN/GaN heterostructure in the gate region to fluorine-based plasma treatment with photoresist as the treatment mask in a self-aligned manner; 3) depositing the gate metal to the plasma treated AlGaN/GaN heterostructure surface; 4) lifting off the metal except the gate electrode; and 5) high temperature post-gate annealing of the sample. This method can be used to shift the threshold voltage of a HFET toward a more positive value, and ultimately convert a depletion-mode HFET to an enhancement-mode HFET (E-HFET).

Abstract: The invention relates to a transistor structure with both enhancement and depletion mode transistors. In order to allow good control over the manufacture of both transistors, a first Schottky layer (10) and a second Schottky layer (12) are used made of first and second semiconductor materials respectively. The first and second materials having band gaps of at least 0.5V. For an n-type transistor the second Schottky layer has a low conduction band discontinuity with the first Schottky layer. Both the first and the second Schottky layers are used as etch stops in the method for making the transistor. The transistor is preferably a HEMT.

Abstract: A compound field effect transistor having multiple pinch-off voltages comprising: first and second field effect transistors, each field effect transistor comprising a semiconductor layer, the semiconductor layer having an electrically conducting layer therein; an ohmic contact layer on the semiconductor layer; a source and a drain on the ohmic contact layer; at least one gate on the semiconductor layer between source and drain; at least one gate of the first transistor and one gate of the second transistor being matched gates, each gate having the same effective thickness of electrically conducting layer beneath it but the gates having different gate lengths.

Abstract: There is provided a normally-off type transistor made of a nitride semiconductor. The transistor includes: an undoped GaN layer which forms a channel region; an undoped Al0.2Ga0.8N layer which is formed on the undoped GaN layer and has a band gap larger than that of the undoped GaN layer; a p-type Al0.2Ga0.8N control layer which is formed on the undoped Al0.2Ga0.8N layer, has a p-type conductivity and forms a control region; an Ni gate electrode which contacts with the p-type Al0.2Ga0.8N control layer; a Ti/Al source electrode and a Ti/Al drain electrode which are formed beside the p-type Al0.2Ga0.8N control layer; and an Ni ohmic electrode which is connected to the undoped GaN layer and serves as a hole absorbing electrode. With this transistor, it is possible to achieve a large-current operation and a high switching speed.

Abstract: In relation to the conventional semiconductor device provided with a plurality of FETS, there is room for improving the pair accuracy of the FET-pair. A semiconductor device includes a first FET, a second FET, a third FET and a fourth FET. The four FETs are provided in an active region (certain region). The four have each of gate electrodes, respectively. Each of the gate electrodes are arranged along a circle in this sequence in plan view. The four FETs have the substantially same geometry.

Abstract: An epitaxial layers structure and a method for fabricating HBTs and HEMTs on a common substrate are disclosed. The epitaxial layers comprise generally a set of HBT layers on the top of a set of HEMT layers. The method can be used to fabricate HBT, E-mode HEMT and D-mode HEMT as well as passive devices, that enabling monolithic integration of a significant number of devices on a common substrate by a cost-effective way.

Abstract: A method of forming an integrated circuit transistor (50). The method provides a first semiconductor region (52) and forms (110) a gate structure (54x) in a fixed position relative to the first semiconductor region. The gate structure has a first sidewall and a second sidewall (59x). The method also forms at least a first layer (58x, 60x) adjacent the first sidewall and the second sidewall. The method also forms (120) at least one recess (62x) in the first semiconductor region and extending laterally outward from the gate structure. Additional steps in the method are first, oxidizing (130) the at least one recess such that an oxidized material is formed therein, second, stripping (140) at least a portion of the oxidized material, and third, forming (160) a second semiconductor region (66x) in the at least one recess.

Abstract: A cell based integrated circuit chip includes a top voltage supply rail and a bottom voltage supply rail and a plurality of metal layers defining at least one filler cell. The filler cell is formed by a first field effect transistor of a first type conductivity, typically an n-channel MOSFET. The source or drain electrodes of the n-channel MOSFET are arranged to as act as a capacitor with respect to the bottom voltage supply rail and to which at least one of the source and drain electrodes is connected. A second field effect transistor of an opposite-type conductivity to the first field effect transistor, typically a p-channel MOSFET, is also provided. The source or drain electrodes of the p-channel MOSFET are connected in series between the top voltage supply rail and a gate electrode of the n-channel MOSFET. The gate electrode of the p-channel MOSFET is connected to a source of ground potential via a resistor.

Abstract: Strands of active electronic devices (AEDs), such as FETs, are made by first completely or partially forming a plurality of the AEDs on a precursor substrate. Then, one or more elongate conductors (e.g., wires) are secured to ones of the AEDs so as to electrically connected the AEDs together. After securing the conductor(s) to corresponding respective ones of the AEDs, the connected ones of the AEDs and their respective conductor(s) is/are liberated as one or more composite members from the precursor substrate by removing material from the substrate. Each of the composite substrates is further processed as needed to complete an AED strand.