Abstract: The invention relates to a method for determining lens errors in a Scanning Electron Microscope, more specifically to a sample that enables such lens errors to be determined. The invention describes, for example, the use of cubic MgO crystals which are relatively easy to produce as so-called ‘self-assembling’ crystals on a silicon wafer. Such crystals have almost ideal angles and edges. Even in the presence of lens errors this may give a clear impression of the situation if no lens errors are present. This enables a good reconstruction to be made of the cross-section of the beam in different under- and over-focus planes. The lens errors can then be determined on the basis of this reconstruction, whereupon they can be corrected by means of a corrector.

Abstract: Ion sources, systems and methods are disclosed.

Abstract: A heat capacitor for a capillary aerosol generator comprises a phase change material that changes phases at a temperature approximately equal to a temperature sufficient to volatilize liquid material in a capillary passage of the capillary aerosol generator. The phase change material stores heat, which can be used to generate aerosol either continuously or intermittently over a given time. The use of stored heat in the phase change material to generate aerosol over time enables operation of the capillary aerosol generator remote from a large energy source.

Abstract: Monotomic dopant ions for ion implantation are supplied from vapour of a species containing plural atoms of the desired dopant. The vapour is fed to a plasma chamber and a plasma produced in the chamber with sufficient energy density to disassociate the vapour species to produce monatomic dopant ions in the plasma for implantation.

Abstract: A processing apparatus uses a focused charged particle beam to process a micro sample that is supported on a micro mount part. The micro mount part is supported on a micro sample stage and locally cooled by a cooling unit. The micro mount part is thermally independent of the micro sample stage and, due to its small size, can be cooled rapidly by the cooling unit.

Abstract: A dosing film for measuring ultraviolet rays and/or electron beams, formed of a radiation-sensitive layer having covering films on both sides.

Abstract: A method and apparatus for using one particle out of N particles for irradiating or investigating a target are provided. A radiation source with N incoherent emitters emits a radiation, and particles of said radiation are detected by using at least N?1 detectors located at N?1 different positions. A discriminator is adapted for identifying particle detection events on at least N?1 detectors within a predetermined time period from other particle detection events.

Abstract: A cleaning arrangement is provided for use in an EUV lithographic apparatus, for example an EUV lithographic apparatus with a Sn source. The cleaning arrangement includes a gas source for a hydrogen containing gas and a hydrogen radical source. The hydrogen radical source is a source of (UV) radiation which induces photo dissociation of the hydrogen. Radicals may reduce Sn oxides (if present) and my form volatile hydrides of Sn deposition and/or carbon deposition. In this way the cleaning arrangement can be used to clean optical elements from Sn and/or C deposition. The EUV source may be used as hydrogen radical source. An optical filter is used to remove undesired EUV radiation and transmit desired UV radiation.

Abstract: A method for identifying a drifted dose integrator in an implantation system and an implantation system are provided. The implantation system includes a first dose integrator and a second dose integrator. The first dose integrator includes a first input configured to receive a first current generated from charges carried by implanted ions in a wafer, and a first output configured to output a first accumulated dosage value. The second dose integrator includes a second dose integrator including a second input configured to receive a second current generated from the charges carried by the implanted ions in the wafer, and a second output configured to output a second accumulated dosage value. The implantation system further includes a processing unit comparing the first accumulated dosage value and the second accumulated dosage value to detect a drift in one of the first and the second dose integrators.

Abstract: An ion beam blocking component suitable for blocking an ion beam generated by an ion source of an ion implanter is provided. The blocking component includes a front plate, a back plate, and a plurality of side plates. The front plate has at least one opening. The back plate is behind the front plate, and has a plurality of grooves formed on one surface thereof facing the front plate. The side plates are connected between the front plate and the back plate, and a receiving space is formed between these plates.

Abstract: An electron beam irradiating apparatus includes a chamber being kept under vacuum, and housing a planar electron emitting element and a positioning unit and an object to be irradiated is directly irradiated with an electron beam emitted from the element. The planar electron emitting element includes: an emitter portion composed of a dielectric material; and a first electrode and a second electrode applied with a driving voltage for emitting electrons, and the first electrode is formed on a first surface of the emitter portion and has a plurality of through-holes where the emitter portion is exposed, a surface of the first electrode facing to the emitter portion around the through-holes is separated from the emitter portion, and the electron beam is emitted from the first surface of the emitter portion through the through-holes.

Abstract: A light source apparatus for generating a plasma and supplying a light irradiated from the plasma to an optical system, said light source apparatus includes a chamber for accommodating a region that generates the plasma, wherein a density of a hydrocarbon compound included in a gas in the chamber is 300 ppb or less.

Abstract: A lighthead for a dual-mode searchlight including a generally concave housing with an attached infrared (IR) light source assembly, an insulating barrier and air gap between the visible and IR portions of the assembly, and a reflector integral to the housing.

Abstract: A radiation source is disclosed that includes an anode and a cathode that are configured and arranged to create a discharge in a substance in a discharge space between the anode and the cathode and to form a plasma so as to generate electromagnetic radiation, the anode and the cathode being rotatably mounted around an axis of rotation, the cathode being arranged to hold a liquid metal. The radiation source further includes an activation source arranged to direct an energy beam onto the liquid metal so as to vaporize part of the liquid metal and a liquid metal provider arranged to supply additional liquid metal so as to compensate for the vaporized part of the liquid metal.

Abstract: A radiation source with an anode and a cathode to create a discharge in a discharge space between the anode and the cathode is disclosed. A plasma is formed in the radiation source which generates electromagnetic radiation, such as EUV radiation. The radiation source includes a first activation source to direct a first energy pulse onto a first spot in the radiation source near the discharge space to create a main plasma channel which triggers the discharge. The radiation source also has a second activation source to direct a second energy pulse onto a second spot in the radiation source near the discharge space to create an additional plasma channel. By directing the second energy pulse during the same discharge, a shortcutting of the main plasma current is realized which in turn may reduce the amount of fast ions produced.

Abstract: Certain exemplary embodiments of the present invention comprise a device comprising a cast computed-tomography collimator descended from a lithographically-derived micro-machined metallic foil stack lamination mold. Certain exemplary embodiments of the present invention comprise a method comprising filling a mold having a stacked plurality of micro-machined metallic foil layers with a first casting material to form a first cast product; demolding the first cast product from the mold; filling the first cast product with a second casting material to form a cast computed-tomography collimator; and demolding the cast computed-tomography collimator from the first cast product. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. This abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: Disclosed is a fire-resistant lead-free shield material having high shielding ability against nuclear or electromagnetic radiation, and excellent bending workability and handling performance. The shield material comprises a composite material consisting of an organic material and a metal or metal compound having a nuclear or electromagnetic radiation-shielding ability. The composite material is formed into a given shape, such as a plate shape, and wrapped with a cloth-like sheet formed of glass fibers, metal fibers or carbon fibers. Alternatively, the shield material comprises a shielding element consisting of an elastic polymeric organic compound and a particle having a nuclear or electromagnetic radiation-shielding ability, such a heavy metal or ferrite.

Abstract: Apparatus and methods for performing quantum computations are disclosed. Such apparatus and methods may include identifying a first quantum state of a lattice having a system of quasi-particles disposed thereon, moving the quasi-particles within the lattice according to at least one predefined rule, identifying a second quantum state of the lattice after the quasi-particles have been moved, and determining a computational result based on the second quantum state of the lattice. A topological quantum computer encodes information in the configurations of different braids. The computer physically weaves braids in the 2D+1 space-time of the lattice, and uses this braiding to carry out calculations. A pair of quasi-particles, such as non-abelian anyons, can be moved around each other in a braid-like path. The quasi-particles can be moved as a result of a magnetic or optical field being applied to them, for example.

Abstract: A gallium nitride-based device has a first GaN layer and a type II quantum well active region over the GaN layer. The type II quantum well active region comprises at least one InGaN layer and at least one GaNAs layer comprising 1.5 to 8% As concentration. The type II quantum well emits in the 400 to 700 nm region with reduced polarization affect.

Abstract: A flat panel display apparatus includes a gate insulating layer having openings which define pixels. The flat panel display apparatus includes: a substrate; a source electrode and a drain electrode formed on the substrate; a semiconductor layer contacting the source electrode and the drain electrode; a gate formed on the substrate; an insulating layer formed between the source and drain electrodes and the gate, and including an opening; and a pixel electrode partially exposed by the opening of the insulating layer. The insulating layer acts as a gate insulating layer and a pixel definition layer defining the pixel electrode.

Abstract: Provided is a multicolor organic light emitting apparatus having a plurality of organic light emitting devices formed on a substrate, for emitting two or more types of luminescent colors. A thickness of a layer formed between a light emitting layer and a reflection surface of a cathode is the same as that of each of first and second organic light emitting devices, and an optical distance between a light emitting surface of each of the light emitting layers and the reflection surface of the cathode is adjusted such that each thickness of the light emitting layers is varied to enhance light emitted from the light emitting layers by optical interference.

Abstract: The present invention concerns a thin-film encapsulation structure for electronic devices with organic substances, especially OLEDs or other organic optoelectronic devices as well as corresponding components and a process for the production with a primary, inorganic barrier layer (5), which is directly arranged on the device or the surface to be encapsulated; a planarization layer (6) arranged on the primary, inorganic barrier layer, the thickness of said planarization layer selected such that it is thicker than the simple value of the distance between highest peak and deepest valley of the surface of the primary barrier layer or the surface of the device under the primary barrier layer or the surface to be encapsulated, as well as a secondary barrier layer (14) arranged on the planarization layer.

Abstract: A solid-state imaging device, a line sensor and an optical sensor for enhancing a wide dynamic range while keeping high sensitivity with a high S/N ratio, and a method of operating a solid-state imaging device for enhancing a wide dynamic range while keeping high sensitivity with a high S/N ratio are provided. The solid-state imaging device comprises an integrated array of a plurality of pixels, each of which comprises a photodiode PD for receiving light and generating photoelectric charges, a transfer transistor Tr1 for transferring the photoelectric charges, and a storage capacitor element C connected to the photodiode PD at least through the transfer transistor Tr1 for accumulating, at least through the transfer transistor Tr1, the photoelectric charge overflowing from the photodiode PD during accumulating operation.

Abstract: In an element for a MOS type solid-state imaging device, a leakage current caused by a stress generated in a vicinity of an element isolation region having an STI structure is reduced. The element for the MOS type solid-state imaging device comprises: a signal accumulation region 102, of a second conductivity type, provided in an interior of a semiconductor substrate or well 101 of a first conductivity type, for accumulating a signal charge generated by performing photoelectric convention; a gate electrode 104 provided on the semiconductor substrate or well 101; a drain region 105, of a second conductivity type, provided on a surface portion, of the semiconductor substrate or well 101, on which the gate electrode is formed; and an element isolation region 201 provided on the surface portion, of the semiconductor substrate or well 101, on which the gate electrode is formed. The element isolation region 201 has the STI structure, and a cavity 202 is formed in an interior of the element isolation region 201.

Abstract: A method comprises forming a material over a substrate and patterning the material to remove portions of the material and expose an underlying portion of the substrate. The method further includes performing an oxidation process to form an oxide layer over the exposed portion of the substrate and at an interface between the material and the substrate. A circuit comprises a non-critical device and an oxide formed as part of this non-critical device. A high-K dielectric material is formed over a substrate as part of the critical device within the circuit. An oxide based interface is provided between the high-K dielectric material and an underlying substrate. A second method forms a nitride or oxynitride as the first material.

Abstract: Plurality of pixels (102) are arranged on the substrate. Each of the pixels (102) is provided with an EL element which utilizes as a cathode a pixel electrode (105) connected to a current control TFT (104). On a counter substrate (110), a light shielding film (112) is disposed at the position corresponding to periphery of each pixel (102), while a color filter (113) is disposed at the position corresponding to each of the pixels (102). This light shielding film makes the contour of the pixels clear, resulting in an image display with high definition. In addition, it is possible to fabricate the EL display device of the present invention with most of an existing manufacturing line for liquid crystal display devices. Thus, an amount of equipment investment can be significantly reduced, thereby resulting in a reduction in the total manufacturing cost.

Abstract: An organic electro luminescence device is provided. In the organic electro luminescence device, first and second electrodes are arranged to face each other and to be spaced apart from each other by a predetermined interval, and includes sub-pixels for reproducing an image. An array element is formed in the first substrate per sub-pixel, and includes at least one TFT. An organic electro luminescent diode is formed in the second substrate per sub-pixel. A spacer covered with a metal portion for electrically connecting the first and second substrates. A drain electrode of the TFT and a first electrode (anode) of the organic electro luminescent diode are electrically connected by the spacer covered with the metal portion.

Abstract: An organic device package that provides full fault tolerance against both electrical shorts and electrical opens is presented. An organic device package comprising a plurality of groups of organic electronic elements electrically coupled in series, where at least one of the plurality of groups of organic electronic elements comprises a plurality of sub-groups of organic electronic elements electrically coupled in parallel, and where at least one of the plurality of sub-groups of organic electronic elements comprises a plurality of organic electronic elements electrically coupled in series. Further, various embodiments are contemplated where a plurality of series blocks and parallel blocks may be nested to provide a grid network having increased flexibility and fault tolerance.

Abstract: An array of highly efficient micro-LEDs where each micro-LED is an integrated diode structure in a mesa, in which the mesa shape and the light-emitting region are chosen for optimum efficiency. A single one of the micro-LEDs includes, on a substrate and a semiconductor layer, a mesa, a light emitting layer, and an electrical contact. The micro-LEDs in this device have a very high EE because of their shape. Light is generated within the mesa, which is shaped to enhance the escape probability of the light. Very high EEs are achieved, particularly with a near parabolic mesa that has a high aspect ratio. The top of the mesa is truncated above the light-emitted layer (LEL), providing a flat surface for the electronic contact on the top of the semiconductor mesa. It has been found that the efficiency is high, provided the top contact has a good reflectivity value. Also, it has been found that efficiency is particularly high if the contact occupies an area of less than 16% of the truncated top mesa surface area.

Abstract: A light emitting device including a blue-system semiconductor light emitting element, a green-system semiconductor light emitting element, a yellow fluorescent member which absorbs a part of blue light from the blue-system semiconductor light emitting element and emits yellow-system light as excitation light, and a red fluorescent member which absorbs a part of green light from the green-system semiconductor light emitting element and emits red-system light as excitation light.

Abstract: The present invention relates to a gallium nitride/sapphire thin film, wherein a curvature radius thereof is positioned on the right side of a curve plotted from the following functional formula (I): Y=Y0+A·e?(x1?1)/T1+B·(1?e?x2/T2)??(I) wherein Y is the curvature radius (m) of a gallium nitride/sapphire thin film, x1 is the thickness (?m) of a gallium nitride layer, x2 is the thickness (mm) of a sapphire substrate, Y0 is ?107±2.5, A is 24.13±0.50, B is 141±4.5, T1 is 0.56±0.04, and T2 is 0.265±0.5.

Abstract: A light-emitting element including a light-emitting thyristor and a Schottky barrier diode is provided. A Schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0V by using such a Schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.

Abstract: A nitride semiconductor light emitting device includes a substrate formed of silicon, an insulating film formed on the substrate and a single crystal thin film formed on the insulating film. On the single crystal film, a semiconductor laminated body including a light emitting layer of nitride semiconductor is formed.

Abstract: A substrate system of the kind having a buffer region interposed between a silicon substrate proper and a nitride semiconductor region in order to make up for a difference in linear expansion coefficient therebetween. Electrodes are formed on the nitride semiconductor layer or layers in order to provide HEMTs or MESFETs. The buffer region is a lamination of a multiplicity of buffer layers each comprising a first, a second, and a third buffer sublayer of nitride semiconductors, in that order from the silicon substrate proper toward the nitride semiconductor region. The three sublayers of each buffer layer contain aluminum in varying proportions including zero. The aluminum proportion of the third buffer sublayer is either zero or intermediate that of the first buffer sublayer and that of the second.

Abstract: The object of the present invention is to provide a light-emitting element mounting member and a semiconductor device using the same that is easy to process and that allows adequate heat dissipation. A light-emitting element mounting member 200 includes: a substrate 2 including an element mounting surface 2a mounting a semiconductor light-emitting element 1 and first and second conductive regions 21, 22 disposed on the element mounting surface 2a and connected to the semiconductor light-emitting element 1; a reflective member 6 including a reflective surface 6a defining an internal space 6b for housing the semiconductor light-emitting element 1 and containing a metal disposed on the element mounting surface 1a; and a metal layer 13 disposed on the reflective surface 6a. The reflective surface 6a is sloped relative to the element mounting surface 2a so that a diameter of the internal space 6b is greater away from the element mounting surface 2a.

Abstract: In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.

Abstract: Optoelectronic component assemblies include a carrier element having a recess, the recess having at least one stepped supporting surface in the region of its periphery at a defined height between the bottom of the recess and the top edge of the recess. Arranged above the optoelectronic component in the region of the recess is a transparent cover element which has a structuring in at least one partial area. The cover element rests in the region of the supporting surface and is secured in this region by a bonding material. The upper side of the cover element may project above the top edge of the recess. Different materials may be provided as an encapsulation material and a bonding material.

Abstract: A submount for a semiconductor light emitting device includes a semiconductor substrate having a cavity therein configured to receive the light emitting device. A first bond pad is positioned in the cavity to couple to a first node of a light emitting device received in the cavity. A second bond pad is positioned in the cavity to couple to a second node of a light emitting device positioned therein. Light emitting devices including a solid wavelength conversion member and methods for forming the same are also provided.

Abstract: A polarized light emitting diode (LED) includes a marker indicating a polarization direction. A package for the LED also includes a marker indicating the polarization direction. The markers on the LED and package are used for mutual alignment, wherein the LED is attached in a favorable orientation with respect to a package, so that the polarization direction of emitted light from the package is apparent. The marker is placed on the LED before die separation and the marker is placed on the package before alignment. The marker on the LED comprises a photolithographic pattern, an asymmetric die shape, a notch on the die, or a scratch on the die, while the marker on the package comprises an electrode shape or pattern, an asymmetric package shape, a notch on the package, or a scratch on the package. Finally, the LED or package may be installed in an external circuit or system that also indicates the polarization direction.

Abstract: In a wavelength converter converting a wavelength of light emitted from a light source and outputting an output light containing light whose wavelength is converted, which comprises a fluorescent substance dispersed in a transparent matrix, the fluorescent substance has semiconductor fine particles containing at least one univalent metal element selected from alkali metal and Ag, an element of group III in the periodic table selected from indium and gallium, and sulfur, and does not substantially contain Cd and Se. Hence, a wavelength converter having a conversion efficiency of equal to or more than that of a converter containing CdSe can be provided by using a semiconductor material formed of a highly safe composition.

Abstract: A semiconductor light-emitting device has a semiconductor layer containing Al between a substrate and an active layer containing nitrogen, wherein Al and oxygen are removed from a growth chamber before growing said active layer and a concentration of oxygen incorporated into said active layer together with Al is set to a level such that said semiconductor light-emitting device can perform a continuous laser oscillation at room temperature.

Abstract: A semiconductor light emitting device has a gallium nitride compound semiconductor, and a first cladding layer of a first conductivity type, an active layer, an electron barrier layer of a second conductivity type and made of InxAlyGa1-x-yN (0?x?1 and 0?y?1), and a second cladding layer of the second conductivity type, laminated, in order, on a substrate. The electron barrier layer has a larger band gap than each of the active layer and the second cladding layer. The thickness of the electron barrier layer is in a range from 2 nm to 7 nm.

Abstract: A gallium nitride-based compound semiconductor light-emitting device is disclosed which includes an n-type semiconductor layer of a gallium nitride-based compound semiconductor, a light-emitting layer of a gallium nitride-based compound semiconductor and a p-type semiconductor layer of a gallium nitride-based compound semiconductor formed on a substrate in this order, and has a negative electrode and a positive electrode provided on the n-type semiconductor layer and the p-type semiconductor layer, respectively. The negative electrode includes a bonding pad layer and a contact metal layer which is in contact with the n-type semiconductor layer, and the contact metal layer is composed of a Cr—Al alloy.

Abstract: A system for protecting a high-speed input/output pad of an integrated circuit. The system includes a preferably parasitic silicon controlled rectifier (SCR) and a triggering mechanism that preferably includes an NMOS triggering FET. The SCR includes an anode connected to the input/output pad and a trigger input. The anode and the trigger input form a reverse-biased junction that, during normal operation of the integrated circuit, isolates the triggering mechanism from the input/output pad when power is applied to the integrated circuit.

Abstract: A metamorphic high electron mobility transistor having a plurality of high electron mobility transistor layers, a semi-insulating substrate, a ternary metamorphic buffer layer positioned between the semi-insulating substrate and the plurality of high electron mobility transistor layers, the ternary metamorphic buffer layer being Al1-xGaxSb such that x is greater than or equal to 0.2 but less than 0.3, a stabilizing layer positioned between the ternary metamorphic buffer layer and the plurality of high electron mobility transistor layers, the stabilizing layer being Al1-yGaySb such that y is greater than 0.2 but less than or equal to 0.3 and y is greater than x, and a nucleation layer interposed between the semi-insulating substrate and the ternary metamorphic buffer layer.

Abstract: Provided are a transistor of a semiconductor device and method of fabricating the same. The transistor includes: an epitaxy substrate disposed on a semi-insulating substrate and having a buffer layer, a first Si planar doping layer, a first conductive layer, a second Si planar doping layer, and a second conductive layer, which are sequentially stacked, the second Si planar doping layer having a doping concentration different from that of the first Si planar doping layer; a source electrode and a drain electrode diffusing into the first Si planar doping layer to a predetermined depth and disposed on both sides of the second conductive layer to form an ohmic contact; and a gate electrode disposed on the second conductive layer between the source and drain electrodes and being in contact with the second conductive layer. In this structure, both isolation and switching speed of the transistor can be increased.

Abstract: A semiconductor device includes: a p-type MIS transistor having a first gate electrode including silicon doped with p-type impurities; an n-type MIS transistor having a second gate electrode including silicon doped with n-type impurities; and a shared line which connects the p-type MIS transistor and the n-type MIS transistor and serves as a path of a power supply current or a ground current, the shared line including silicided silicon. The first gate electrode and the second gate electrode have silicided top portions, respectively, to establish electrical connection therebetween and the shared line has a line width larger than the line widths of the first gate electrode and the second gate electrode.

Abstract: An MOS type solid-state image pickup device including pixels each of which comprises a photodiode PD, a detection portion N and a transfer transistor QT for transferring the charges accumulated in the photodiode PD to the detection portion N, wherein the gate voltage of the transfer transistor QT when the charges are accumulated in the photodiode PD is set to a negative.

Abstract: In an inventive MOS transistor having a source region, a drain region and a channel region, which are formed in a semiconductor layer of an SOI substrate, which has a semiconductor substrate below the semiconductor layer and an isolation layer between semiconductor layer and semiconductor substrate, the drain or source region is electrically connected to a backside contact on a side of the semiconductor substrate facing away from the isolation layer by a via running through the semiconductor substrate. The central idea of the present invention is to obtain an easy contactability of an MOS transistor without limitations in the application spectrum, by leading a via either from the source or the drain region across both the isolation layer and the semiconductor substrate to a backside contact, to be electrically connected to the same, since thereby the requirements of the material properties of the semiconductor substrates, such as doping and conductivity, are unnecessary or reduced.

Abstract: A back illuminated imaging device 1 comprises a plurality charge blocking regions 19 which are arranged on a front surface 12 side, embedded in CCD charge transferring paths 21, and in which a first thickness T1 measured from the front surface 12 of first portions 19a extending along the CCD charge transferring paths 21 is larger than a first thickness T2 of second portions 19b extending along channel stops 20.