Patents Issued in January 31, 2013
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Publication number: 20130029415Abstract: Provided is a cell cultivation method in which the cell is cultured using a peptide hydrogel as a scaffold, for carrying out high-dimensional culture of a cell such as porcine hepatocyte, human hepatocyte, porcine pancreatic islet or human pancreatic islet for a long period under conditions where cell survival, cell morphology and cell functions are maintained. Also provided are a cell culture including a cell and a peptide hydrogel obtained by the above-described cultivation method, a bioreactor including the cell culture, and a cell preparation including the cell culture.Type: ApplicationFiled: December 23, 2011Publication date: January 31, 2013Inventors: Naoya KOBAYASHI, Noriaki TANAKA
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Publication number: 20130029416Abstract: This document provides methods and materials related to differentiating iPS cells into glucose-responsive, insulin-secreting progeny. For example, methods and material for using indolactam V (ILV) and glucagon like peptide-1 (GLP-1) to produce glucose-responsive, insulin-secreting progeny from iPS cells are provided.Type: ApplicationFiled: July 19, 2012Publication date: January 31, 2013Inventors: Tayaramma Thatava, Andre Terzic, Yogish C. Kudva, Yasuhiro Ikeda
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Publication number: 20130029417Abstract: The invention describes use of RNA silencing suppressors or interactors of the suppressors to bring the expression of microRNAs involved in any disease, including malignant neoplasia, back to its normal level. More specifically the present invention provides a method to regulate many miRNAs at the same time. Most of the suppressors according to this invention are coded by plant viruses that unexpectedly can affect RNA silencing and modulate miRNA expression levels in mammalian cells. Also suppressors of endogenous origin are described as able to modulate miRNA expression levels.Type: ApplicationFiled: February 18, 2011Publication date: January 31, 2013Applicants: AS VAHIUURINGUTE TEHNOLOOGIA ARENDUSKESKUS, TALLINN UNIVERSITY OF TECHNOLOGYInventors: Maria Cecilia Sarmiento Guerin, Kairi Karblane, Illar Pata, Erkki Truve, Pille Pata
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Publication number: 20130029418Abstract: The present invention relates in part to methods for producing tissue-specific cells from patient samples, and to tissue-specific cells produced using these methods. Methods for reprogramming cells using RNA are disclosed. Therapeutics comprising cells produced using these methods are also disclosed.Type: ApplicationFiled: May 7, 2012Publication date: January 31, 2013Inventors: Matthew Angel, Christopher Rohde
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Publication number: 20130029419Abstract: A method of creating a multicellular blood-brain barrier model is disclosed. In one embodiment, the method comprises culturing primary brain microvascular endothelial cells or embryonic stem cell-derived endothelial cells upon a permeable support in the presence of neural progenitor cells.Type: ApplicationFiled: September 25, 2012Publication date: January 31, 2013Inventors: Eric V. Shusta, Christian Weidenfeller, Clive Niels Svendsen
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Publication number: 20130029420Abstract: There is provided a method for culturing vascular smooth muscle cells while maintaining their normal function, and a culture device and regenerative medical material for the same. The method takes advantage of vascular smooth muscle cell recognition of elastin as an extracellular matrix. The invention provides a method for culturing vascular smooth muscle cells on elastin, a culture device having elastin anchored on the cell-growing surface, a culture device wherein the cell-growing surface is composed of an elastin molded article, and medical materials obtained by culturing vascular smooth muscle cells using such culture devices.Type: ApplicationFiled: September 13, 2012Publication date: January 31, 2013Inventors: Keiichi MIYAMOTO, Takashi HORIUCHI
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Publication number: 20130029421Abstract: Cell culture substrates are provided. Aspects of the cell culture substrate include a substrate with a surface having at least one hydrophilic region and at least one hydrophobic region, and a surfactant layer present on the surface of the substrate and configured to produce a cell-binding surface on the hydrophilic regions of the surface. Also provided are kits which include the cell culture substrate, as well as methods of producing the cell culture substrate. The cell culture substrate and methods described herein find use in a variety of applications, including single-cell culture applications.Type: ApplicationFiled: July 26, 2012Publication date: January 31, 2013Inventors: Kyriakos Komvopoulos, Qian Cheng
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Publication number: 20130029422Abstract: A cell culture article comprises a substrate having a micro-structured surface and a thin hydrophobic elastomeric coating disposed on the substrate. The coating forms a micro-structured cell culture surface and is sufficiently thin to reduce absorption of hydrophobic molecules from an aqueous medium in contact with the coating, relative to articles fabricated entirely from the hydrophobic elastomer.Type: ApplicationFiled: July 26, 2011Publication date: January 31, 2013Inventors: Vasiliy Nikolaevich Goral, Yulong Hong, Hui Su, Jian Tan
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Publication number: 20130029423Abstract: Provided are a method of improving the efficiency of establishment of iPS cells, comprising the step of contacting one or more substances selected from the group consisting of members of the GLIS family (e.g., GLIS1) and nucleic acids that encode the same and one or more substances selected from the group consisting of members of the Klf family and nucleic acids that encode the same, with a somatic cell, an iPS cell comprising an exogenous nucleic acid that encodes a member of the GLIS family or a member of the Klf family, that can be obtained by the method, and a method of producing a somatic cell by inducing the differentiation of the iPS cell.Type: ApplicationFiled: February 16, 2011Publication date: January 31, 2013Applicants: Kyoto University, Japan Biological Informatics Consortium, National Institute of Advanced Industrial Science and TechnologyInventors: Shinya Yamanaka, Naoki Goshima, Momoko Maekawa, Yoshifumi Kawamura, Hiromi Mochizuki
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Publication number: 20130029424Abstract: The present invention relates, in general, to human B cells, and, in particular to a method of immortalizing and cloning human B cells and to monoclonal antibodies derived therefrom. The invention further relates to methods of using the monoclonal antibodies for therapeutic and diagnostic purposes.Type: ApplicationFiled: April 11, 2011Publication date: January 31, 2013Inventors: Barton F. Haynes, Mattia Bonsignori, Kwan-Ki Hwang, Hua-Xin Liao, David C. Montefiori, Micah A. Luftig
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Publication number: 20130029425Abstract: A process is provided of introducing an RNA into a living cell to inhibit gene expression of a target gene in that cell. The process may be practiced ex vivo or in vivo. The RNA has a region with double-stranded structure. Inhibition is sequence-specific in that the nucleotide sequences of the duplex region of the RNA and of a portion of the target gene are identical. The present invention is distinguished from prior art interference in gene expression by antisense or triple-strand methods.Type: ApplicationFiled: July 25, 2012Publication date: January 31, 2013Inventors: Andrew Fire, Stephen Kostas, Mary Montgomery, Lisa Timmons, SiQun Xu, Hiroaki Tabara, Samuel E. Driver, Craig C. Mello
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Publication number: 20130029426Abstract: The present invention provides a dual inducible system for single protein production, as well as a method of inducing high level protein expression using amino acids.Type: ApplicationFiled: July 23, 2012Publication date: January 31, 2013Applicant: UNIVERSITY OF MEDICINE AND DENTISTRY OF NEW JERSEYInventors: Masayori Inouye, Lili Mao, S. Thangminlal Vaiphei, Yojiro Ishida
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Publication number: 20130029427Abstract: A real-time, on-line method and analytical system for determining halohydrocarbons in water which operate by (1) extracting on-line samples; (2) purging volatile halohydrocarbons from the water (e.g., with air or nitrogen); (3) carrying the purge gas containing the analytes of interest over a porous surface where the analytes are adsorbed; (4) recovering the analytes from the porous surface with heat (thermal desorption) or solvent (solvent elution) to drive the analytes into an organic chemical mixture; (5) generating an optical change (e.g., color change) in dependence upon a reaction involving the analytes and a pyridine derivative; and (6) measuring optical characteristics associated with the reaction to quantify the volatile halogenated hydrocarbon concentration.Type: ApplicationFiled: April 14, 2011Publication date: January 31, 2013Inventors: Harmesh K. Saini, Michael J. West, Qin Wang, James Garvey, Paul Rand, Marc Angelo, David Johnston, Robert Ormond, Ye Han
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Publication number: 20130029428Abstract: A method of preparing an antigen-immobilized immuno-fluorescence slide, the method comprising: immobilizing a C-reactive protein on a slide to prepare a protein chip; mixing an antibody that specifically binds to a target protein, with streptavidin to label the antibody with a fluorescent nanoparticle; immuno-reacting the antibody by competitive mixing, assaying with a fluorescence camera, wherein the immobilizing of the C-reactive protein on the slide comprises: modifying the slide with 3-aminopropyltrimethoxysilane to prepare a modified slide; hydrating the slide modified with 3-aminopropyltrimethoxysilane; activating the modified slide by using a glutaraldehyde solution; dissolving a C-reactive protein at a concentration of 0.01-0.5 mg/ml in a 30-70 mM phosphate buffer solution (pH 6.5-7.Type: ApplicationFiled: February 21, 2011Publication date: January 31, 2013Applicant: KOREA FOOD RESEARCH INSTITUTEInventors: Nam Soo Kim, Yong Jin Cho, Chong Tai Kim
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Publication number: 20130029429Abstract: To identify the aforementioned interference component present in serum or plasma, to thereby provide means for avoiding any interference effect caused by the component.Type: ApplicationFiled: March 31, 2011Publication date: January 31, 2013Applicant: SEKISUI MEDICAL CO., LTD.Inventors: Takayuki Abe, Yuki Takahashi, Tetsuya Ota
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Publication number: 20130029430Abstract: A plasmon sensor has a first metal layer and a second metal layer. The first metal layer has a bottom surface and a top surface configured to be supplied with an electromagnetic wave. The second metal layer has a top surface confronting the bottom surface of the first metal layer. Between the first metal layer and the second metal layer, there is provided a hollow region configured to be filled with a specimen containing a medium. Analyte capturing bodies are physically adsorbed at least one of below the first metal layer and above the second metal layer.Type: ApplicationFiled: October 8, 2012Publication date: January 31, 2013Applicant: Panasonic CorporationInventor: Panasonic Corporation
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Publication number: 20130029431Abstract: According to one embodiment, a method for manufacturing a nonvolatile memory device including a plurality of memory cells is disclosed. Each of the plurality of memory cells includes a base layer including a first electrode, a magnetic tunnel junction device provided on the base layer, and a second electrode provided on the magnetic tunnel junction device. The magnetic tunnel junction device includes a first magnetic layer, a tunneling barrier layer provided on the first magnetic layer, and a second magnetic layer provided on the tunneling barrier layer. The method can include etching a portion of the second magnetic layer and a portion of the first magnetic layer by irradiating gas clusters onto a portion of a surface of the second magnetic layer or a portion of a surface of the first magnetic layer.Type: ApplicationFiled: June 27, 2012Publication date: January 31, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shigeki TAKAHASHI, Kyoichi SUGURO, Junichi ITO, Yuichi OHSAWA, Hiroaki YODA
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Publication number: 20130029432Abstract: Embodiments relate to IC current sensors fabricated using thin-wafer manufacturing technologies. Such technologies can include processing in which dicing before grinding (DBG) is utilized, which can improve reliability and minimize stress effects. While embodiments utilize face-up mounting, face-down mounting is made possible in other embodiments by via through-contacts. IC current sensor embodiments can present many advantages while minimizing drawbacks often associated with conventional IC current sensors.Type: ApplicationFiled: September 25, 2012Publication date: January 31, 2013Applicant: INFINEON TECHNOLOGIES AGInventor: INFINEON TECHNOLOGIES AG
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Publication number: 20130029433Abstract: An instrument comprises a substrate, a plurality of sensors distributed at positions across the substrate's surface, at least one electronic processing component on the surface, electrical conductors extending across the surface and connected to the sensors and processing component, and a cover disposed over the sensors, processing component and conductors. The cover and substrate have similar material properties to a production substrate. The cover is configured to electromagnetically shield the sensors, conductors, or processing component. The instrument has approximately the same thickness and/or flatness as the production substrate. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.Type: ApplicationFiled: January 30, 2012Publication date: January 31, 2013Applicant: KLA-Tencor CorporationInventors: Mei H. Sun, Mark Wiltse, Wayne G. Renken, Zachary Reid, Tony Dibiase
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Publication number: 20130029434Abstract: A method of fabricating a semiconductor device includes performing a first period of operation and a second period of operation at first equipment and second equipment. The first period of operation includes performing a first patterning process at each of the first equipment and the second equipment, generating first inspection data of the first equipment and first inspection data of the second equipment, generating first differential data of the second equipment including differentials of the first inspection data of the first equipment and the first inspection data of the second equipment, and calibrating a configuration of the second equipment with reference to the first differential data of the second equipment.Type: ApplicationFiled: July 23, 2012Publication date: January 31, 2013Applicant: Samsung Electronics Co., Ltd.Inventor: Jang-Sun KIM
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Publication number: 20130029435Abstract: A laser resonator and method for forming the laser resonator are provided. The method comprises placing a housing for the laser resonator in an alignment fixture, attaching a bond plate to an optical component of the laser resonator, attaching a first end of an alignment arm to the bond plate attached to the optical component, attaching a second end of the alignment arm to the alignment fixture such that the optical component is disposed over the housing, aligning, via the alignment fixture and the alignment arm, the optical component relative to the housing, and bonding the aligned optical component to the housing. The first end of the alignment arm may removed once the aligned optical component is bonded to the housing.Type: ApplicationFiled: October 1, 2012Publication date: January 31, 2013Applicant: DRS RSTA, INC.Inventor: DRS RSTA, INC.
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Publication number: 20130029436Abstract: A hard mask made of a material in which the pattern precision is degraded by oxidation, a protective film, which protects the hard mask film from oxidation, a first mask film and a first organic film are sequentially stacked. The first organic film is processed into a first pattern, and the first mask film is firstly etched using the patterned the first organic film as a mask. After the first organic film is removed, a second organic film is formed. The second organic film is processed into a second pattern. The first mask film is secondary etched using the patterned second organic film as a mask so that the surface of the first mask film is exposed but the surface of the protective film is not exposed, thereby selectively patterning only the first mask film. After that, when removing the residual second organic film by ashing, it is possible to ensure the function of the protective film that protects the hard mask film from oxidation.Type: ApplicationFiled: July 26, 2012Publication date: January 31, 2013Applicant: ELPIDA MEMORY, INC.Inventor: Osamu FUJITA
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Publication number: 20130029437Abstract: A liquid ejection head substrate including a silicon substrate having a liquid supply port as hollow and slots as through holes connecting the hollow and a liquid channel arranged opposite sides of the substrate. The method includes etching the substrate to form the hollow; forming a first resist on the hollow; etching the first resist on the bottom of the hollow under conditions of securing an equal etching rate to both the silicon substrate and the first resist; forming a second resist on the hollow; patterning the second resist into an etching mask; and etching the substrate using the etching mask to form the through holes.Type: ApplicationFiled: July 12, 2012Publication date: January 31, 2013Applicant: CANON KABUSHIKI KAISHAInventor: Masaya Uyama
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Publication number: 20130029438Abstract: The invention provides a wafer-bonded semiconductor device wherein warpage generated when wafers are bonded is reduced at a low cost ad through a simple process. In a method for manufacturing a wafer-bonded semiconductor device by bonding a first wafer substrate and a second wafer substrate together, the method of the invention includes a first step of forming in advance bonding members having a bonding function when heated on the wafer-bonded surface sides of the first wafer substrate and the second wafer substrate, respectively; a second step of supplying flux paste containing two or more kinds of powdery materials having reactivity to the surfaces of the bonding members formed in the first step; and a third step of causing excitation to have the flux paste supplied in the second step start reacting.Type: ApplicationFiled: October 27, 2010Publication date: January 31, 2013Inventors: Toshiaki Takai, Yukio Sakigawa
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Publication number: 20130029439Abstract: There is provided a method of manufacturing a light emitting device, the method including: mounting a plurality of light emitting devices on an adhesive layer; arranging upper surfaces of the plurality of light emitting devices to be disposed horizontally using a pressing member; forming a wavelength conversion part covering the plurality of light emitting devices on the adhesive layer by applying a resin including at least one phosphor material; planarizing an upper surface of the wavelength conversion part using the pressing member; and separating the adhesive layer from the plurality of light emitting devices.Type: ApplicationFiled: July 30, 2012Publication date: January 31, 2013Inventors: Jong Sup Song, Jae Sung You, Tae Gyu Kim
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Publication number: 20130029440Abstract: A semiconductor light-emitting device is disclosed. The semiconductor light-emitting device comprises a multilayer epitaxial structure disposed on a substrate. The substrate has a predetermined lattice direction perpendicular to an upper surface thereof, wherein the predetermined lattice direction is angled toward [0 11] or [01 1] from [100], or toward [011] or [0 11] from [ 100] so that the upper surface of the substrate comprises at least two lattice planes with different lattice plane directions. The multilayer epitaxial structure has a roughened upper surface perpendicular to the predetermined lattice direction. The invention also discloses a method for fabricating a semiconductor light-emitting device.Type: ApplicationFiled: October 1, 2012Publication date: January 31, 2013Applicant: Epistar CorporationInventors: Ya-ju LEE, Ta-Cheng Hsu, Ming-Ta Chin, Yen-Wen Chen, Lo Wu-Tsung, Chung-Yuan Li, Min-Hsun Hsieh
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Publication number: 20130029441Abstract: The present invention provides methods for manufacturing a thin film transistor (TFT) array substrate and a display panel. The method for manufacturing the TFT array substrate comprises the following steps: forming a plurality of gate electrodes, a gate insulating layer, a semiconductor layer, an ohmic contact layer, an electrode layer and a photo-resist layer on a transparent substrate in sequence; using a multi tone mask to pattern the photo-resist layer; forming a plurality of source electrodes and a plurality of drain electrodes at both sides of the channels, respectively; heating the photo-resist layer; etching the semiconductor layer; removing the photo-resist layer; forming a passivation layer on the channels, the source electrodes and the drain electrodes; and forming a pixel electrode layer on the passivation layer. The present invention can reduce an amount of the required masks in the fabrication process, and only one wet etching is required to etch the metal material on the TFT array substrate.Type: ApplicationFiled: August 26, 2011Publication date: January 31, 2013Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Jehao Hsu, Jingfeng Xue, Xiaohui Yao
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Publication number: 20130029442Abstract: A liquid crystal display includes a substrate and a display region on the substrate. The display region has one or more gate lines; a gate insulating layer; a semiconductor layer; one or more pairs of source and drain electrodes, each pair being one source electrode and one corresponding drain electrode; and one or more data lines, each comprising one or more of the source electrodes. A passivation layer overlies the data lines and the drain electrodes and has a plurality of contact holes; and one or more color filters overlie the passivation layer and have a plurality of through holes. In the display region, in top view, the semiconductor layer has the same shape as the data lines and the drain electrodes except over each region between each source and corresponding drain electrode, and the contact holes' edges are aligned with the through holes' edges.Type: ApplicationFiled: October 8, 2012Publication date: January 31, 2013Applicant: SAMSUNG DISPLAY CO., LTD.Inventor: SAMSUNG DISPLAY CO., LTD.
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Publication number: 20130029443Abstract: A photoalignment material includes an alignment polymer, a photoalignment additive including a compound represented by the following Chemical Formula 1 and an organic solvent. In Chemical Formula 1, R1 represents a cyclic compound. A and B independently represent a single bond or —(CnH2n)—. “n” represents an integer in a range of 1 to 12. Each —CH2— of A and/or B may be replaced with R3 represents an alkyl group having 1 to 12 carbon atoms, and each —CH2— of A and/or B may be replaced with —O—. R4 represents In Chemical Formula 1, each hydrogen atom excluding hydrogen atoms of R4 may be replaced with chlorine (Cl) or fluorine (F).Type: ApplicationFiled: October 9, 2012Publication date: January 31, 2013Applicant: Samsung Display Co., Ltd.Inventor: Samsung Display Co., Ltd.
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Publication number: 20130029444Abstract: A laser dicing method includes: placing a workpiece substrate on a stage; generating a clock signal; emitting a pulse laser beam synchronous with the clock signal; switching irradiation and non-irradiation of the workpiece substrate with the pulse laser beam in a unit of light pulse in synchronization with the clock signal to perform first irradiation of the pulse laser beam on a first straight line by controlling the pulse laser beam using a pulse picker; performing second irradiation of the pulse laser beam on a second straight line, which is adjacent to the first straight line in a substantially parallel fashion, after the first irradiation; and forming a crack reaching a workpiece substrate surface on the workpiece substrate by the first irradiation and the second irradiation.Type: ApplicationFiled: July 24, 2012Publication date: January 31, 2013Applicant: TOSHIBA KIKAI KABUSHIKI KAISHAInventor: Shoichi SATO
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Publication number: 20130029445Abstract: There is provided a method of manufacturing a semiconductor light emitting device, the method including: preparing a substrate including first and second main surfaces opposing each other; forming a plurality of protruding parts in the first main surface of the substrate; forming a light emitting stack on the first main surface on which the plurality of protruding parts are formed; forming a plurality of light emitting structures by removing portions of the light emitting stack formed in regions corresponding to groove parts around the plurality of protruding parts; and separating the substrate along the groove parts.Type: ApplicationFiled: July 25, 2012Publication date: January 31, 2013Inventors: Gi Bum KIM, Won Goo HUR, Seung Woo CHOI, Seung Jae LEE, Si Hyuk LEE, Tae Hun KIM
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Publication number: 20130029446Abstract: A method of forming a transparent electrode includes forming a first transparent conductive material layer on a base; performing a plasma process on the first transparent conductive material layer such that the upper portion of the first transparent conductive material layer is changed into semitransparent; forming a second transparent conductive material layer on the first transparent conductive material layer; patterning the second transparent conductive material layer and the first transparent conductive material layer; and annealing the patterned second transparent conductive material layer and the patterned first transparent conductive material layer such that the upper portion of the first transparent conductive material layer is changed into transparent.Type: ApplicationFiled: July 16, 2012Publication date: January 31, 2013Inventors: Yong-Il KIM, Jeong-Oh KIM, Gi-Sang HONG, Jung-Sun BEAK
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Publication number: 20130029447Abstract: A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.Type: ApplicationFiled: August 16, 2012Publication date: January 31, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Junya MARUYAMA, Toru TAKAYAMA, Yumiko OHNO, Shunpei YAMAZAKI
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Publication number: 20130029448Abstract: The invention is directed to a method of preparing polymeric metallomacrocycles having measurable photo- and electroluminescence properties and devices using such materials. In an embodiment, an O-hexyl-3,5-bis(terpyridine)phenol ligand has been synthesized and transformed into a hexagonal Zn(II)-metallomacrocycle by a facile self-assembly procedure capitalizing on terpyridine-Zn(II)-terpyridine connectivity. The material is usable in an OLED device based on the photo- and electro-luminescence characteristics thereof.Type: ApplicationFiled: August 3, 2012Publication date: January 31, 2013Inventors: George R. Newkome, Charles N. Moorefield
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Publication number: 20130029449Abstract: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.Type: ApplicationFiled: August 24, 2012Publication date: January 31, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Zhiyuan Cheng, James G. Fiorenza, Calvin Sheen, Anthony Lochtefeld
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Publication number: 20130029450Abstract: The present invention provides a method for manufacturing a solar cell capable of suppressing volatilization of selenium and deformation of a substrate during a manufacturing process. According to the present invention, the method for manufacturing the solar cell comprises the steps of: providing a substrate; forming a rear electrode on the substrate; forming a precursor film for a light absorption film on the rear electrode; forming a light absorption film by progressing a crystallization process for the precursor film for the light absorption film; forming a buffer film on the light absorption film; forming a window film on the buffer film, and forming an anti-reflection film on the window film; and partially patterning the anti-reflection film, and forming a grid electrode in a patterned area. Said precursor film for the light absorption film includes Cu—Zn—Sn—S (Cu2ZnSnS4), CuInSe2, CuInS2, Cu(InGa)Se2, or Cu(InGa)S2.Type: ApplicationFiled: April 19, 2011Publication date: January 31, 2013Applicant: Korea Institute of Industrial TechnologyInventors: Chae Hwan Jeong, Jong Ho Lee, Ho Sung Kim, Jin Hyeok Kim, Suk Ho Lee
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Publication number: 20130029451Abstract: A method for making a solar cell includes: (a) forming over a substrate a photoelectric transformation layer that is made of a chalcopyrite-based photovoltaic material; (b) performing an ion milling treatment, in which ions are injected to an upper surface of the photoelectric transformation layer at an ion incident angle with respect to the upper surface to partially etch the photoelectric transformation layer, so that the photoelectric transformation layer is formed with a plurality of nano-pillar structures, the ion incident angle ranging from 0° to 90°; and (c) forming an electrode unit to transmit electricity from the photoelectric transformation layer.Type: ApplicationFiled: January 23, 2012Publication date: January 31, 2013Inventors: Yu-Lun Chueh, Chin-Hung Liu, Chih-Huang Lai
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Publication number: 20130029452Abstract: A method of forming optoelectronic conversion layer includes the following steps. A first substrate is provided, and an electrode layer is formed on the first substrate. A first metal precursor layer including one or plural of metal components is formed on the electrode layer. A second substrate is provided, and a nonmetal precursor layer including at least one nonmetal component is formed on the second substrate. The first substrate and the second substrate are then stacked so that the nonmetal precursor layer and the first metal precursor layer are in contact. A thermal treatment is performed to have the first metal precursor layer react with the nonmetal precursor layer for forming an optoelectronic conversion layer.Type: ApplicationFiled: February 20, 2012Publication date: January 31, 2013Inventor: Yi-Jiunn Chien
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Publication number: 20130029453Abstract: A method of manufacturing a semiconductor device suitable for optoelectronic switching in response to light of wavelengths in the range 1200 nm to 1600 nm, comprising forming an undoped InGaAs layer on an insulative semiconductor substrate and bonded on opposed sides to a pair of electrical contact layers adapted to constitute the electrodes of a switch, comprising forming the bulk point defects by irradiating the InGaAs layer with Nitrogen ions.Type: ApplicationFiled: July 27, 2012Publication date: January 31, 2013Applicant: THALES HOLDINGS UK PLCInventors: Chris S. GRAHAM, Alwyn SEEDS
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Publication number: 20130029454Abstract: A method for making a photovoltaic device is presented. The method includes steps of disposing a window layer on a substrate and disposing an absorber layer on the window layer. Disposing the window layer, the absorber layer, or both layers includes introducing a source material into a deposition zone, wherein the source material comprises oxygen and a constituent of the window layer, of the absorber layer or of both layers. The method further includes step of depositing a film that comprises the constituent and oxygen.Type: ApplicationFiled: July 28, 2011Publication date: January 31, 2013Applicant: GENERAL ELECTRIC COMPANYInventors: James Neil Johnson, David Scott Albin, Scott Feldman-Peabody, Mark Jeffrey Pavol, Robert Dwayne Gossman
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Publication number: 20130029455Abstract: The invention relates to a method for manufacturing adjacent first and second areas of a surface, said areas consisting, respectively, of first and second materials that are different from each other. Said method involves: depositing a first liquid volume that encompasses the first area and comprises a solvent in which the first material is dispersed; depositing a second liquid volume that encompasses the second area and comprises a solvent in which the second material is dispersed; and removing the solvents. According to the invention, the solvents of the first and second volumes are immiscible, and the second volume is simultaneously or consecutively deposited with the deposition of the first volume, before the first volume reaches the second area.Type: ApplicationFiled: March 7, 2011Publication date: January 31, 2013Inventors: Mohamed Benwadih, Christophe Serbutoviez, Jean-Marie Verilhac
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Publication number: 20130029456Abstract: Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films.Type: ApplicationFiled: September 18, 2012Publication date: January 31, 2013Applicant: ADVANCED TECHNOLOGY MATERIALS, INC.Inventors: William Hunks, Tianniu Chen, Chongying Xu, Jeffrey F. Roeder, Thomas H. Baum, Matthias Stender, Philip S.H. Chen, Gregory T. Stauf, Bryan C. Hendrix
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Publication number: 20130029457Abstract: A method for assembling die packages includes attaching contacts on a first side of a plurality of first die to substrate pads on a top surface of a composite carrier. The composite carrier includes a package substrate including at least one embedded metal layer having its bottom surface secured to a semiconductor wafer. The composite carrier minimizes effects of the CTE mismatch between the die and the package substrate during assembly reduces warpage of the die. After the attaching, the semiconductor wafer is removed from the package substrate. Electrically conductive connectors are attached to the bottom surface of the package substrate, and the package substrate is sawed to form a plurality of singulated die packages.Type: ApplicationFiled: September 25, 2012Publication date: January 31, 2013Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Texas Instruments Incorporated
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Publication number: 20130029458Abstract: A substrate for a semiconductor package includes a ball land disposed on one surface of an insulating layer. A solder resist is applied to the surface of insulating layer while leaving the ball land exposed. A coating film is applied on the exposed surface of the ball land. The coating film includes a high molecular compound having metal particles. In the substrate having the ball land with the coating film formed thereon, it is not necessary to subject the substrate to a UBM formation process.Type: ApplicationFiled: September 26, 2012Publication date: January 31, 2013Applicant: HYNIX SEMICONDUCTOR INC.Inventor: HYNIX SEMICONDUCTOR INC.
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Publication number: 20130029459Abstract: A method for making a Schottky barrier diode includes the following steps. A first metal layer, a second metal layer and a carbon nanotube composite material are provided. The carbon nanotube composite material is applied on the first metal layer and the second metal layer to form a semiconductor layer. The carbon nanotube composite material includes an insulated polymer and a number of carbon nanotubes dispersed in the insulated polymer. The semiconductor layer is in Schottky contact with the first metal layer and in ohmic contact with the second metal layer.Type: ApplicationFiled: December 26, 2011Publication date: January 31, 2013Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: CHUN-HUA HU, CHANG-HONG LIU, SHOU-SHAN FAN
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Publication number: 20130029460Abstract: Some embodiments include methods of forming graphene-containing switches. A bottom electrode may be formed over a base, and a first electrically conductive structure may be formed to extend upwardly from the bottom electrode. Dielectric material may be formed along a sidewall of the first electrically conductive structure, while leaving a portion of the bottom electrode exposed. A graphene structure may be formed to be electrically coupled with the exposed portion of the bottom electrode. A second electrically conductive structure may be formed on an opposing side of the graphene structure from the first electrically conductive structure. A top electrode may be formed over the graphene structure and electrically coupled with the second electrically conductive structure. The first and second electrically conductive structures may be configured to provide an electric field across the graphene structure.Type: ApplicationFiled: July 26, 2011Publication date: January 31, 2013Applicant: MICRON TECHNOLOGY, INC.Inventor: Gurtej S. Sandhu
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Publication number: 20130029461Abstract: A method for fabricating an anode-shorted field stop insulated gate bipolar transistor (IGBT) comprises selectively forming first and second semiconductor implant regions of opposite conductivity types. A field stop layer of a second conductivity type can be grown onto or implanted into the substrate. An epitaxial layer can be grown on the substrate or on the field stop layer. One or more insulated gate bipolar transistors (IGBT) component cells are formed within the epitaxial layer.Type: ApplicationFiled: July 27, 2011Publication date: January 31, 2013Inventors: ANUP BHALLA, Madhur Bobde, Yongping Ding, Xiaotian Zhang, Yueh-Se Ho
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Publication number: 20130029462Abstract: A method of manufacturing a thin film transistor is provided. The method includes forming a lower organic semiconductor layer, forming an upper organic semiconductor layer on the lower organic semiconductor layer, the upper organic semiconductor layer having solubility and conductivity higher than those of the lower organic semiconductor layer, forming a source electrode and a drain electrode spaced apart from each other and respectively overlapping the upper organic semiconductor layer, and dissolving the upper organic semiconductor layer selectively by using the source electrode and the drain electrode as a mask.Type: ApplicationFiled: September 25, 2012Publication date: January 31, 2013Applicant: SONY CORPORATIONInventor: SONY CORPORATION
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Publication number: 20130029463Abstract: Disclosed herein is a method of forming a semiconductor device. In one example, the method includes forming extension implant regions in a PMOS region and a NMOS region of a semiconducting substrate for a PMOS device and a NMOS device, respectively and, after forming the extension implant regions, performing a first heating process. The method further includes forming a plurality of cavities in the PMOS region of the substrate, performing at least one epitaxial deposition process to form a plurality of in-situ doped semiconductor layers that are positioned in or above each of said cavities, and forming a masking layer that exposes the NMOS region and covers the PMOS region. The method concludes with the steps of forming source/drain implant regions in the NMOS region of the substrate for the NMOS device and performing a second heating process.Type: ApplicationFiled: July 26, 2011Publication date: January 31, 2013Applicant: GLOBALFOUNDRIES INC.Inventors: Ralf Illgen, Stefan Flachowsky, Ina Ostermay
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Publication number: 20130029464Abstract: Methods are provided for fabricating integrated circuits using non-oxidizing resist removal. In accordance with one embodiment the method includes forming a gate electrode structure overlying a semiconductor substrate and applying and patterning a layer of resist to expose a portion of the semiconductor substrate adjacent the gate electrode structure. Conductivity determining ions are implanted into the semiconductor substrate using the gate electrode structure and the layer of resist as an implant mask. The layer of resist is removed in a non-oxidizing ambient and the implanted conductivity determining ions are activated by thermal annealing.Type: ApplicationFiled: July 27, 2011Publication date: January 31, 2013Applicant: GLOBALFOUNDRIES INC.Inventors: Stefan Flachowsky, Steven Langdon, Thomas Feudel