Abstract: Described herein are novel light absorbing conjugated polymeric electron donor materials for organic photovoltaic devices and other applications. In one embodiment, the polymer structure comprises a conjugated electron rich donor unit with an imine functionality at the bridgehead position and a conjugated electron deficient unit in the polymer backbone arranged in an alternating fashion. Monomers suitable for making the polymers, and devices utilizing the polymers, are also disclosed.

Abstract: A suspension or solution for organic optoelectronic device is disclosed in this invention. The composition of the suspension or solution includes at least one kind of micro/nano transition metal oxide and a solvent. The composition of the suspension or solution can selectively include at least one kind of transition metal oxide ions or a precursor of transition metal oxide. Moreover, the making method and applications of the suspension or solution is also disclosed in this invention.

Abstract: Provided is a thin film transistor array panel. The thin film transistor array panel according to exemplary embodiments of the present invention includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Abstract: Provided is a thin film transistor and thin film transistor panel array. The thin film transistor includes: a substrate; a gate electrode disposed on the substrate; a semiconductor layer disposed on the substrate and partially overlapping with the gate electrode; a source electrode and a drain electrode spaced apart from each other with respect to a channel region of the semiconductor layer; an insulating layer disposed between the gate electrode and the semiconductor layer; and a barrier layer disposed between the semiconductor layer and the source electrode and between the semiconductor layer and the drain electrode, in which the barrier layer comprises graphene. An ohmic contact is provided based on the type of material used for the semiconductor layer.

Abstract: The invention is to provide a structure of a semiconductor device which achieves quick response and high-speed drive by improving on-state characteristics of a transistor, and to provide a highly reliable semiconductor device. In a transistor in which a semiconductor layer, a source and drain electrode layers, a gate insulating film, and a gate electrode are sequentially stacked, a non-single-crystal oxide semiconductor layer containing at least indium, a Group 3 element, zinc, and oxygen is used as the semiconductor layer. The Group 3 element functions as a stabilizer.

Abstract: A method of fabricating MOTFTs on transparent substrates by positioning opaque gate metal on the substrate front surface and depositing gate dielectric material overlying the gate metal and a surrounding area and metal oxide semiconductor material on the dielectric material. Depositing selectively removable etch stop material on the semiconductor material and photoresist on the etch stop material to define an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the substrate rear surface using the gate metal as a mask and removing exposed portions leaving the etch stop material overlying the gate metal covered. Etching the semiconductor material to isolate the TFT. Selectively etching the etch stop layer to leave a portion overlying the gate metal defining a channel area. Depositing and patterning conductive material to form source and drain areas on opposed sides of the channel area.

Abstract: The present invention achieves a formation of a metal oxide film of a thin film transistor with a simplified process. The present invention is concerned with a method for manufacturing a field-effect transistor comprising a gate electrode, a source electrode, a drain electrode, a channel layer and a gate insulating layer wherein the channel layer is formed by using a metal salt-containing composition comprising a metal salt, a polyvalent carboxylic acid having a cis-form structure of —C(COOH)?C(COOH)—, an organic solvent and a water wherein a molar ratio of the polyvalent carboxylic acid to the metal salt is in the range of 0.5 to 4.0.

Abstract: Disclosed is an oxide for a semiconductor layer of a thin-film transistor, said oxide being excellent in the switching characteristics of a thin-film transistor, specifically enabling favorable characteristics to be stably obtained even in a region of which the ZnO concentration is high and even after forming a passivation layer and after applying stress. The oxide is used in a semiconductor layer of a thin-film transistor, and the aforementioned oxide contains Zn and Sn, and further contains at least one element selected from group X consisting of Al, Hf, Ta, Ti, Nb, Mg, Ga, and the rare-earth elements.

Abstract: A method includes providing on a substrate having at least two through substrate vias (“TSVs”) a plurality of test structures for de-embedding the measurement of the intrinsic characteristics of a device under test (DUT) including at least two of the TSVs; measuring the intrinsic characteristics [L] for a first and a second test structure on the substrate including two pads coupled with a transmission line of length L; using simultaneous solutions of ABCD matrix or T matrix form equations, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the pads and the transmission lines; de-embedding the measurements of the third and fourth test structures using the intrinsic characteristics of the pads and the transmission lines; and using simultaneous solutions of ABCD matrix or T matrix form equations for BM_L and BM_LX, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the TSVs.

Abstract: A semiconductor device includes a circuit board including a ground portion, and a semiconductor package disposed on the circuit board. The semiconductor package includes an external connecting pad and an exposed pad. The exposed pad and the ground portion are electrically connected at a first surface of the exposed pad. A semiconductor chip is disposed on a second surface of the exposed pad and electrically connected to the external connecting pad. The first surface of the exposed pad is located external to the semiconductor package, and the second surface of the exposed pad is located within the semiconductor package. A test pad is disposed on the semiconductor chip and is electrically connected to the exposed pad.

Abstract: The electronic device includes a substrate, a first electrode formed over a surface of the substrate, a second electrode located on an opposite side of the first electrode from the substrate so as to face the first electrode, and a functional layer interposed between the first electrode and second electrode and formed by means of anodizing a first polycrystalline semiconductor layer in an electrolysis solution so as to contain a plurality of semiconductor nanocrystals. The electronic device further includes a second polycrystalline semiconductor layer interposed between the first electrode and the functional layer so as to be in close contact with the functional layer. The second polycrystalline semiconductor layer has an anodic oxidization rate in the electrolysis solution lower than that of the first polycrystalline semiconductor layer so as to function as a stop layer for exclusively anodizing the first polycrystalline semiconductor layer.

Abstract: A thin-film transistor array substrate, an organic light-emitting display having the same, and a method of manufacturing the organic light-emitting display are disclosed. In one embodiment, the thin-film transistor array substrate includes a buffer layer formed on a substrate, a first insulating layer formed on the buffer layer, a pixel electrode formed on the first insulating layer using a transparent conductive material, an intermediate layer that covers an upper side and outer side-surfaces of the pixel electrode and includes a organic light-emitting layer, a gap formed by etching the first insulating layer and the buffer layer at a peripheral of the pixel electrode, and a facing electrode that is formed on an upper side and outer side-surfaces of the pixel electrode to cover the intermediate layer and the gap.

Abstract: An OLED device includes an active layer on a substrate; a first insulating layer covering the active layer, and including a first opening and a first insulation island in the first opening, separated from an inner surface of the first opening; a gate electrode on the first insulating layer including gate bottom and top electrodes; a pixel electrode on the first insulation island on the same layer as the gate bottom electrode; source and drain electrodes insulated from the gate electrode and electrically connected to the active layer; a second insulating layer between the gate and the source and drain electrodes, and including a second opening exposing the pixel electrode; a light-reflecting portion in the openings, and surrounding the pixel electrode; an intermediate layer on the pixel electrode and including an organic emissive layer; and an opposite electrode facing the pixel electrode with the intermediate layer interposed between them.

Abstract: A thin-film transistor (TFT) array substrate includes an active layer on a substrate and a lower electrode of a capacitor on the same level as the active layer, a first insulation layer on the active layer and the lower electrode and having a first gap exposing an area of the lower electrode; a gate electrode of the TFT on the first insulation layer, and an upper electrode of the capacitor on the lower electrode and the first insulation layer, the upper electrode having a second gap that exposes the first gap and a portion of the first insulation layer; a second insulation layer disposed between the gate electrode and source electrode and drain electrodes, and not disposed on the upper electrode, in the first gap of the first insulation layer, or in the second gap of the lower electrode.

Abstract: A thin film transistor array substrate includes a thin film transistor on a substrate, the thin film transistor including an active layer, a gate electrode, a source electrode, and a drain electrode; a capacitor including a lower electrode in a same layer as the active layer and an upper electrode in a same layer as the gate electrode; a pixel electrode in a same layer as the gate electrode and the upper electrode; a first insulation layer between the active layer and the gate electrode and between the lower electrode and the upper electrode; a second insulation layer on the first insulation layer, a protection layer extending along side surfaces of the lower electrode, and a third insulation layer on the protection layer and exposing the pixel electrode.

Abstract: Adverse effects of variation in threshold voltage are reduced. In a semiconductor device, electric charge is accumulated in a capacitor provided between a gate and a source of a transistor, and then, the electric charge accumulated in the capacitor is discharged; thus, the threshold voltage of the transistor is obtained. After that, current flows to a load. In the semiconductor device, the potential of one terminal of the capacitor is set higher than the potential of a source line, and the potential of the source line is set lower than the potential of a power supply line and the cathode side potential of the load.

Abstract: A circuit board includes: a first wiring layer provided on a substrate; an insulating layer including an opening, the insulating layer being provided on the first wiring layer; a surface-energy control layer provided in a region opposed to the opening of the insulating layer on the first wiring layer, the surface-energy control layer controlling surface energy of the first wiring layer; a semiconductor layer provided in a selective region on the insulating layer; and a second wiring layer on the insulating layer, the second wiring layer being electrically connected to the semiconductor layer, and being electrically connected to the first wiring layer through the opening.

Abstract: A display device having a first pixel electrode and a second pixel electrode whose areas are different from each other is provided. In the display device, the first pixel electrode and the second pixel electrode are electrically connected to a first transistor and a second transistor, respectively. Gates of the first transistor and the second transistor are electrically connected to each other. A potential is supplied to the first pixel electrode and the second pixel electrode through a wiring electrically connected to the first transistor and the second transistor.

Abstract: An electronic device includes a silicon carbide layer including an n-type drift region therein, a contact forming a Schottky junction with the drift region, and a p-type junction barrier region on the silicon carbide layer. The p-type junction barrier region includes a p-type polysilicon region forming a P-N heterojunction with the drift region, and the p-type junction barrier region is electrically connected to the contact.

Abstract: A vertical GaN-based blue LED has an n-type GaN layer that was grown over a ZnS layer that in turn was grown directly on a silicon substrate. In one example, the ZnS layer is a transitional buffer layer that is 50 nm thick, and the n-type GaN layer is at least 2000 nm thick. Growing the n-type GaN layer on the ZnS buffer layer reduces lattice defect density in the n-type layer. The ZnS buffer layer provides a good lattice constant match with the silicon substrate and provides a compound polar template for subsequent GaN growth. After the epitaxial layers of the LED are formed, a conductive carrier is wafer bonded to the structure. The silicon substrate and the ZnS buffer layer are then removed. Electrodes are added and the structure is singulated to form finished LED devices.

Abstract: A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.

Abstract: A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source.

Abstract: A method of growing a III-nitride-based epitaxial structure includes providing a substrate in an epitaxial growth reactor and heating the substrate to a predetermined temperature. The method also includes flowing a gallium-containing gas into the epitaxial growth reactor and flowing a nitrogen-containing gas into the epitaxial growth reactor. The method further includes flowing a gettering gas into the epitaxial growth reactor. The predetermined temperature is greater than 1000° C.

Abstract: A semiconductor device includes a III-nitride substrate having a first conductivity type and a first electrode electrically coupled to the III-nitride substrate. The semiconductor device also includes a III-nitride material having a second conductivity type coupled to the III-nitride substrate at a regrowth interface and a p-n junction disposed between the III-nitride substrate and the regrowth interface.

Abstract: An LED array includes a substrate, protrusions formed on a top surface of the substrate, and LEDs formed on the top surface of the substrate and located at a top of the protrusions. The LEDs are electrically connected with each other. Each LED includes a connecting layer, an n-type GaN layer, an active layer, and a p-type GaN layer formed on a top of the protrusions in sequence. A bottom surface of the n-type GaN layer connecting the connecting layer has a roughened exposed portion. The bottom surface of the n-type GaN layer has an N-face polarity.

Abstract: High electron mobility transistors (HEMTs) including a substrate and a HEMT stack on the substrate, the HEMT stack including a compound semiconductor layer that includes a 2-dimensional electron gas (2DEG), an upper compound semiconductor layer that has a polarization index higher than a polarization index of the compound semiconductor layer, and a source electrode, a drain electrode, and a gate that are disposed on the upper compound semiconductor layer. The substrate may be a nitride substrate that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of a silicon substrate. The substrate may include an insulating layer that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of the silicon substrate, a metal layer that is deposited on the insulating layer, and a plate that is attached to the metal layer.

Abstract: A power amplifier includes a semiconductor substrate including transistor cells, a drain electrode for the transistor cells located on the semiconductor substrate, a drain pad located on the semiconductor substrate and connected to the drain electrode, an ion-implanted resistance located in the semiconductor substrate and extending along and in contact with the drain pad, a floating electrode located on the semiconductor substrate and in contact with the ion-implanted resistance, and an output matching circuit located outside the semiconductor substrate. The power amplifier further includes a wire connecting the drain pad to the output matching circuit.

Abstract: A semiconductor device includes a buffer layer that is disposed over a substrate, a high-resistance layer that is disposed over the buffer layer, the high-resistance layer being doped with a transition metal for achieving high resistance, a low-resistance region that is disposed in a portion of the high-resistance layer or over the high-resistance layer, the low-resistance region being doped with an impurity element for achieving low resistance, an electron travel layer that is disposed over the high-resistance layer including the low-resistance region, an electron supply layer that is disposed over the electron travel layer, a gate electrode that is disposed over the electron supply layer, and a source electrode and a drain electrode that are disposed over the electron supply layer.

Abstract: The semiconductor transistor according the present invention includes an active layer composed of a GaN-based semiconductor and a gate insulating film formed on the active layer. The gate insulating film has a first insulating film including one or more compounds selected from the group consisting of Al2O3, HfO2, ZrO2, La2O3, and Y2O3 formed on the active layer, and a second insulating film composed of SiO2 formed on the first insulating film.

Abstract: The invention concerns an optoelectronic component (1) for mixing electromagnetic radiation having different wavelengths, more particularly in the far field. At least one first semiconductor chip (3) for emitting electromagnetic radiation in a first spectral range is provided on a carrier (2). Furthermore, at least one second semiconductor chip (4, 4a, 4b) for emitting electromagnetic radiation in a second spectral range is provided on the carrier (2). The first and the second spectral ranges differ from one another. The at least one first semiconductor chip (3) and the at least one second semiconductor chip (4, 4a, 4b) are arranged in a single package. The at least one first semiconductor chip (3) is optically isolated from the at least one second semiconductor chip (4, 4a, 4b) by a barrier (5). The at least one first semiconductor chip (3) and the at least one second semiconductor chip (4, 4a, 4b) are in each case arranged centosymmetrically about a common center o(Z) of symmetry.

Abstract: A Schottky barrier diode (SBD) is provided, which improves electrical characteristics and optical characteristics by securing high crystallinity by including an n-gallium nitride (GaN) layer and a GaN layer which are doped with aluminum (Al). In addition, by providing a p-GaN layer on the Al-doped GaN layer, a depletion layer may be formed when a reverse current is applied, thereby reducing a leakage current. The SBD may be manufactured by etching a part of the Al-doped GaN layer and growing a p-GaN layer from the etched part of the Al-doped GaN layer. Therefore, a thin film crystal is not damaged, thereby increasing reliability. Also, since dedicated processes for ion implantation and thermal processing are not necessary, simplified process and reduced cost may be achieved.

Abstract: A substrate capable of achieving a lowered probability of defects produced in a step of forming an epitaxial film or a semiconductor element, a semiconductor device including the substrate, and a method of manufacturing a semiconductor device are provided. A substrate is a substrate having a front surface and a back surface, in which at least a part of the front surface is composed of single crystal silicon carbide, the substrate having an average value of surface roughness Ra at the front surface not greater than 0.5 nm, a standard deviation ? of that surface roughness Ra not greater than 0.2 nm, an average value of surface roughness Ra at the back surface not smaller than 0.3 nm and not greater than 10 nm, standard deviation ? of that surface roughness Ra not greater than 3 nm, and a diameter D of the front surface not smaller than 110 mm.

Abstract: A first layer has a first conductivity type. A second layer is provided on the first layer such that a part of the first layer is exposed, and it has a second conductivity type. First to third impurity regions penetrate the second layer and reach the first layer. Each of the first and second impurity regions has the first conductivity type. The third impurity region is arranged between the first and second impurity regions and it has the second conductivity type. First to third electrodes are provided on the first to third impurity regions, respectively. A Schottky electrode is provided on the part of the first layer and electrically connected to the first electrode.

Abstract: First, second, fourth, and fifth impurity regions have a first conductivity type, and a third impurity region has a second conductivity type. The first to third impurity regions reach a first layer having the first conductivity type. The fourth and fifth impurity regions are provided on a second layer. First to fifth electrodes are provided on the first to fifth impurity regions, respectively. Electrical connection is established between the first and fifth electrodes, and between the third and fourth electrodes. A sixth electrode is provided on a gate insulating film covering a portion between the fourth and fifth impurity regions.

Abstract: The present invention is a light emitting device apparatus and method of fabrication. The structure employs a waveguide in the lateral (x) direction formed via materials index, resonant wavelength and/or current-induced index changes. In the vertical (y) direction a resonant optical cavity is formed via distributed Bragg reflector and/or metal mirrors with sufficient reflectivity so as to create a substantial standing wave. The light is thereby constricted to propagate in the longitudinal (z) direction. A tapered output section may be employed to suppress lasing in the longitudinal direction or to losslessly transfer the light from the confined section to a resonant output coupler. Conversely, feedback may be employed to induce lasing in the longitudinal direction by suitable means, such as a periodic variation in the material index, resonant wavelength, gain or loss. The resonant output coupler may be formed by suitable means, such as mirror or cavity modulation.

Abstract: Disclosed is an integrated apparatus including an isolative substrate, a plurality of driver chips provided on a side of the isolative substrate, a power supply provided on the side of the isolative substrate and electrically connected to the driver chips, and LED chips provided on another side of the isolative substrate and electrically connected to the driver chips. Thus, the driver chips, the power supply and the LED chips are integrated on the isolative substrate. The production is easy. The integrated apparatus is not vulnerable to surges and lightning strikes. Electromagnetic interferences are reduced. Heat radiation of the integrated apparatus is excellent so that the LED chips are protected from thermal effect.

Abstract: A display substrate for a display device includes a substrate, a switching device, a gate line, a data line, a pixel electrode, a plurality of common electrodes. The switching device includes an active pattern, a gate insulation layer, a gate electrode, a source electrode and a drain electrode. The gate line is electrically connected to the source electrode, and the data line is electrically coupled to the gate electrode. The pixel electrode is electrically connected to the drain electrode, and the common electrodes are disposed on the pixel electrode. A coupling capacitance among the common electrodes and the data line can be prevented and/or reduced to prevent a signal delay of the data line. Further, an aperture ratio of the display substrate can be improved by changing a layout of the data line and the gate line.

Abstract: A LED light strip module structure includes a substrate and LED dies. The substrate has first and second surfaces. Accommodating cavities are formed on the first surface and extend toward the second surface. Each accommodating cavity has a bottom surface. Bonding metal layers are respectively attached to the bottom surfaces of the accommodating cavities. The LED die includes a crystal layer and a combination metal layer combined together. The LED dies are disposed in the accommodating cavities, respectively, so that the combination metal layer and the bonding metal layer form eutectic bonding. In addition, a diamond film layer may be disposed between the crystal layer and the combination metal layer, so that the LED die and the substrate can possess the stable and secure positioning effect and the thermoconductive speed and effect can be enhanced to lengthen the lifetime of the LED die through the diamond film layer.

Abstract: An organic layer deposition apparatus, and a method of manufacturing an organic light-emitting display device by using the organic layer deposition apparatus. Here, the organic layer deposition apparatus includes a deposition source assembly. The deposition source assembly includes a first deposition source for discharging a deposition material, a second deposition material stacked on the first deposition source and discharging a different deposition material than the deposition material discharged from the first deposition source, a second deposition source nozzle unit disposed at a side of the second deposition source to face a deposition target and including a plurality of second deposition source nozzles, and a first deposition source nozzle unit disposed at the side of the second deposition source to face the deposition target and including a plurality of first deposition source nozzles formed to pass through the second deposition source.

Abstract: Discussed are an organic light emitting display device and a method of manufacturing the same in which organic and inorganic films are formed on a polarization plate, and the polarization plate is attached to an organic light emitting panel so that the organic and inorganic films seal the organic light emitting panel, thereby achieving improved polarization and a simple sealing structure.

Abstract: Aspects of the present disclosure provide for manufacturing an organic light emitting diode (OLED) by forming two terminals of the OLED on two substrates of the display, and then depositing a plurality of layers of the OLED on one or both of the two terminals to form a first portion and a second portion of the OLED on each substrate. The two portions are joined together to form an assembled OLED. The deposition of the two portions can be stopped with each portion having approximately half of a common layer exposed. The two portions can then be aligned to be joined together and an annealing process can be employed to join together the two parts of the common layer and thereby form the OLED.

Abstract: A display device includes an electrode layer formed at a predetermined position on a substrate, an insulating film having a through-hole formed on the top of the electrode layer, and a wiring film connected to the electrode layer via the through-hole formed in the insulating film. Based on a surface of the substrate, the through-hole includes a first taper portion having a first taper angle, a second taper portion formed higher than the first taper portion and having a second taper angle different from the first taper angle, and a third taper portion formed higher than the second taper portion and having a third taper angle different from the second taper angle.

Abstract: An LED module includes a first dielectric layer, and a first patterned conductive layer having first, second, and third die-bonding pads. Each die-bonding pad includes a pad body having a die-bonding area, and an extension extended from the pad body. The extension of the first die-bonding pad extends in proximity to the die-bonding area of the second die-bonding pad. The extension of the second die-bonding pad extends in proximity to the die-bonding area of the third die-bonding cad. A second dielectric layer disposed on the first patterned conductive layer includes three dielectric members corresponding respectively to the die-bonding pads of the first patterned conductive layer. Each dielectric member includes a chip-receiving hole exposing the die-bonding area of a respective die-bonding pad for attachment of an LED chip thereto, and a wire-passage hole spaced apart from the chip-receiving hole to expose partially the first patterned conductive layer for bonding a wire.

Abstract: A vertical GaN-based blue LED has an n-type GaN layer that was grown directly on Low Resistance Layer (LRL) that in turn was grown over a silicon substrate. In one example, the LRL is a low sheet resistance GaN/AlGaN superlattice having periods that are less than 300 nm thick. Growing the n-type GaN layer on the superlattice reduces lattice defect density in the n-type layer. After the epitaxial layers of the LED are formed, a conductive carrier is wafer bonded to the structure. The silicon substrate is then removed. Electrodes are added and the structure is singulated to form finished LED devices. In some examples, some or all of the LRL remains in the completed LED device such that the LRL also serves a current spreading function. In other examples, the LRL is entirely removed so that no portion of the LRL is present in the completed LED device.

Abstract: An interface including roughness components for improving the propagation of radiation through the interface is provided. The interface includes a first profiled surface of a first layer comprising a set of large roughness components providing a first variation of the first profiled surface having a first characteristic scale and a second profiled surface of a second layer comprising a set of small roughness components providing a second variation of the second profiled surface having a second characteristic scale. The first characteristic scale is approximately an order of magnitude larger than the second characteristic scale. The surfaces can be bonded together using a bonding material, and a filler material also can be present in the interface.

Abstract: A vertical GaN-based blue LED has an n-type layer comprising multiple conductive intervening layers. The n-type layer contains a plurality of periods. Each period of the n-type layer includes a gallium-nitride (GaN) sublayer and a thin conductive aluminum-gallium-nitride (AlGaN:Si) intervening sublayer. In one example, each GaN sublayer has a thickness substantially more than 100 nm and less than 1000 nm, and each AlGaN:Si intervening sublayer has a thickness less than 25 nm. The entire n-type layer is at least 2000 nm thick. The AlGaN:Si intervening layer provides compressive strain to the GaN sublayer thereby preventing cracking. After the epitaxial layers of the LED are formed, a conductive carrier is wafer bonded to the structure. The silicon substrate is then removed. Electrodes are added and the structure is singulated to form a finished LED device. Because the AlGaN:Si sublayers are conductive, the entire n-type layer can remain as part of the finished LED device.

Abstract: Disclosed is a fluorescent coating and a method for making the same. At first, fluorescent powder is mixed with an anti-electrostatic solution. The mixture is cleared of impurities before it is dried and sintered. Thus, the fluorescent powder is coated with the anti-electrostatic material. The fluorescent powder coated with the anti-electrostatic material is plated on a side of a light-emitting diode (“LED”) chip by electrophoresis, thus forming a mixing zone on the side of the LED chip. Hence, the mixing zone is not vulnerable to deterioration or itiolation when it is subjected to heat in use. Accordingly, the life of the LED chip is long, and the illumination of the LED chip is high.

Abstract: According to one embodiment, a semiconductor light emitting device having a base, a mounting material and a chip of a semiconductor light emitting element is provided. The mounting material is provided on the base. The chip of the semiconductor light emitting element is fixed onto the base via the mounting material. The chip of the semiconductor light emitting element is provided with a sapphire substrate, an active region, a light shielding portion and anode and cathode electrodes for supplying an electric power to the active region. The active region is provided on the sapphire substrate and has a light emitting layer for emitting light by supplying electric power. The light shielding portion is formed on the sapphire substrate on the side of the mounting material. The light shielding portion prevents the mounting material from being irradiated with the light produced in the light emitting layer.

Abstract: A manufacturing method for an LED with roughened lateral surfaces comprises following steps: providing an LED wafer with an electrically conductive layer disposed thereon; providing a photoresist layer on the electrically conductive layer; roughening a lateral surface of the electrically conductive layer by wet etching; forming a depression in the LED wafer by dry etching and roughening a sidewall of the LED wafer defining the depression; and disposing two pads respectively in the depression and the conducting layer. The disclosure also provides an LED with roughened lateral surfaces. A roughness of the roughened lateral surfaces is measurable in micrometers.

Abstract: Organic light emitting devices are provided. The organic light emitting device may include a substrate having a first refractive index, a first electrode on the substrate, a second electrode disposed between the substrate and the first electrode and having a thickness equal to or greater than one-hundredth of a minimum wavelength of visible light and equal to or smaller than five-hundredths of a maximum wavelength of the visible light, and an organic light emitting layer disposed between the first and second electrodes and having a second refractive index.