Patents Issued in February 14, 2013
  • Publication number: 20130039123
    Abstract: A nonvolatile memory cell is able to reduce the size per the unit area by employing a dual gate structure where the chalcogenide compound is used for a channel. The nonvolatile memory cell includes a phase-change layer, a first and a second gate that are in contact with sides of the phase-change layer to face each other across the phase-in change layer and control a current flowing through the phase-change layer by each gate being arranged to induce the phase transition of the phase-change layer independently of the other.
    Type: Application
    Filed: September 14, 2012
    Publication date: February 14, 2013
    Inventors: Hae-Chan PARK, Gap-Sok Do, Jang-Uk Lee
  • Publication number: 20130039124
    Abstract: A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
    Type: Application
    Filed: October 19, 2012
    Publication date: February 14, 2013
    Inventors: Hye-jin KIM, Kwang-jin LEE, Du-eung KIM
  • Publication number: 20130039125
    Abstract: A method for minimizing program disturb in Flash memories. To reduce program disturb in a NAND Flash memory cell string where no programming from the erased state is desired, a local boosted channel inhibit scheme is used. In the local boosted channel inhibit scheme, the selected memory cell in a NAND string where no programming is desired, is decoupled from the other cells in the NAND string. This allows the channel of the decoupled cell to be locally boosted to a voltage level sufficient for inhibiting F-N tunneling when the corresponding wordline is raised to a programming voltage. Due to the high boosting efficiency, the pass voltage applied to the gates of the remaining memory cells in the NAND string can be reduced relative to prior art schemes, thereby minimizing program disturb while allowing for random page programming.
    Type: Application
    Filed: October 16, 2012
    Publication date: February 14, 2013
    Applicant: MOSAID TECHNOLOGIES INCORPORATED
    Inventor: Jin-Ki KIM
  • Publication number: 20130039126
    Abstract: Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of 5 first memory cells selected simultaneously by a word line. Thereafter, the write circuit writes the data on a second page into the plurality of first memory cell. Then, the write circuit writes the data on the first and second pages into second memory cells adjoining 10 the first memory cells in the bit line direction.
    Type: Application
    Filed: October 10, 2012
    Publication date: February 14, 2013
    Inventors: Noboru SHIBATA, Tomoharu Tanaka
  • Publication number: 20130039127
    Abstract: Non-Volatile Static Random Access Memory (NVSRAM) cell devices applying only one single non-volatile element embedded in a conventional Static Random Access Memory (SRAM) cell are disclosed. The NVSRAM cell devices can be integrated into a compact cell array. The NVSRAM devices of the invention have a read/write speed of a conventional SRAM and non-volatile property of a non-volatile memory cell. The methods of operations for the NVSRAM devices of the invention are also disclosed.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Inventor: Lee WANG
  • Publication number: 20130039128
    Abstract: A method of operation of a non-volatile dynamic random access memory system including: accessing a dynamic random access memory; managing a delay-locked-loop control in the dynamic random access memory; sourcing timing inputs to the dynamic random access memory by a control logic unit with the delay-locked-loop control disabled including: selecting a back-up interface through a first multiplexer and a second multiplexer, asserting an on-board termination, and accessing data in the dynamic random access memory by the control logic unit at a lower frequency; and enabling a memory control interface by the control logic unit, with the delay-locked-loop control enabled including: selecting a host interface through the first multiplexer, the second multiplexer, or a combination thereof, disabling the on-board termination, and accessing the data in the dynamic random access memory by the memory control interface at a delay-locked-loop frequency.
    Type: Application
    Filed: August 11, 2011
    Publication date: February 14, 2013
    Applicant: SMART MODULAR TECHNOLOGIES, INC.
    Inventors: Mike H. Amidi, Kelvin Marino
  • Publication number: 20130039129
    Abstract: Memory devices and methods of operating memory devices are disclosed. In one such method, different blocks of memory cells have different configurations of user data space and overhead data space. In at least one method, overhead data is distributed within more than one block of memory cells. In another method, blocks are reconfigurable responsive to particular operating modes and/or desired levels of reliability of user data stored in a memory device.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Inventors: William H. RADKE, Tommaso Vali, Michele Incarnati
  • Publication number: 20130039130
    Abstract: Disclosed is a program method of a nonvolatile memory device including applying a first program voltage to a word line of a memory cell; verifying a variation of a threshold voltage of the memory cell; and applying a second program voltage to a memory cell having a threshold voltage higher than a reference level, the second program voltage being lower in level than the first voltage pulse.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 14, 2013
    Inventor: Ji-Sang Lee
  • Publication number: 20130039131
    Abstract: Systems and methods are disclosed for increasing the performance of static random access memory (SRAM). Various systems herein, for example, may include or involve dual- or multi-pipe, multi-bank SRAMs, such as Quad-B2 SRAMs. In one illustrative implementation, there is provided an SRAM memory device including a memory array comprising a plurality of SRAM banks and pairs of separate and distinct pipes associated with each of the SRAM banks, wherein each pair of pipes may provide independent access to its associated SRAM bank.
    Type: Application
    Filed: December 15, 2011
    Publication date: February 14, 2013
    Inventors: Robert Haig, Patrick Chuang, Chih Tseng, Mu-Hsiang Huang
  • Publication number: 20130039132
    Abstract: Described embodiments are directed to line drivers, such as those for providing reduced gate induced drain leakage in a memory array. Corresponding methods of operation of line drivers are also disclosed.
    Type: Application
    Filed: August 8, 2011
    Publication date: February 14, 2013
    Inventors: Tae H. Kim, Howard C. Kirsch, Yu-Wen Huang, Mingshiang Wang, Todd A. Merritt
  • Publication number: 20130039133
    Abstract: According to an embodiment, an apparatus includes a data storage device. Data to be stored in the data storage device is level shifted from a first voltage domain to a second voltage domain prior to being stored within the data storage device. The data storage device is powered by the second voltage domain. The apparatus further includes a circuit that is powered by the second voltage domain and that is responsive to data output by the data storage device.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Christopher Edward Koob, Jen Tsung Lin, Manojkumar Pyla, Martin Saint-Laurent
  • Publication number: 20130039134
    Abstract: A semiconductor device includes a plurality of memory arrays and a plurality of memory array control circuits. Each of the plurality of memory array control circuits includes a read/write control circuit for controlling a read/write operation for the memory array, and a selection circuit for selecting and activating the memory array based on a clock signal and an output signal from the read/write control circuit.
    Type: Application
    Filed: August 3, 2012
    Publication date: February 14, 2013
    Inventors: Hisashi Iwamoto, Yuji Yano, Kazunari Inoue
  • Publication number: 20130039135
    Abstract: A method of performing write operations in a memory device including a plurality of banks is performed. Each bank includes two or more sub-banks including at least a first sub-bank and a second sub-bank. The method comprises: performing a first row cycle for writing to a first word line of the first sub-bank, the first row cycle including a plurality of first sub-periods, each sub-period for performing a particular action; and performing a second row cycle for writing to a first word line of the second sub-bank, the second row cycle including a plurality of second sub-periods of the same type as the plurality of first sub-periods. The first row cycle overlaps with the second row cycle, and a first type sub-period of the first sub-periods overlaps with a second type sub-period of the second sub-periods, the first type and second type being different types.
    Type: Application
    Filed: August 8, 2012
    Publication date: February 14, 2013
    Inventors: Uk-song KANG, Chul-woo PARK, Hak-soo YU, Hong-sun HWANG
  • Publication number: 20130039136
    Abstract: A semiconductor device includes a memory cell, a first bit line coupled to the memory cell, a second bit line, a first sense amplifier circuit including first and second transistors, the first transistor including a gate coupled to the first bit line, and the first and second transistors are coupled in series between the second bit line and a first voltage line, a temperature detection circuit configured to detect a temperature of the semiconductor device, and a control circuit configured to receive an output of the temperature detection circuit and supply a control signal to a gate of the second transistor.
    Type: Application
    Filed: October 16, 2012
    Publication date: February 14, 2013
    Applicant: Elpida Memory, Inc.
    Inventor: Elpida Memory, Inc.
  • Publication number: 20130039137
    Abstract: A Static Random Access Memory (SRAM) includes word lines WL, bit lines BL, address decoders that select one of the word lines WL in response to an address signal AD, a sense amplifier that is activated in response to a sense amplifier enable signal SAE, and a sense amplifier control circuit that generates the sense amplifier enable signal SAE. In this device, the more distant the word line WL is from the sense amplifier, the longer the sense amplifier control circuit sets the delay time of the sense amplifier enable signal SAE so that the more distant the word line WL is from the sense amplifier, the later the sense amplifier is activated.
    Type: Application
    Filed: October 17, 2012
    Publication date: February 14, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: International Business Machines Corporation
  • Publication number: 20130039138
    Abstract: Methods for providing redundancy and apparatuses are disclosed. One such method for providing redundancy performs a mapping of data between an address of a memory determined to indicate a defective memory cell and an address of a redundant area of the memory, only after the data has been loaded into a buffer. The direction of the mapping is determined by the operation (e.g., programming or reading).
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Inventors: Violante Moschiano, Giovanni Santin, Maria L. Gallese, Luigi Pilolli
  • Publication number: 20130039139
    Abstract: A method of stressing and screening static random access memory (SRAM) arrays to identify memory cells with bit line side pass transistor defects. After writing initial data states into the memory array under nominal bias conditions, an elevated bias voltage is applied to the memory array, for example to its power supply node. Under the elevated bias voltage, alternating data patterns are written into and read from the memory array for a selected duration. The elevated bias voltage is reduced, and a write screen is performed to identify defective memory cells. The dynamic stress of the repeated writes and reads accelerates early life failures, facilitating the write screen.
    Type: Application
    Filed: February 10, 2012
    Publication date: February 14, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jayesh C. Raval, Beena Pious, Stanton Petree Ashburn, James Craig Ondrusek
  • Publication number: 20130039140
    Abstract: Methods and apparatus for executing internal operations of memory devices utilizing instructions stored in the memory array of the memory device are disclosed. Decode blocks adapted to interpret instructions and data stored in the memory device are also disclosed. Methods can be used to perform internal self-test operations of the memory device by executing test procedures stored in the memory array of the memory device performing a self-test operation.
    Type: Application
    Filed: October 15, 2012
    Publication date: February 14, 2013
    Applicant: Micron Technology, Inc.
    Inventor: Micron Technology, Inc.
  • Publication number: 20130039141
    Abstract: An apparatus, system, and method are disclosed for power reduction management. The method includes determining that a power source has failed to supply electric power above a predefined threshold. The method includes terminating one or more non-essential in-process operations on a nonvolatile memory device during a power hold-up time. The method includes executing one or more essential in-process operations on the nonvolatile memory device within the power hold-up time.
    Type: Application
    Filed: October 15, 2012
    Publication date: February 14, 2013
    Applicant: FUSION-IO
    Inventor: FUSION-IO
  • Publication number: 20130039142
    Abstract: An input buffer circuit includes a logic unit, a clock enable buffer, and a clock buffer. The logic unit is configured to receive a clock signal and a clock enable signal, and to output a decision signal indicative of whether the clock signal is normally input, where the decision signal is activated when the clock signal is normally input. The clock enable buffer is configured to buffer the clock enable signal and to activate an internal clock enable signal, in response to an activation of the decision signal. The clock buffer is configured to buffer the clock signal and to output an internal clock signal, in response to an activation of the internal clock enable signal.
    Type: Application
    Filed: October 18, 2012
    Publication date: February 14, 2013
    Inventors: Hyoung-Seok Kim, Kwan-Yong Jin
  • Publication number: 20130039143
    Abstract: A semiconductor memory device includes a first data input/output unit configured to receive a normal training data, whose data window is scanned based on an edge of a source clock, in response to a training input command, and output a data in a state where an edge of the data window is synchronized with the edge of the source clock in response to a training output command, and a second data input/output unit configured to receive a recovery information training data, whose data window is scanned based on the edge of the source clock, in response to the training input command, and output a data in a state where an edge of a data window is synchronized with the edge of the source clock in response to the training output command.
    Type: Application
    Filed: October 26, 2012
    Publication date: February 14, 2013
    Applicant: SK hynix Inc.
    Inventor: SK hynix Inc.
  • Publication number: 20130039144
    Abstract: Apparatus, systems, and methods are disclosed that operate to generate a clock signal in a die in a stack and to receive the clock signal in another die in the stack. Additional apparatus, systems, and methods are disclosed.
    Type: Application
    Filed: October 15, 2012
    Publication date: February 14, 2013
    Applicant: Micron Technology, Inc.
    Inventor: Micron Technology, Inc.
  • Publication number: 20130039145
    Abstract: Presented herein is a mixing apparatus to mix liquid and solids, solids and solids, liquids and liquids or combinations thereof into a homogenous solution in a sealed container shaken in a side to side, up and down, and/or orbital pattern with a warming plate to heat the contents to a desired temperature or for a specific time period with a decreased risk of foreign contaminants in accordance with prescribed instructions for preparing a mixture.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Applicant: EAZY ENTERPRISES LLC
    Inventors: Felicia Lynne Pollaro, Mark Brian Docherty
  • Publication number: 20130039146
    Abstract: A precision metering device is in provided that includes a device having a first chamber and a second chamber, a piston disposed in the first chamber that divides the first chamber into a mixing portion and a driving portion and a second piston disposed in a second chamber that defines a concentrate portion in the second chamber. The concentrate portion of the second chamber is in fluid communication with the mixing portion of the first chamber. Methods of adding concentrate to a solvent are provided that utilize the provided metering device.
    Type: Application
    Filed: December 21, 2010
    Publication date: February 14, 2013
    Inventors: Andrew M. Candelora, Robert E. Astle, Laurence W. Bassett
  • Publication number: 20130039147
    Abstract: Devices are disclosed for obtaining data of a sample, particularly data capable of being processed to produce an image of a region of the sample. An exemplary device includes a light-beam source, an acoustic-wave source, an optical element, and an acoustic detector. The optical element is transmissive to a light beam produced by the light-beam source and reflective to acoustic waves produced by the acoustic-wave source. The optical element is situated to direct the transmitted light beam and reflected acoustic wave simultaneously along an optical axis to be incident at a situs in or on a sample to cause the sample to produce acoustic echoes from the incident acoustic waves while also producing photoacoustic waves from the incident light beam photoacoustically interacting with the situs. The acoustic detector is placed to receive and detect the acoustic echoes and the photoacoustic waves from the situs. The acoustic detector can comprise one or more hydrophones exploiting the acousto-electric effect.
    Type: Application
    Filed: January 25, 2011
    Publication date: February 14, 2013
    Inventors: Russell S. Witte, Leonardo Gabriel Montilla, Ragnar Olafsson, Charles M. Ingram, Zhaohui Wang, Robert A. Norwood, Charles Greenlee
  • Publication number: 20130039148
    Abstract: A seismic survey array that includes one or more streamers adjustably fixed to a towing vessel by at least a first deflected lead-in and a second deflected lead-in and at least one group of source arrays having one or more devices for generating pulses in water vessel. The array is further provided with means for laterally and/or longitudinally changing the position of the source array(s) with respect to the vessel and/or its direction of motion, the means including a wire and winching system. The means for adjusting the position of the source arrays further includes a wire or rope with one end fixed to one front end of the units and extending from the unit to the adjacent lead-in and back to a capstan arranged on the front end of the unit.
    Type: Application
    Filed: June 21, 2011
    Publication date: February 14, 2013
    Applicant: CGGVERITAS SERVICES (NORWAY) AS
    Inventor: Jan-Age Langeland
  • Publication number: 20130039149
    Abstract: A disclosed data acquisition system includes one or more streamers having multiple spaced apart sensor units. At least one sensor unit includes at least one digital sensor employing a quantized feedback loop to produce a digital output signal. A data recording system collects and stores data from the sensor units. The quantized feedback loop may be adapted to exert a quantized force on the sensing element. A described method for acquiring data includes deploying at least one streamer having multiple spaced apart sensor units, where at least a portion of the sensor units include a digital sensor employing a quantized feedback loop to produce a digital output signal. A stimulus event is triggered. Data is received from the sensor units and stored.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Inventors: STIG RUNE LENNART TENGHAMN, Frederick James Barr
  • Publication number: 20130039150
    Abstract: It is an object to maintain a processing speed while increasing accuracy of a sonar image. Disclosed is a phased-array synthetic-aperture sonar system, including: a plurality of phased array processors (9) which perform, in parallel, phased array processing for a plurality of incoming data; a phased array distribution device (8) which distributes each simultaneously incoming data to the plurality of phased array processors (9), the incoming data being input from a plurality of receivers disposed in a platform; a synthetic aperture processor (11) which performs synthetic aperture processing by using a plurality of phased array processing results; and a data-shaping buffer device (10) which transfers the phased array processing results output from the plurality of phased array processors (9) to the synthetic aperture processor (11) in the order of receipt of the incoming data.
    Type: Application
    Filed: March 18, 2011
    Publication date: February 14, 2013
    Applicants: Japan Agency for Marine-Earth Science and Technology, Hitachi Information & Control Solutions, Ltd.
    Inventors: Jin Goto, Tomohito Ebina, Takao Sawa
  • Publication number: 20130039151
    Abstract: A mixer circuit includes three square wave mixers and a combiner. A first square wave mixer in the circuit multiplies an input signal with a first square wave. A second square wave mixer and a third square wave mixer in the circuit each multiplies the input signal with a second square wave and a third square wave respectively. The second and third square waves have a same frequency as the first square wave, but phases that respectively lead and lag the phase of the first square wave by a first value. The combiner adds the outputs of the mixers. A low-pass filter external to the mixer circuit filters the sum generated by the combiner to generate a filtered output. In an embodiment, the first value equals forty five degrees, and the filtered output is rendered free of products generated by third and fifth harmonics of the first square wave square.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vajeed Nimran P. A., Shabbir Amjhera Wala, Shagun Dusad, Sandeep Oswal, Visvesvaraya Appala Pentakota
  • Publication number: 20130039152
    Abstract: A hand-vision sensing device and a hand-vision sensing glove are provided. The hand-vision sensing device includes a prompting device, a controller, an ultrasonic sensor and a chromaticity sensor, in which the controller is connected to the ultrasonic sensor, the prompting device and the chromaticity sensor respectively, and two groups of ultrasonic sensors exist. The hand-vision sensing glove includes a glove main body and the hand-vision sensing device disposed on the glove main body. Through the hand-vision sensing glove, a position of an object is detected in a short distance, so that the blind person can be fast aware of a peripheral space formed by the object when using the hand-vision sensing glove, thereby assisting the blind person in manual operation and life.
    Type: Application
    Filed: March 20, 2012
    Publication date: February 14, 2013
    Applicant: SHENZHEN DIANBOND TECHNOLOGY CO., LTD
    Inventor: Ping Liu
  • Publication number: 20130039153
    Abstract: An anti-biofouling casing for a seismic streamer is described, the anti-biofouling casing including a polymer system having a hydrophobically-modified base polymer, the hydrophobically-modified base polymer including a base polymer having a backbone and a hydrophobically derivatized chain extender coupled to the backbone of the base polymer. The polymer system including between about 0.1% and 10% of the hydrophobically derivatized chain extender by weight. The anti-fouling casing including a hydrophobic surface that serves to prevent biofouling of the surface.
    Type: Application
    Filed: July 19, 2012
    Publication date: February 14, 2013
    Applicant: WESTERNGECO L.L.C.
    Inventors: ROBERT SETH HARTSHORNE, GARY JOHN TUSTIN
  • Publication number: 20130039154
    Abstract: A portable electronic device provides audio output, such as from a media player application controllable by an ultrasonic remote control signal. Audio processing circuitry, which is normally configured to process audio signals in the human audible range, is configured by a controller to operate in an ultrasonic signal processing mode to detect an ultrasonic control signal, such as generated by a specialized headset. Such a configuration permits the portable electronic device to process ultrasonic control signals using native audio processing circuitry, without the need to add expensive hardware. The ultrasonic signal processing mode is initiated in response to a detected ultrasonic signal processing condition, such as detection of an active media player application or other application software or system software having an audio output function.
    Type: Application
    Filed: August 10, 2011
    Publication date: February 14, 2013
    Applicant: RESEARCH IN MOTION LIMITED
    Inventors: Scott Edward BULGIN, John Douglas MCGINN
  • Publication number: 20130039155
    Abstract: A timepiece includes:—a barrel bridge (33), and—a barrel mounted on the barrel bridge, the barrel having:—a drum (20) which includes an end wall and side walls,—an arbor (14) which passes through the centre of the drum,—a leaf spring housed in the drum and engaging at a first end with the arbor and at a second end with the drum, and—a cover (28) through which the arbor passes freely and which closes the drum,—a ratchet wheel (30) secured to the arbor to tension the leaf spring. The drum is pivoted by a first ball bearing including an intermediate ring (36), an inner ring (42) secured to the arbor and an outer ring (38), one of the intermediate ring and the outer ring being fixed to the barrel bridge and the other being secured to the end wall.
    Type: Application
    Filed: April 26, 2011
    Publication date: February 14, 2013
    Applicant: ETERNA SA FABRIQUE D'HORLOGERIE
    Inventor: Patrick Kury
  • Publication number: 20130039156
    Abstract: A timepiece includes twelve first light sources spaced in a ring around a 360 degree range on a clock body. The first light sources are controlled to illuminate successively one at a time in a clockwise direction to indicate the hour. The timepiece may include either a minute hand connected with a clock mechanism, or 60 minute strips disposed in radiating directions and evenly spaced around a 360 degree range on the clock body. A plurality of second light sources are distributed along the minute hand or the minute strips. The minute hand is controlled to rotate 360 degrees clockwise. The minute strips are controlled to illuminate alternately in a clockwise direction to indicate the minute. The amount or the position of the illuminated second light sources indicates the second.
    Type: Application
    Filed: August 11, 2011
    Publication date: February 14, 2013
    Inventor: Chia-Yen Lin
  • Publication number: 20130039157
    Abstract: A method and apparatus for multitrack recording of audio information using handheld digital electronic devices are described. Recording of video tracks complementing the audio is also contemplated. One device serves as master; others, slaves. Transmission of start and stop recording signals by the master may facilitate synchronization of the tracks. Slaves may begin preliminary sampling of audio information prior to the start signal, preparing to promptly begin actual track recording. Upon receiving the command to start recording, each slave chooses as first frame that sample closest to the signal to record. The task of stopping recording is typically handled similarly. A recording device may store an indicator for determining the offset of its first frame, facilitating time interpolation of samples in its track. In this way, all audio tracks, for example, might be transformed to a common set of times. The master might also record a track.
    Type: Application
    Filed: August 28, 2012
    Publication date: February 14, 2013
    Applicant: BBY SOLUTIONS, INC.
    Inventor: Nigel Waites
  • Publication number: 20130039158
    Abstract: Address information that has been error correction encoded is recorded on a second version of a recording medium after being transformed such that such that the address decoding cannot be performed by a playback device that is not compatible with the second version of the recording medium. The address decoding for the second version of the recording medium cannot be performed by the incompatible playback device (for example, a playback device that was manufactured to be compatible only with a first version of the recording medium). In other words, in the playback device that is not compatible with the second version of the recording medium, a state is created in which address errors cannot be corrected, so access is impossible (recording and playback are impossible).
    Type: Application
    Filed: September 28, 2012
    Publication date: February 14, 2013
    Applicant: Sony Corporation
    Inventor: Sony Corporation
  • Publication number: 20130039159
    Abstract: Amplitude and frequency of a high-frequency signal superposed on a reproduction laser beam are changed in accordance with a reproduction spot diameter on the surface of the recording layer upon discrimination of an optical disk in initial adjustment after insertion of the optical disk and change of a layer of a multi-layer optical disk. Further, the high-frequency signal is not superposed on the reproduction laser beam until end of the discrimination and change to a target layer upon discrimination of the optical disk and change of a layer of a multi-layer optical disk.
    Type: Application
    Filed: October 15, 2012
    Publication date: February 14, 2013
    Applicant: HITACHI LTD.
    Inventor: Hitachi Ltd.
  • Publication number: 20130039160
    Abstract: An apparatus and method for recording a micro-hologram are provided. The micro-hologram recording apparatus includes a first light source configured to emit a first light, the first light being coherent, a first optical system configured to divide the first light into a signal beam and a reference beam, and supply the signal beam and the reference beam to a location on a hologram recording medium, a second light source configured to emit a second light, the second light being incoherent and not interfering with the signal beam and the reference beam, and a second optical system configured to supply the second light to the same location as the signal beam and the reference beam on the hologram recording medium.
    Type: Application
    Filed: August 8, 2012
    Publication date: February 14, 2013
    Applicant: Samsung Electronics, Co., Ltd.
    Inventors: Kyungsuk PYUN, Andrew PUTILIN, Alexander MOROZOV, Gee-young SUNG, Chil-sung CHOI
  • Publication number: 20130039161
    Abstract: An element holding device of the present invention includes: a guide portion engaging with a guide shaft; a lens fixing portion on which to fix a collimator lens; an arm portion; an insertion portion having a hole portion in which to insert a guide shaft; a wire fixing portion made by protruding a side surface of the insertion portion in a ?Y direction; and a wire fixed on the wire fixing portion. A bent portion being a leading end portion of the wire is housed in a slit. Thereby, excess deformation of a contact portion is suppressed.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 14, 2013
    Applicants: SANYO OPTEC DESIGN CO. LTD., SANYO ELECTRIC CO., LTD.
    Inventors: Mitsuhiro HASHIMOTO, Koichi MATSUYAMA
  • Publication number: 20130039162
    Abstract: There are provided a code division multiplexing method as well as a transmitting device and a receiving device using the method. The method performs code division multiplexing of a plurality of signals by using a code matrix, the code matrix comprising a plurality of code words, the number of which is the same as the number of the plurality of signals, with each code word comprising a plurality of chips, the method comprising: multiplying each signal of the plurality of signals by each chip of a corresponding code word respectively; and calculating a sum of products of the respective chips in each code word and the corresponding signals to form a plurality of multiplexed signals, wherein, corresponding chips of the respective code words constitute multiple sets of chips, and only one term in differences or sums of any one set of chips and one set of chips among other sets of chips is not zero.
    Type: Application
    Filed: March 22, 2011
    Publication date: February 14, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Zhi Zhang, Ming Xu, Masayuki Hoshino, Daichi Imamura
  • Publication number: 20130039163
    Abstract: Methods of allocating orthogonal resources of a wireless communication network to a user equipment (UE) that uses transmit diversity are disclosed. In one or more embodiments, the UE is configured to transmit a reference symbol and a modulated symbol on multiple orthogonal resources on an antenna. The method includes: selecting, by the UE, a first and a second orthogonal resource, respectively, from a plurality of orthogonal resources according to the state of information bits to be communicated by the UE; and transmitting, by the UE, the reference and data symbols on the first and the second orthogonal resource, respectively, on one antenna. The first and the second resource are different for at least one of the states of the information bits. The first and the second resource are both in the same physical resource block.
    Type: Application
    Filed: May 8, 2012
    Publication date: February 14, 2013
    Inventors: Youn Hyoung Heo, Robert Mark Harrison, Masoud Ebrahimi Tazeh Mahalleh
  • Publication number: 20130039164
    Abstract: A wireless communication apparatus of the invention has a determination section that determines which one of a plurality of formats is used for determining transmission symbols to be transmitted to another communication apparatus; a control section that determines a type a sequence length of an orthogonal code and used for assigning ACK/NACK symbols to identical symbols in an identical slot on basis of the format determined by the determination section, without depending on a number of transmission symbols capable of being transmitted to the other communication apparatus; a spreading section that spreads the ACK/NACK symbols by an identical type of orthogonal code in the plurality of formats set based on the type and the sequence length of the orthogonal code determined by the control section; and a transmission section that transmits the spread ACK/NACK symbols using the determined format.
    Type: Application
    Filed: April 15, 2011
    Publication date: February 14, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Ayako Horiuchi, Seigo Nakao, Akihiko Nishio, Daichi Imamura
  • Publication number: 20130039165
    Abstract: A discrete Fourier calculation device includes a twiddle factor table storage unit that stores therein a twiddle factor table that associates twiddle factors with phases of the corresponding twiddle factors; a correction value specifying unit that specifies first and second correction values for correcting a phase of an input signal in accordance with an amplitude of the input signal; a generating unit that corrects the phase of the input signal by using the specified first and second correction values to generate first and second phases; an addition unit that adds an arbitrary phase corresponding to an arbitrary twiddle factor stored in the twiddle factor table, to each of the generated first and second phases; and a rotation calculation unit that acquires, from the twiddle factor table, first and second twiddle factors corresponding to the first and second phases and sums the acquired first and second twiddle factors.
    Type: Application
    Filed: June 27, 2012
    Publication date: February 14, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Jun KAMEYA
  • Publication number: 20130039166
    Abstract: According to one aspect of the present disclosure, a method and technique for hierarchical network failure handling in a clustered node environment is disclosed. The method includes: detecting a network failure by a node in a cluster, the cluster having plural nodes arranged in a hierarchy, wherein the network failure is associated with a subordinate node in the hierarchy to the detecting node; communicating the network failure from the detecting node to a superior node in the hierarchy; determining whether the network failure affects nodes higher than the detecting node in the hierarchy; and responsive to determining that the network failure does not affect nodes higher than the detecting node in the hierarchy, the detecting node initiating a protocol to expel the subordinate node from the cluster.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William B. Brown, Robert K. Gjertsen, David J. Craft
  • Publication number: 20130039167
    Abstract: A Connection Fault Management (CFM) maintenance point and method for providing Data Driven Connection Fault Management (DDCFM) in CFM maintenance points in a communication network. A Reflection Responder, an REM Receiver, and a Decapsulator Responder are implemented in existing CFM maintenance points. The Reflection Responder selects frames to be reflected, mirrors the selected frames if a Continuation option is set, and encapsulates the selected frames with Return Frame Message (RFM) OpCode. The RFM Receiver sends received RFM frames to an analyzer if addressed to the maintenance point and otherwise to a passive multiplexer, The Decapsulator Responder decapsulates Send Frame Message (SFM) frames and sends decapsulated frames toward the destination specified in each frame.
    Type: Application
    Filed: October 17, 2012
    Publication date: February 14, 2013
    Applicant: TELEFONAKTIEBOLAGET L M ERICSON (PUBL)
    Inventor: TELEFONAKTIEBOLAGET L M ERICSSON (PUB
  • Publication number: 20130039168
    Abstract: Systems and methods are described for wireless backhaul in a multiple antenna system (MAS) with multi-user (MU) transmissions (“MU-MAS”). For example, a multiuser (MU) multiple antenna system (MAS) of one embodiment comprises: one or more centralized units communicatively coupled to multiple distributed transceiver stations via a network; the network consisting of wireline or wireless links or a combination of both, employed as a backhaul communication channel; the centralized unit transforming the N streams of information into M streams of bits, each stream of bits being a combination of some or all N streams of information; the M streams of bits being sent over the network to the distributed transceiver stations; the distributed transceiver stations simultaneously sending the streams of bits over wireless links to at least one client device such that at least one client device receives at least one of the original N streams of information.
    Type: Application
    Filed: October 2, 2012
    Publication date: February 14, 2013
    Inventors: Antonio Forenza, Stephen G. Perlman
  • Publication number: 20130039169
    Abstract: In a method (400) for routing packets between a plurality of top switches (110a-110n) and a plurality of leaf switches (120a-120n) using a balancing table (204, 208, 210) in a fat tree network (100), a failed link between at least one top switch (110n) and at least one leaf switch (120n) is detected (402). In addition, the balancing table (204, 208, 210) is modified (406) based on the detected failed link, and the packets are routed (408) between the plurality of top switches (110a-110n) and the plurality of leaf switches (120a-120n) in the fat tree network (100) based on the modified balancing table (204, 208, 210).
    Type: Application
    Filed: April 30, 2010
    Publication date: February 14, 2013
    Inventors: Michael Schlansker, Jean Tourrilhes, Yoshio Turner
  • Publication number: 20130039170
    Abstract: A method for providing an uplink over an access ring comprising access devices and at least one aggregation device, wherein each device of said access ring has ring interfaces connecting said device to neighboring devices in said access ring, wherein one access device of said access ring is configured as a ring master device which sends connectivity check messages on both its ring interfaces around said access ring to itself to detect a connectivity failure in said access ring, and wherein said ring master device changes a state of one of its ring interfaces depending on the detection result.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Inventor: Seth Higgins
  • Publication number: 20130039171
    Abstract: Techniques are provided for frequency spectrum sharing that allows secondary operators to access a frequency band of a primary operator without interfering with the primary operator's use of the band, while ensuring service continuity for devices of the secondary operators. For example, there is provided a method that may involve identifying an outage on a first channel of a plurality of channels of a spectrum, wherein each of the plurality of channels is allocated to one of a plurality of operators. The method may involve migrating all mobile stations in communication over the first channel of the plurality of channels to at least one other channel of the plurality of channels during the outage.
    Type: Application
    Filed: May 10, 2012
    Publication date: February 14, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Peter Gaal, Alan Barbieri, Rajat Prakash, Yi Huang
  • Publication number: 20130039172
    Abstract: A communication apparatus communicates with multiple sources and includes an interface that receives from a given source among the sources, information indicating a data volume of source data that is at the given source and to be acquired by the communication apparatus as an executor; and a processor that based on the received information, judges whether the given source is to be an acquisition target, and acquires from the given source that has been judged to be an acquisition target, the source data to be acquired by the communication apparatus.
    Type: Application
    Filed: June 13, 2012
    Publication date: February 14, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Nobutaka IMAMURA