Patents Issued in April 9, 2013
-
Patent number: 8415154Abstract: The present invention relates to a method for producing adaptive regulatory T cells from effector T cells by contacting the effector T cells with retinoic acid. Adaptive regulatory T cells produced by this method are Foxp3+, home to the gut, and are refractory to reversion in vivo. As such, such cells find application in the treatment of autoimmune disease and facilitating transplantation tolerance.Type: GrantFiled: May 29, 2008Date of Patent: April 9, 2013Assignee: Trustees of Dartmouth CollegeInventor: Randolph J. Noelle
-
Patent number: 8415155Abstract: Methods and composition for the production of cardiomyocytes from differentiation of pluripotent stem cells are provided. For example, in certain aspects methods including differentiating pluripotent stem cells in a large volume of suspension culture in the presence of ROCK inhibitors are described. In further aspects, methods for differentiation of stem cells into cardiomyocytes that overcome variability between different stem cell clones and different batch of culture medium are provided.Type: GrantFiled: October 19, 2010Date of Patent: April 9, 2013Assignee: Cellular Dynamics International, Inc.Inventors: Casey Stankewicz, Matt Riley, Nathaniel Beardsley, Wen Bo Wang, Peter Fuhrken, Steven Kattman
-
Patent number: 8415156Abstract: The present disclosure related to isolated laminin-521, methods for making recombinant laminin-521, host cells that express recombinant laminin-521, and compositions containing laminin-521. Laminin-521 can maintain stem cells in vitro pluripotency, enable self-renewal, and enable single cell survival of human embryonic stem cells. When pluripotent human embryonic stem cells are cultured on plates coated with a matrix of recombinant laminin-521 (laminin 11), in the absence of differentiation inhibitors or feeder cells, the embryonic stem cells proliferate and maintain their pluripotency. It has also been discovered that human recombinant laminin-521 (laminin-11) provides single cell survival of stem cells after complete dissociation into a single cell suspension. Useful cell culture mediums containing at most 3.9 ng/ml of beta fibroblast growth factor (bFGF) are also described herein.Type: GrantFiled: December 16, 2011Date of Patent: April 9, 2013Assignee: Biolamina ABInventors: Karl Tryggvason, Sergey Rodin
-
Patent number: 8415157Abstract: A cell culture chamber and a cell culture method that are capable of effectively constructing an intercellular network in a culture space are provided. A cell culture chamber (10)according to the present invention is a cell culture chamber (10)including a plurality of microchambers (11) formed on a surface thereof, characterized in that convex portions (side walls 12) that partition the microchambers (11) adjacent to each other are formed to prevent cells from being adhered to upper surfaces of the convex portions. Consequently, cells can be cultured exclusively within the microchambers (11), and an intercellular network can be constructed effectively.Type: GrantFiled: September 9, 2011Date of Patent: April 9, 2013Assignee: KURARAY Co., Ltd.Inventors: Go Tazaki, Tomoko Kosaka, Motohiro Fukuda
-
Patent number: 8415158Abstract: The present invention relates to cell culture methods and compositions that are essentially serum-free and comprise a basal salt nutrient solution and an ErbB3 ligand.Type: GrantFiled: February 29, 2012Date of Patent: April 9, 2013Assignee: ViaCyte, Inc.Inventors: Allan J Robins, Thomas C Schulz
-
Patent number: 8415159Abstract: The present invention pertains to the development of Extracellular Matrix (ECM) scaffolds derived from the forestomach of a ruminant. Such scaffolds are useful in many clinical and therapeutic applications, including wound repair, tissue regeneration, and breast reconstruction. In addition, the present invention features methods of isolating ECM scaffolds from mammalian organs, including but not limited to the ruminant forestomach. The invention further features laminated ECM scaffolds containing a polymer positioned between individual ECM sheets. The polymer may optionally contain bioactive molecules to enhance the functionality of the scaffold.Type: GrantFiled: July 30, 2009Date of Patent: April 9, 2013Assignee: Mesynthes Ltd.Inventors: Brian Roderick Ward, Keryn Dallas Johnson, Barnaby Charles Hough May
-
Patent number: 8415160Abstract: Disclosed is a transfection method, which includes the steps of: (a) adhering the gene fragments to dry ice particles; (b) adding the dry ice particles into the medium/liquid that contains target cells; and (c) transporting the gene fragments into the target cells via the micro explosion/sublimation of the dry ice particles. In addition, the gene fragments can also adhere first to nanoparticles, which can then adhere to dry ice particles. Subsequently, gene fragments enter cells by micro explosion/sublimation. The present invention can be applied in transgenic research on prokaryotic, eukaryotic, plant and animal cells and in the development of new species in agriculture.Type: GrantFiled: November 30, 2010Date of Patent: April 9, 2013Assignee: National Yang Ming UniversityInventors: Fu-Jen Kao, Yung-En Kuo
-
Patent number: 8415161Abstract: The present invention reagents and methods for setting up an instruments having a multiplicity of detector channels for analyzing a multiplicity of fluorescent dyes. The present invention is particularly applicable in the field of flow cytometry.Type: GrantFiled: November 10, 2009Date of Patent: April 9, 2013Assignee: Becton, Dickinson and CompanyInventors: Ming Yan, Alan M. Stall, Joseph T. Trotter, Robert A. Hoffman
-
Patent number: 8415162Abstract: Described herein are methods for determining an amount of an analyte in a test sample. The methods involve preparing a calibration curve using standard samples containing an isotopically-labeled standard in a biological matrix.Type: GrantFiled: August 3, 2012Date of Patent: April 9, 2013Assignee: PerkinElmer Health Sciences, Inc.Inventors: Blas Cerda, Alex Cherkasskiy
-
Patent number: 8415163Abstract: Disclosed is a method of diagnosing renal dysfunction in a cat by removing cauxin from cat urine and detecting a protein in the cat urine sample from which cauxin has been removed. Cauxin is removed from cat urine by bringing the cat urine into contact with a lectin or with an anti-cauxin antibody that specifically binds to cauxin. Cauxin may be removed using a column filled with a carrier that is bound to the lectin or to the anti-cauxin antibody. The lectin may be Lens culinaris lectin. Detection of the cat urinary protein from which cauxin has been removed is performed with a urine test strip.Type: GrantFiled: August 16, 2012Date of Patent: April 9, 2013Assignees: Incorporated National University Iwate University, Nippon Zenyaku Kogyo Co., Ltd.Inventors: Tetsuro Yamashita, Yasuyuki Suzuta
-
Patent number: 8415164Abstract: A method for authenticating and verifying an item to be genuine is described. The method for authenticating the item comprises applying a particular nucleic acid material associated with a particular sequence of nucleic acid bases to ink within an ink cartridge or a toner compound within a toner housing. The method also comprises collecting a sample of either the ink or toner compound and verifying the ink or toner is genuine by detecting the particular nucleic acid material.Type: GrantFiled: December 11, 2007Date of Patent: April 9, 2013Assignee: APDN (B.V.I.) Inc.Inventors: James A. Hayward, Ming-Hwa Liang, John Davis
-
Patent number: 8415165Abstract: A method for authenticating and verifying garment to be genuine is described. The method for authenticating a garment comprises applying a particular nucleic acid material/marker associated with a particular sequence of nucleic acid bases to a dye or paint and applying the marker to the garment. The method also comprises collecting a sample from the garment and verifying the garment is genuine by detecting the particular nucleic acid material on or within the garment.Type: GrantFiled: December 11, 2007Date of Patent: April 9, 2013Assignee: APDN (B.V.I.), Inc.Inventors: Ming-Hwa Liang, Stephane Shu Kin So, James Hayward
-
Patent number: 8415166Abstract: The present invention provides a device for the detection of a peroxide-based explosive, in particular, triacetone triperoxide (TATP), which is based on a molecular controlled semiconductor resistor (MOCSER) and composed of at least one insulating or semi-insulating layer, at least one conducting semiconductor layer, two conducting pads and a layer of multifunctional organic molecules capable of adsorbing molecules of the peroxide-based explosive. The invention further provides an array of semiconductor devices for the selective detection of a peroxide-based explosive, as well as a method for the selective detection of vapors of a peroxide-based explosive in a gaseous mixture using this array.Type: GrantFiled: May 12, 2009Date of Patent: April 9, 2013Assignee: Yeda Research and Development Co. Ltd.Inventors: Ron Naaman, Eyal Capua, Roberto Cao
-
Patent number: 8415167Abstract: It is an object of the present invention to provide: an oxygen indicator aqueous solution for an oxygen detector that has high heat resistance, can be stored at room temperature, and can maintain an excellent ability to detect oxygen, regardless of the atmospheric temperature; an oxygen detector; and a method for manufacturing an oxygen detector. In order to achieve this object, there is provided an oxygen indicator aqueous solution for an oxygen detector that is an aqueous solution comprising reducing saccharides, a basic substance, and a redox dye reduced by the reducing saccharides, the aqueous solution comprising, as the reducing saccharides, a monosaccharide as a first component and a reducing trisaccharide as a second component. In addition, there is provided a manufacturing method preferred for the manufacturing of the oxygen detector.Type: GrantFiled: October 19, 2010Date of Patent: April 9, 2013Assignee: Powdertech Co., Ltd.Inventors: Ryuichi Kodama, Mitsuyuki Sato
-
Patent number: 8415168Abstract: An apparatus for capillary ion chromatography comprising a suppressor comprising flow-through ion exchange packing in a housing and capillary tubing formed of a permselective ion exchange membrane, and at least partially disposed in said ion exchange packing. Also, a recycle conduit for aqueous liquid from the detector to the packing. Further, the capillary tubing may have weakly acidic or weakly basic functional groups. Also, a method for using the apparatus.Type: GrantFiled: May 23, 2012Date of Patent: April 9, 2013Assignee: Dionex CorporationInventors: Yan Liu, Victor Manuel Berber Barreto, Christopher A. Pohl, Nebojsa Avdalovic
-
Patent number: 8415169Abstract: A tube and float system for use in separation and axial expansion of the buffy coat includes a transparent or semi-transparent, flexible sample tube and a rigid separator float having a specific gravity intermediate that of red blood cells and plasma. The float includes a main body portion of reduced diameter to provide a clearance gap between the inner wall of the sample tube and the float. One or more protrusions on the main body portion serve to support the flexible tube. During centrifugation, the centrifugal force causes the diameter of the flexible tube to expand and permit density-based axial movement of the float in the tube. The float further includes a pressure relief system to alleviate pressure build up in the trapped red blood cell blood fraction below the float, thereby preventing red blood cells from being forced into the annular gap containing the buffy coat layers.Type: GrantFiled: February 13, 2012Date of Patent: April 9, 2013Assignee: Battelle Memorial InstituteInventors: Thomas Haubert, Vince Contini, Steve Grimes, Randy Jones, Stephen C. Wardlaw
-
Patent number: 8415170Abstract: The invention provides a method for continuously detecting glucose concentration in a sample, including: (a) providing a biosensor comprising a transducer and a polysaccharide covered on the surface of the transducer; (b) providing a carbohydrate binding protein solution, wherein the carbohydrate binding protein has at least one receptor, and the receptor is capable of binding to the polysaccharide and glucose; (c) mixing a sample and the carbohydrate binding protein solution to form a mixture; (d) contacting the mixture with the biosensor; (e) detecting the amount of carbohydrate binding proteins bound to the polysaccharide by the biosensor, wherein glucose concentration of the sample is inversely proportional to the amount of carbohydrate binding proteins bound to the polysaccharide; and (f) refreshing the surface of the biosensor with a high concentration glucose solution.Type: GrantFiled: March 4, 2010Date of Patent: April 9, 2013Assignee: Industrial Technology Research InstituteInventors: Kun-Feng Lee, Chien-An Chen, Hong-Wen Chang, Yuh-Jiuan Lin
-
Patent number: 8415171Abstract: Described herein are systems and methods for extending the dynamic range of assay methods and systems used for determining the concentration of analyte molecules or particles in a fluid sample. In some embodiments, a method comprises spatially segregating a plurality of analyte molecules in a fluid sample into a plurality of locations. At least a portion of the locations may be addressed to determine the percentage of said locations containing at least one analyte molecule. Based at least in part on the percentage, a measure of the concentration of analyte molecules in the fluid sample may be determined using an analog, intensity-based detection/analysis method/system and/or a digital detection/analysis method/system. In some cases, the assay may comprise the use of a plurality of capture objects.Type: GrantFiled: March 24, 2010Date of Patent: April 9, 2013Assignee: Quanterix CorporationInventors: David M. Rissin, David Fournier, David C. Duffy
-
Patent number: 8415173Abstract: A gel microdrop composition is provided. In certain embodiments, the gel microdrop composition contains a polymer matrix, an effector particle that releases an effector molecule into the polymer matrix, a first reporter particle that emits a first optically detectable signal and a second reporter particle that emits a second optically detectable signal that is distinguishable from the first optically detectable signal, where the effector particle and said first and second reporter particles are encapsulated by the polymer matrix. Methods of screening that employ the gel microdrop composition and methods of making the gel microdrop composition are also disclosed.Type: GrantFiled: August 26, 2011Date of Patent: April 9, 2013Assignee: Crystal Bioscience Inc.Inventor: William Don Harriman
-
Patent number: 8415174Abstract: In a light-emitting element provided with a thick layer of a plurality of EL layers which are partitioned by a charge generation layer between a pair of electrodes, a portion which a conductive foreign substance enters between the pair of electrodes emits stronger light at a voltage lower than a voltage required when a normal portion starts emitting light. In a light-emitting element provided with a plurality of EL layers which are partitioned by a charge generation layer between a pair of electrodes, a voltage may be applied thereto in the forward direction. Then, an abnormal light-emission portion may be detected because the portion emits light at a luminance of 1 (cd/m2) or higher when the applied voltage is lower than a voltage required when a normal portion starts emitting light. The portion may be irradiated with laser light so as to be insulated.Type: GrantFiled: July 22, 2010Date of Patent: April 9, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Koichiro Tanaka
-
Patent number: 8415175Abstract: A semiconductor wafer includes multiple dies and a die identification region adjacent to or on each die. The die identification region can include a wafer indicator and a pattern of die locations representing die locations on the wafer. A die identification marker is provided in each pattern of die locations in the die identification region specifying a location of a respective die on the wafer.Type: GrantFiled: June 15, 2011Date of Patent: April 9, 2013Assignee: Truesense Imaging, Inc.Inventors: Shen Wang, Robert P. Fabinski, James E. Doran, Laurel J. Pace, Eric J. Meisenzahl
-
Patent number: 8415176Abstract: To reduce the pixel size to the smallest dimensions and simplest form of operation, a pixel may be formed by using only one ion sensitive field-effect transistor (ISFET). This one-transistor, or 1T, pixel can provide gain by converting the drain current to voltage in the column. Configurable pixels can be created to allow both common source read out as well as source follower read out. A plurality of the 1T pixels may form an array, having a number of rows and a number of columns and a column readout circuit in each column.Type: GrantFiled: June 30, 2011Date of Patent: April 9, 2013Assignee: Life Technologies CorporationInventor: Keith Fife
-
Patent number: 8415177Abstract: A two-transistor (2T) pixel comprises a chemically-sensitive transistor (ChemFET) and a selection device which is a non-chemically sensitive transistor. A plurality of the 2T pixels may form an array, having a number of rows and a number of columns. The ChemFET can be configured in a source follower or common source readout mode. Both the ChemFET and the non-chemically sensitive transistor can be NMOS or PMOS device.Type: GrantFiled: June 30, 2011Date of Patent: April 9, 2013Assignee: Life Technologies CorporationInventors: Keith Fife, Kim Johnson, Mark Milgrew
-
Patent number: 8415178Abstract: A process includes preparing a base material having a first surface provided with an element generating energy that is used for discharging a liquid and an electrode layer that is connected to the element; forming a hollow on a second surface, which is the surface on the opposite side of the first surface, of the base material, wherein part of the electrode layer serves as the bottom face of the hollow; covering the surface of the base material and the bottom face forming the inner face of the hollow with an insulating film; and partially exposing the electrode layer by removing part of the insulating film covering the bottom face using laser light.Type: GrantFiled: August 30, 2010Date of Patent: April 9, 2013Assignee: Canon Kabushiki KaishaInventors: Souta Takeuchi, Masaya Uyama, Hirokazu Komuro
-
Patent number: 8415179Abstract: A light emitting diode and a light emitting diode (LED) manufacturing method are disclosed. The LED comprises a substrate; a first n-type GaN layer; a second n-type GaN layer; an active layer; and a p-type GaN layer formed on the substrate in sequence; the second n-type GaN layers has a bottom surface interfacing with the first n-type GaN layer, a rim of the bottom surface has a roughened exposed portion, and Ga—N bonds on the bottom surface has an N-face polarity.Type: GrantFiled: December 2, 2011Date of Patent: April 9, 2013Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Tzu-Chien Hung, Shun-Kuei Yang, Chia-Hui Shen
-
Patent number: 8415180Abstract: Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S105, a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11a of a gallium oxide substrate 11. After the growth of the buffer layer 13, while supplying a gas G2, which contains hydrogen and nitrogen, into a growth reactor 10, the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.Type: GrantFiled: March 1, 2010Date of Patent: April 9, 2013Assignees: Sumitomo Electric Industries, Ltd., Koha Co., Ltd.Inventors: Shin Hashimoto, Katsushi Akita, Kensaku Motoki, Shinsuke Fujiwara, Hideaki Nakahata
-
Patent number: 8415181Abstract: Provided is a light emitting element, a light emitting device including the same, and fabrication methods of the light emitting element and light emitting device. The light emitting device comprises a substrate, a light emitting structure including a first conductive layer of a first conductivity type, a light emitting layer, and a second conductive layer of a second conductivity type which are sequentially stacked, a first electrode which is electrically connected with the first conductive layer; and a second electrode which is electrically connected with the second conductive layer and separated apart from the first electrode, wherein at least a part of the second electrode is connected from a top of the light emitting structure, through a sidewall of the light emitting structure, and to a sidewall of the substrate.Type: GrantFiled: January 4, 2012Date of Patent: April 9, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Yu-Sik Kim, Seong-Deok Hwang, Seung-Jae Lee, Sun-Pil Youn
-
Patent number: 8415182Abstract: A manufacturing method of a thin film transistor array substrate is provided. In the method, a substrate having a display region and a sensing region is provided. At least a display thin film transistor is formed in the display region, a first sensing electrode is formed in the sensing region, and an inter-layer dielectric layer is disposed on the substrate, covers the display thin film transistor, and exposes the first sensing electrode. A patterned photo sensitive dielectric layer is then formed on the first sensing electrode. A patterned transparent conductive layer is subsequently formed on the substrate, wherein the patterned transparent conductive layer includes a pixel electrode coupled to the corresponding display thin film transistor and includes a second sensing electrode located on the patterned photo sensitive dielectric layer. A manufacturing method of a liquid crystal display panel adopting the aforementioned thin film transistor array substrate is also provided.Type: GrantFiled: December 22, 2009Date of Patent: April 9, 2013Assignee: Au Optronics CorporationInventors: An-Thung Cho, Chia-Tien Peng, Yuan-Jun Hsu, Ching-Chieh Shih, Chien-Sen Weng, Kun-Chih Lin, Hang-Wei Tseug, Ming-Huang Chuang
-
Patent number: 8415183Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. The method includes providing a wafer. The wafer has light-emitting diode (LED) devices formed thereon. The method includes immersing the wafer into a polymer solution that has a surface tension lower than that of acetic acid. The polymer solution contains a liquid polymer and phosphor particles. The method includes lifting the wafer out of the polymer solution at a substantially constant speed. The method includes drying the wafer. The above processes form a conformal coating layer at least partially around the LED devices. The coating layer includes the phosphor particles. The coating layer also has a substantially uniform thickness.Type: GrantFiled: November 22, 2010Date of Patent: April 9, 2013Assignee: TSMC Solid State Lighting Ltd.Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Hung-Yi Kuo, Hung-Wen Huang
-
Patent number: 8415184Abstract: A light emitting diode for harsh environments includes a substantially transparent substrate, a semiconductor layer deposited on a bottom surface of the substrate, several bonding pads, coupled to the semiconductor layer, formed on the bottom surface of the substrate, and a micro post, formed on each bonding pad, for electrically connecting the light emitting diode to a printed circuit board. An underfill layer may be provided between the bottom surface of the substrate and the top surface of the printed circuit board, to reduce water infiltration under the light emitting diode substrate. Additionally, a diffuser may be mounted to a top surface of the light emitting diode substrate to diffuse the light emitted through the top surface.Type: GrantFiled: May 9, 2011Date of Patent: April 9, 2013Assignee: Sensors for Medicine and Science, Inc.Inventors: Jason D. Colvin, Arthur E. Colvin, Jr., Andrew DeHennis, Jody L. Krsmanovic
-
Patent number: 8415185Abstract: In a process for fabrication of an optical slot waveguide on silicon, a thin single-crystal silicon film is deposited on a substrate covered with an insulating buried layer; a local thermal oxidation is carried out over the entire depth of the thin single-crystal silicon film in order to form an insulating oxidized strip extending along the desired path of the waveguide; an insulating or semi-insulating layer is deposited on the silicon film; two openings having vertical sidewalls are excavated over the entire thickness of this insulating or semi-insulating layer, said openings being separated by a narrow gap constituting an insulating or semi-insulating vertical wall that will be the material of the slot; single-crystal silicon is grown in the openings and right to the edges of the insulating or semi-insulating wall; and then the upper part of the silicon is etched in order to complete the geometry of the waveguide.Type: GrantFiled: December 13, 2011Date of Patent: April 9, 2013Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, Alcatel Lucent, Centre National de la Recherche Scientifique, Universite Paris-SUD 11Inventors: Jean-Marc Fedeli, Guang-Hua Duan, Delphine Marris-Morini, Gilles Rasigade, Laurent Vivien, Melissa Ziebell
-
Patent number: 8415186Abstract: The present invention provides a method of super flat chemical mechanical polishing (SF-CMP) technology, which is a method characterized in replacing laser lift-off in a semiconductor fabricating process. SF-CMP has a main step of planting a plurality of polishing stop points before polishing the surface, which is characterized by hardness of the polishing stop points material being larger than hardness of the surface material. Therefore, the present method can achieve super flat polishing surface without removing polishing stop points.Type: GrantFiled: August 10, 2007Date of Patent: April 9, 2013Assignee: Hong Kong Applied Science and Technology Research Institute Co. Ltd.Inventors: Yong Cai, Hung-Shen Chu
-
Patent number: 8415187Abstract: Methods for forming semiconductor devices include providing a crystalline template having an initial grain size, annealing the crystalline template, the annealed template having a final grain size larger than the initial grain size, forming a buffer layer over the annealed template, and forming a semiconductor layer over the buffer layer.Type: GrantFiled: January 28, 2010Date of Patent: April 9, 2013Assignee: Solexant CorporationInventors: Leslie G. Fritzemeier, Christopher J. Vineis
-
Patent number: 8415188Abstract: A method for manufacturing a nitride semiconductor laser element has: (a) forming a nitride semiconductor layer on a substrate; (b) forming a ridge on a surface of the nitride semiconductor; (c) forming a first protective film on the nitride semiconductor layer including the ridge; (d) removing the first protective film from at least a top face of the ridge; (e) forming a conductive layer composed of a two or more of multilayer film with different compositions on the first protective film and the nitride semiconductor layer including the ridge, and introducing a gap at locations of at least at the uppermost conductive layer corresponding to the base portion from the ridge shoulders; and (f) removing part of the conductive layer through a gap to form a void defined by the first protective film and the conductive layer at least on the ridge base portions.Type: GrantFiled: September 6, 2011Date of Patent: April 9, 2013Assignee: Nichia CorporationInventors: Hitoshi Maegawa, Mitsuhiro Nonaka, Yasunobu Sugimoto
-
Patent number: 8415189Abstract: Image sensors include a pixel region and a logic region. Pixel isolation regions in the pixel region include pixel isolation region walls that are less sloped than logic isolation region walls in the logic region. An impurity layer also may be provided adjacent at least some of the pixel isolation region walls, wherein at least some of the logic isolation region walls are free of the impurity layer. The impurity layer and/or the less sloped logic isolation region walls may also be provided for NMOS devices in the logic region but not for PMOS devices in the logic region. Doped sacrificial layers may be used to fabricate the impurity layer.Type: GrantFiled: July 30, 2009Date of Patent: April 9, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Doowon Kwon, Seung-Hun Shin
-
Patent number: 8415190Abstract: The invention provides a semiconductor device manufactured with a plurality of photodiodes so that it does not short circuit, and includes an opening without leakage. A second semiconductor layer (12, 16) of second conductivity type is formed on a main surface of a first semiconductor layer (10, 11) of the first conductivity type. Element-separating regions (13, 14, 15, 17) are formed at least on the second semiconductor layer to separate the device into the regions of photodiodes (PD1-PD4). A conductive layer (18) is formed on the second semiconductor layer 16 in a divided pattern that provides a segment for each photodiode and is connected to the second semiconductor layer (16) along the an outer periphery with respect to all photodiodes. An insulation layer (19, 21) is formed on the entire surface to cover conductive layer (18). An opening, which reaches the second semiconductor layer (16), is formed in the insulation layer (19, 21) in the region inside the pattern of conductive layer (18).Type: GrantFiled: August 16, 2011Date of Patent: April 9, 2013Assignee: Texas Instruments IncorporatedInventors: Yohichi Okumura, Hiroyuki Tomomatsu
-
Patent number: 8415191Abstract: Embodiments relate to micromachine structures. In one embodiment, a micromachine structure includes a first electrode, a second electrode, and a sensing element. The sensing element is mechanically movable and is disposed intermediate the first and second electrodes and adapted to oscillate between the first and second electrodes. Further, the sensing element includes a FinFET structure having a height and a width, the height being greater than the width.Type: GrantFiled: August 26, 2011Date of Patent: April 9, 2013Assignee: Infineon Technologies AGInventors: Stefan Kolb, Reinhard Mahnkopf, Christian Pacha, Bernhard Winkler, Werner Weber
-
Patent number: 8415192Abstract: A composite material is described. The composite material comprises semiconductor nanocrystals, and organic molecules that passivate the surfaces of the semiconductor nanocrystals. One or more properties of the organic molecules facilitate the transfer of charge between the semiconductor nanocrystals. A semiconductor material is described that comprises p-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of electrons in the semiconductor material being greater than or equal to a mobility of holes. A semiconductor material is described that comprises n-type semiconductor material including semiconductor nanocrystals. At least one property of the semiconductor material results in a mobility of holes in the semiconductor material being greater than or equal to a mobility of electrons.Type: GrantFiled: September 16, 2011Date of Patent: April 9, 2013Assignee: InVisage Technologies, Inc.Inventors: Edward Hartley Sargent, Jiang Tang
-
Patent number: 8415193Abstract: A method for manufacturing a solid state image forming device according to an embodiment includes forming a transparent resin layer 20 on a semiconductor substrate 11, having a plurality of photodiode layers 12 formed thereon in a lattice, through R, G, and B color filters that are formed according to a Bayer arrangement; forming a plurality of first microlens mother dies 23 on the transparent resin layer 20 at the positions corresponding to the green color filters G in such a manner that the outer peripheries thereof are separated from each other; forming a plurality of second microlens mother dies 24 in such a manner that they are formed to fill the gap between the first microlens mother dies 23 and the outer peripheries thereof are separated from each other; and etching the transparent resin layer 20 with the plurality of first microlens mother dies 23 and the plurality of second microlens mother dies 24 being used as masks.Type: GrantFiled: July 21, 2010Date of Patent: April 9, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Hajime Ootake
-
Patent number: 8415194Abstract: A photovoltaic device including a rear electrode which may also function as a rear reflector. In certain example embodiments of this invention, the rear electrode includes a metallic based reflective film that is oxidation graded, so as to be more oxided closer to a rear substrate (e.g., glass substrate) supporting the electrode than at a location further from the rear substrate. In other words, the rear electrode is oxidation graded so as to be less oxided closer to a semiconductor absorber of the photovoltaic device than at a location further from the semiconductor absorber in certain example embodiments. In certain example embodiments, the interior surface of the rear substrate may optionally be textured so that the rear electrode deposited thereon is also textured so as to provide desirable electrical and reflective characteristics. In certain example embodiments, the rear electrode may be of or include Mo and/or MoOx, and may be sputter-deposited using a combination of MoOx and Mo sputtering targets.Type: GrantFiled: December 20, 2010Date of Patent: April 9, 2013Assignee: Guardian Industries Corp.Inventors: Alexey Krasnov, Willem den Boer, Scott V. Thomsen, Leonard L. Boyer, Jr.
-
Patent number: 8415195Abstract: In manufacturing of a solar cell module in which a solar cell having a surface electrode to which a tab lead is connected is sealed with a resin, the step of connecting the tab lead and the step of sealing the solar cell with the resin are performed simultaneously at a relatively low temperature that is used for the resin sealing step. To perform these steps simultaneously, the solar cell having the surface electrode to which the tab lead is connected with an adhesive is resin-sealed using a vacuum laminator to manufacture the solar cell module. The vacuum laminator used includes a first chamber and a second chamber partitioned by a flexible sheet. The internal pressures of these chambers can be controlled independently, and a heating stage for heating is provided in the second chamber.Type: GrantFiled: May 14, 2010Date of Patent: April 9, 2013Assignee: Sony Chemical & Information Device CorporationInventors: Hideaki Okumiya, Satoshi Yamamoto, Masao Saito
-
Patent number: 8415196Abstract: The present invention provides a method for forming a semiconductor thin film, which is capable of suppressing decrease in mobility due to heating and characteristic deterioration due to the decrease in mobility and which is capable of forming a semiconductor thin film with improved heat resistance by more simple procedures. A solution in which a plurality of types of organic materials including an organic semiconductor material are mixed is applied or printed on a substrate to form a thin film, and the plurality of types of organic materials are phase-separated by a process of drying the thin film. As a result, a layered structure semiconductor thin film is obtained, in which an intermediate layer b composed of an organic insulating material is sandwiched between two semiconductor layers a and a?.Type: GrantFiled: December 25, 2008Date of Patent: April 9, 2013Assignee: Sony CorporationInventors: Takahiro Ohe, Miki Kimijima
-
Patent number: 8415197Abstract: A phase change memory device having an improved word line resistance and a fabrication method of making the same are presented. The phase change memory device includes a semiconductor substrate, a word line, an interlayer insulation film, a strapping line, a plurality of current paths, a switching element, and a phase change variable resistor. The word line is formed in a cell area of the semiconductor substrate. The interlayer insulation film formed on the word line. The strapping line is formed on the interlayer insulation film such that the strapping line overlaps on top of the word line. The current paths electrically connect together the word line with the strapping line. The switching element is electrically connected to the strapping line. The phase change variable resistor is electrically connected to the switching element.Type: GrantFiled: September 6, 2012Date of Patent: April 9, 2013Assignee: SK Hynix Inc.Inventors: Mi Ra Choi, Jang Uk Lee
-
Patent number: 8415198Abstract: A production method of a thin film transistor including an active layer including an amorphous oxide semiconductor film, wherein a step of forming the active layer includes a first step of forming the oxide film in an atmosphere having an introduced oxygen partial pressure of 1×10?3 Pa or less, and a second step of annealing the oxide film in an oxidative atmosphere after the first step.Type: GrantFiled: July 26, 2007Date of Patent: April 9, 2013Assignee: Canon Kabushiki KaishaInventors: Naho Itagaki, Toru Den, Nobuyuki Kaji, Ryo Hayashi, Masafumi Sano
-
Patent number: 8415199Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.Type: GrantFiled: December 2, 2011Date of Patent: April 9, 2013Assignee: Renesas Electronics CorporationInventors: Toshihiko Akiba, Bunji Yasumura, Masanao Sato, Hiromi Abe
-
Patent number: 8415200Abstract: Disclosed herein is a method for manufacturing a semiconductor package which uses a base member 120 in which a first metal layer 113, a barrier layer 115, and a second metal layer 117 are stacked on both surface thereof in sequence based on an adhesive member 111 to simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chip 300 to a printed circuit board through a solder bump 250, thereby making it possible to implement a high-density package substrate; and forms a metal post 140 instead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.Type: GrantFiled: January 14, 2011Date of Patent: April 9, 2013Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Mi Sun Hwang, Keung Jin Sohn, Eung Suek Lee, Myung Sam Kang
-
Patent number: 8415201Abstract: The present invention provides a dicing tape-integrated film for semiconductor back surface, including: a dicing tape including a base material and a pressure-sensitive adhesive layer provided on the base material; and a film for flip chip type semiconductor back surface provided on the pressure-sensitive adhesive layer, in which the film for flip chip type semiconductor back surface has a storage elastic modulus (at 60° C.) of from 0.9 MPa to 15 MPa.Type: GrantFiled: June 14, 2010Date of Patent: April 9, 2013Assignee: Nitto Denko CorporationInventors: Miki Hayashi, Naohide Takamoto
-
Patent number: 8415202Abstract: A semiconductor device manufacturing method of stacking semiconductor chips in layers over a semiconductor substrate having, close to its main surface, semiconductor chips, connecting semiconductor chips in different layers to enable signal transmission, and singularizing the layered semiconductor chips into pieces.Type: GrantFiled: March 17, 2011Date of Patent: April 9, 2013Assignee: The University of TokyoInventor: Takayuki Ohba
-
Patent number: 8415203Abstract: A method of forming a semiconductor package includes providing a carrier, attaching a first surface of a first device on the carrier, wherein the first surface comprises a first active surface of the first device, and attaching a second surface of a second device on the carrier. In one embodiment, the second surface is opposite a third surface of the second semiconductor die and the third surface comprises a second active surface. A first insulating material can be formed between the first device and the second device.Type: GrantFiled: September 29, 2008Date of Patent: April 9, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Kenneth R. Burch, Marc A. Mangrum, William H. Lytle
-
Patent number: 8415204Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package substrate; mounting an integrated circuit die on the package substrate; and attaching a heat spreader assembly, having a thermal adhesive layer formed therein, to the package substrate and the integrated circuit die.Type: GrantFiled: March 26, 2009Date of Patent: April 9, 2013Assignee: Stats Chippac Ltd.Inventors: JaEun Yun, Jong Wook Ju, WonJun Ko, Hye Ran Lee