Abstract: In an examining apparatus or method, values of thickness and characteristic of an object, or distributions thereof can be simultaneously acquired. The examining apparatus includes a portion 9 for irradiating an object 2 with radiation, a portion 10 for detecting the radiation from the object, an acquiring portion 26, a storing portion 21 and a calculating portion 20. The acquiring portion acquires transmission time associated with detection time of radiation, and amplitude of the radiation. The storing portion beforehand stores relationship data between the transmission time and amplitude, and representative values of characteristic of the object. The calculating portion obtains values of thickness and characteristic of the object based on the transmission time, amplitude and relationship data.

Abstract: A radiation detector includes material for absorbing incident radiation, and for providing a response to heating caused by the absorption of photons from the incident radiation. The radiation detector may include multiple pixels, each with one or more layers of absorbing material. The absorbing material may include black (microstructured) silicon, which has the advantage of being a good absorber of radiation in the short wave infrared (SWIR) wavelengths (as well as ultraviolet (UV) wavelengths and visible light wavelengths). The radiation detector may include multiple pixels, each separately responding to radiation incident on that pixel, and each including black silicon (as well as possibly other absorptive materials). The pixels of the detector may each have cantilevered attachment to a frame of the detector, with differences in coefficient of thermal expansion of materials of the pixels causing deflection of parts of the pixels due to heating from absorption of radiation.

Abstract: The invention utilizes the changes in physical properties of materials during a solid-solid phase transition in order to enhance the sensitivity of cantilever IR detectors. The substantial changes in properties during insulator-to-metal transitions (IMTs) of some materials are useful for controlling purposes according to the invention. A cantilever arrangement is provided with a cantilever being coated with an insulator-to-metal transitions (IMTs) material. Bending of the cantilever is achieved when the temperature of the (IMTs) material is within its phase transition temperature range. A Focal Plane Array (FPA) for detecting Infrared (IR) radiation including the cantilever arrangement of the invention is also proposed.

Abstract: A system and method of performing acoustic thermography in which invalid data is filtered from data used to detect defects on a structure. An ultrasonic sound input signal is provided to a structure to produce a thermal image output. A sensor senses an input energy corresponding to the sound input signal and produces an input energy signal. The input energy signal is transformed to a test spectrum and is compared to a reference spectrum. The comparison of the test spectrum to the reference spectrum is used to determine whether to include the thermal image output in an analysis for detecting defects in the structure.

Abstract: A scintillator includes a scintillator layer which converts radiation into light, the scintillator layer having a first end forming part of a contour of the scintillator layer and a second end forming another part of the contour, wherein the first end and the second end are located on opposite sides of the scintillator layer when viewed from the center of the scintillator layer, wherein an efficiency of conversion from radiation into light decreases from the first end to the second end.

Abstract: A method of imaging a region of interest (ROI) in an object, the ROI having an axial extent greater than an axial FOV of a PET scanner. The method includes determining a number of overlapping scans of the PET scanner necessary to image at least the axial extent of the ROI, wherein each scan has a same axial length equal to the axial FOV, and each scan overlaps an adjacent scan by a predetermined overlap percentage of the axial length of each scan. The method includes determining a total amount of excess scanning length of the scans based on the number, the axial extent of the ROI, and the axial FOV, and determining a new overlap percentage so that a new total amount of excess scanning length is zero.

Abstract: The object of the invention is to realize a light radiation-detecting apparatus including a step of preparing a matrix array including a substrate, an insulating layer arranged on the substrate, a plurality of pixels arranged on the insulating layer, wherein the pixel includes a conversion element converting an incident radiation into an electric signal, and connection electrode arranged at a periphery of the plurality of pixels, fixing a flexible supporting member for covering the plurality of pixels to the matrix array at a side opposite to the substrate, and releasing the substrate from the matrix array.

Abstract: A multi-layered mega-voltage digital imager is disclosed. In one embodiment, the radiation to particle conversion and particle to electricity conversion is paired as a modular entity. The entity is replicated on top of each other as a layered unit to build an imager with increased resolution and efficiency. Due to this paired replication, sub-images from each replicated pair may be selectively combined and processed to enhance the quality of the image. By varying and adding components at each layer, a different dose rate, and increased resolution, energy sensitivity and efficiency are achieved. The multilayered approach is cost effective and removes problems associated with traditional high efficient MV imagers used for high energy radiations.

Abstract: An apparatus for performing UV light exposure testing of solar panels, also known as PV modules, with superior exposure uniformity, equipment throughput, and floor space requirements, consisting of a chamber including a plurality of UV lamps in a lamp array, at least one target plane, and reflective panels positioned within the chamber to redirect UV light to the target plane(s).

Abstract: Li-containing scintillator compositions, as well as related structures and methods are described. Radiation detection systems and methods are described which include a Cs2LiLn Halide scintillator composition.

Abstract: A non-radioactive source for Atmospheric Pressure Ionization is described. The electron-beam sealed tube uses a pyroelectric crystal(s). One end of the crystal is grounded while the other end has a metallic cap with sharp feature to generate an electron beam of a given energy. The rate of heating and/or cooling of the crystal is used to control the current generated from a tube. A heating and/or cooling element such as a Peltier element is useful for controlling the rate of cooling of the crystal. A thin window that is transparent to electrons but impervious to gases is needed in order to prolong the life of the tube and allow the extraction of the electrons. If needed, multiple crystals with independent heaters can be used to provide continuous operation of the device. Dielectric shielding of the pyroelectric crystal is used to minimize discharge of the crystal.

Abstract: The present invention relates to a cryo transfer holder for TEM including: a specimen support having a specimen rod with a specimen cradle provided on one side end thereof, while being airtightly inserted reciprocatingly on the other side end thereof into a cooling tube of a thermal insulating container, and a thermal insulating pipe configured to be fixed to the thermal insulating container on one side thereof and to surround the specimen rod except the specimen cradle at the time of observation. The thermal insulating container in which a cooling medium is contained has the cooling pipe penetrated thereinto. A specimen rod-reciprocating means is configured to be coupled to the side of the thermal insulating container to allow the specimen rod to be reciprocated relative to the thermal insulating container.

Abstract: Disclosed are a radiation image conversion panel, which provides high luminance, an image without white or black defects, an image free from cracks and an image with reduced unevenness, and its manufacturing method. Also disclosed is an X-ray radiographic system employing the radiation image conversion panel. The radiation image conversion panel of the invention comprises a substrate and provided thereon, a reflection layer, a phosphor layer and a protective layer in that order, wherein the phosphor layer is composed of a phosphor crystal in the form of column, and the reflection layer is formed by vapor phase deposition of two or more kinds of metals.

Abstract: Provided is a fluoroscopy system includes a light source device that emits white light and excitation light for irradiation of a subject; a white-light-image generating section that generates a white-light image by capturing the white light reflected from the subject; a fluorescence-image generating section that generates a fluorescence image by capturing fluorescence from the subject irradiated with the excitation light; an intensity-distribution generating section that generates a fluorescence intensity distribution of pixels of the fluorescence image; a peak-detecting section that detects a fluorescence-intensity peak in the fluorescence intensity distribution; a peak-count comparing section that calculates a count of the peak; an image-combining section that generates a combined image by superimposing a display representing a region including a pixel having the fluorescence intensity at the peak on the white-light image or the fluorescence image based on the peak count; and a monitor that displays the com

Abstract: An imaging method and a device for detecting the fluorescence of a biochip by illuminating chromophores associated with probes (14) of a substrate (12) placed on a sensor (10) having photodetectors, e.g. of the CCD or CMOS type, a stop filter that rejects the excitation light of the chromophores being provided between the probes (14) and the sensor, the substrate (12) being separable from the sensor (10) after use so as to enable the sensor to be reused.

Abstract: The present invention provides a method for on-axis visualization of a target placed in a photon beam, the method comprising: placing the target in the path of the photon beam; selecting a mirror with an external reflecting surface; placing the mirror on a mirror support so that the surface faces the target; placing a reflective microscope so as to collect photons emanating from the target that have been reflected by said surface; counting and analyzing photons collected by the microscope with a CCD camera; and storing and analyzing data collected by the camera.

Abstract: Systems and methods are provided to perform efficient, automatic cyclotron initialization, calibration, and beam adjustment. A process is provided that allows the automation of the initialization of a cyclotron after overnight or maintenance imposed shutdown. In one embodiment, five independent cyclotron system states are defined and the transition between one state to another may be automated, e.g., by the control system of the cyclotron. According to these embodiments, it is thereby possible to achieve beam operation after shutdown with minimal manual input. By applying an automatic procedure, all active devices of the cyclotron (e.g., RF system, extraction deflectors, ion source) are respectively ramped to predefined parameters.

Abstract: A magnetically shielded, efficient plasma generation configuration for a pulsed discharge extreme ultraviolet (EUV) light source comprises two opposed convex electrodes mounted with axes parallel to a static magnetic field. A limiter aperture disposed between the electrodes, in conjunction with the field lines, defines a hollow plasma cylinder connecting the electrodes. A high pulsed voltage and current compresses the plasma cylinder and its interior magnetic field onto the electrode surfaces to create a magnetic insulating layer at the same time as propelling the working gas from each side toward the space between the electrode tips. The plasma then collapses radially in a three-dimensional compression to form a dense plasma on the axis of the device with radiation of extreme ultraviolet light.

Abstract: Methods and systems for a light source assembly for coupling to a photonically enabled complementary metal-oxide semiconductor (CMOS) chip are disclosed. The light source assembly may comprise a laser, a microlens, a turning mirror, and an optical bench, and may generate an optical signal utilizing the laser, focus the optical signal utilizing the microlens, and reflect the optical signal at an angle defined by the turning mirror. The reflected optical signal may be transmitted out of the assembly to grating couplers in the photonically enabled CMOS chip. The assembly may comprise a non-reciprocal polarization rotator, comprising a latching faraday rotator. The assembly may comprise a reciprocal polarization rotator, which may comprise a half-wave plate comprising birefringent materials operably coupled to the optical bench. The turning mirror may be integrated in the optical bench and may reflect the optical signal to transmit through a lid operably coupled to the optical bench.

Abstract: Embodiments of the invention generally relate to a resistive switching nonvolatile memory device having an interface layer structure disposed between at least one of the electrodes and a variable resistance layer formed in the nonvolatile memory device, and a method of forming the same. Typically, resistive switching memory elements may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices, such as digital cameras, mobile telephones, handheld computers, and music players. In one configuration of the resistive switching nonvolatile memory device, the interface layer structure comprises a passivation region, an interface coupling region, and/or a variable resistance layer interface region that are configured to adjust the nonvolatile memory device's performance, such as lowering the formed device's switching currents and reducing the device's forming voltage, and reducing the performance variation from one formed device to another.

Abstract: A phase change memory device having a heater that exhibits a temperature dependent resistivity which provides a way of reducing a reset current is presented. The phase change memory device includes a phase change pattern and a heating electrode contacted with the phase change pattern. The heating electrode includes a smart heating electrode such that the smart heating layer is formed of a conduction material that exhibits an increase in resistance as a function of an increase in temperature, i.e., a positive temperature dependent resistivity.

Abstract: A reconfigurable device and a method of creating, erasing, or reconfiguring the device are provided. At an interface between a first insulating layer and a second insulating layer, an electrically conductive, quasi one- or zero-dimensional electron gas is present such that the interface presents an electrically conductive region that is non-volatile. The second insulating layer is of a thickness to allow metal-insulator transitions upon the application of a first external electric field. The electrically conductive region is subject to erasing upon application of a second external electric field.

Abstract: A reconfigurable device and a method of creating, erasing, or reconfiguring the device are provided. At an interface between a first insulating layer and a second insulating layer, an electrically conductive, quasi one- or zero-dimensional electron gas is present such that the interface presents an electrically conductive region that is non-volatile. The second insulating layer is of a thickness to allow metal-insulator transitions upon the application of a first external electric field. The electrically conductive region is subject to erasing upon application of a second external electric field.

Abstract: Carbon nanotube (CNT)-based devices and technology for their fabrication are disclosed. The discussed electronic and photonic devices and circuits rely on the nanotube arrays grown on a variety of substrates, such as glass or Si wafer. The planar, multiple layer deposition technique and simple methods of change of the nanotube conductivity type during the device processing are utilized to provide a simple and cost effective technology for a large scale circuit integration. Such devices as p-n diode, CMOS-like circuit, bipolar transistor, light emitting diode and laser are disclosed, all of them are expected to have superior performance then their semiconductor-based counterparts due to excellent CNT electrical and optical properties. When fabricated on Si-wafers, the CNT-based devices can be combined with the Si circuit elements, thus producing hybrid Si-CNT devices and circuits.

Abstract: A light emitting device is provided that includes a light emitting structure including a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, a superlattice structure layer on the second conductive semiconductor layer, and a third conductive semiconductor layer on the superlattice structure layer; a light transmission electrode layer on the light emitting structure; a first electrode connected to the first conductive semiconductor layer; a second electrode electrically connected to the light transmission electrode layer on the light emitting structure; and an insulating layer that extends from a lower portion of the second electrode to an upper portion of the second conductive semiconductor layer.

Abstract: The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate and formed with reference to the n-type nitride semiconductor layer.

Abstract: A 1D nanowire photodetector device includes a nanowire that is individually contacted by electrodes for applying a longitudinal electric field which drives the photocurrent. An intrinsic radial electric field to inhibits photo-carrier recombination, thus enhancing the photocurrent response. Circuits of 1D nanowire include groups of photodetectors addressed by their individual 1D nanowire electrode contacts. Placement of 1D nanostructures is accomplished with registration onto a substrate. A substrate is patterned with a material, e.g., photoresist, and trenches are formed in the patterning material at predetermined locations for the placement of 1D nanostructures. The 1D nanostructures are aligned in a liquid suspension, and then transferred into the trenches from the liquid suspension. Removal of the patterning material places the 1D nanostructures in predetermined, registered positions on the substrate.

Abstract: Embodiments of the present disclosure describe structures and techniques to increase carrier injection velocity for integrated circuit devices. An integrated circuit device includes a semiconductor substrate, a first barrier film coupled with the semiconductor substrate, a quantum well channel coupled to the first barrier film, the quantum well channel comprising a first material having a first bandgap energy, and a source structure coupled to launch mobile charge carriers into the quantum well channel, the source structure comprising a second material having a second bandgap energy, wherein the second bandgap energy is greater than the first bandgap energy. Other embodiments may be described and/or claimed.

Abstract: A semiconductor structure includes a first dielectric material including at least one first conductive region contained therein. The structure also includes at least one graphene containing semiconductor device located atop the first dielectric material. The at least one graphene containing semiconductor device includes a graphene layer that overlies and is in direct with the first conductive region. The structure further includes a second dielectric material covering the at least one graphene containing semiconductor device and portions of the first dielectric material. The second dielectric material includes at least one second conductive region contained therein, and the at least one second conductive region is in contact with a conductive element of the at least one graphene containing semiconductor device.

Abstract: The present invention relates to a heterojunction tunneling effect transistor (TFET), which comprises spaced apart source and drain regions with a channel region located therebetween and a gate stack located over the channel region. The drain region comprises a first semiconductor material and is doped with a first dopant species of a first conductivity type. The source region comprises a second, different semiconductor material and is doped with a second dopant species of a second, different conductivity type. The gate stack comprises at least a gate dielectric and a gate conductor. When the heterojunction TFET is an n-channel TFET, the drain region comprises n-doped silicon, while the source region comprises p-doped silicon germanium. When the heterojunction TFET is a p-channel TPET, the drain region comprises p-doped silicon, while the source region comprises n-doped SiC.

Abstract: A flat organic photodetector has a structured first electrode that forms several sub-electrodes, a second electrode, at least one first organic layer, and a second organic layer. The organic layers are situated between the two electrodes and are structured in conformity with the structuring of the first electrode, so that the two organic layers are subdivided into multiple active regions respectively corresponding to the sub-electrodes of the first electrode. An x-ray detector has such a flat organic photodetector and an x-ray absorbing layer applied thereon.

Abstract: The present invention provides an organic semiconductor composite containing a certain thiophene compound and carbon nanotubes, which can be formed into a film by a coating process such as an inkjet process, has high charge mobility and can maintain a high on/off ratio even in air, an organic transistor material and an organic field effect transistor.

Abstract: A phosphorescent polymer compound including structural units that are derived from a compound represented by Formula (1): wherein R1 to R8 and L are as defined herein.

Abstract: A radiation-emitting device with a first electrode, a first emission layer, a second emission layer and a second electrode. The invention additionally relates to a method of producing a radiation-emitting device.

Abstract: Disclosed is a light-emitting material including a polysilsesquioxane having a ladder structure with photoactive groups bonded to a siloxane backbone. In addition to superior heat resistance and mechanical property, the light-emitting material provides improved cotability and film property when prepared into a thin film. Further, it provides higher luminous efficiency than the existing organic-based light-emitting material.

Abstract: Embodiments of the invention provide dielectric films and low-k dielectric films and methods for making dielectric and low-k dielectric films. Dielectric films are made from carbosilane-containing precursors. In embodiments of the invention, dielectric film precursors comprise attached porogen molecules. In further embodiments, dielectric films have nanometer-dimensioned pores.

Abstract: A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.

Abstract: Provided is a solution composition for manufacturing a metal oxide semiconductor including aluminum salts, metal acetylacetonate and a solvent. In addition, provided is a method for manufacturing a metal oxide semiconductor, including: manufacturing of a metal oxide semiconductor by performing heat treatment after coating a solution composition for manufacturing the metal oxide semiconductor above a substrate. In addition, provided is a thin film transistor, including: a gate substrate; a metal oxide semiconductor manufactured to be overlapped with the gate substrate; a source electrode electrically connected to the metal oxide semiconductor; and a drain electrode that is electrically connected to the metal oxide semiconductor and faces the source electrode.

Abstract: In a semiconductor device using a nonvolatile memory, high speed erasing operation and low power consumption are realized. In a nonvolatile memory in which a channel formation region, a tunnel insulating film, and a floating gate are stacked in this order, the channel formation region is formed using an oxide semiconductor layer. In addition, a metal wiring for erasing is provided in a lower side of the channel formation region so as to face the floating gate. With the above structure, when erasing operation is performed, charge accumulated in the floating gate is extracted to the metal wiring through the channel formation region. Consequently, high speed erasing operation and low power consumption of the semiconductor device can be realized.

Abstract: In a transistor including an oxide semiconductor, hydrogen in the oxide semiconductor leads to degradation of electric characteristics of the transistor. Thus, an object is to provide a semiconductor device having good electrical characteristics. An insulating layer in contact with an oxide semiconductor layer where a channel region is formed is formed by a plasma CVD method using a silicon halide. The insulating layer thus formed has a hydrogen concentration less than 6×1020 atoms/cm3 and a halogen concentration greater than or equal to 1×1020 atoms/cm3; accordingly, hydrogen diffusion into the oxide semiconductor layer can be prevented and hydrogen in the oxide semiconductor layer is inactivated or released from the oxide semiconductor layer by the halogen, whereby a semiconductor device having good electrical characteristics can be provided.

Abstract: The present invention provides an array substrate, a method for manufacturing an array substrate, and a display device which are such that reflow failure of a resist mask does not occur readily at the time of manufacture of the array substrate, so the array substrate can be manufactured reliably. At the time of forming a TFT, third wiring 37 between source wiring 13 and the source electrode 22 of the TFT is provided with a narrow portion 38 that is formed with a narrow width by narrowing a midpoint at a portion of the wiring in planar shape, and the resist film on the source electrode 22 and a drain electrode 23 is reflowed so as to cover the surface of a channel region Q, thus forming a reflowed resist film 42. A semiconductor film 20 is etched using this as the etching mask in a state in which the area between the source and the drain is protected, thus making the semiconductor film 20 into an island shape.

Abstract: The present invention provides a method of manufacturing a TFT substrate, in which method a data signal line is separated into upper and lower regions at a separating point(Q) that is not around above a scan signal line but in a region where an i-layer and an n+ layer formed on a gate insulating film are removed away in a flattened region of a gate insulating film.

Abstract: In an electro-optical device substrate, first and second pixel switching elements each include a gate electrode formed of a first conductive film, a gate insulation film formed of a first insulation film, a semiconductor layer, a source electrode formed of a second conductive film, and a drain electrode formed of the second conductive film. A first storage capacitor includes a first storage capacitor electrode formed of the second conductive film, a protective film formed of a second insulation film so as to over at least the first storage capacitor electrode, and a pixel electrode formed so as to overlap with the first storage capacitor electrode at least partially with the protective film interposed therebetween.

Abstract: A method for fabricating an LCD device includes providing first and second substrates; forming an active layer on the first substrate and forming first and second ohmic contact layers on the active layer; forming a first insulation film on the first substrate; forming a gate electrode on the first substrate; forming a second insulation film on the first substrate; forming a pixel electrode on the first substrate; forming a third insulation film on the first substrate; removing a portion of the first to third insulation film to form first and second contact holes, wherein the first contact hole exposes a portion of the first ohmic contact layer and the second contact hole exposes a portion of the second ohmic contact layer; forming a source electrode electrically connected with the first ohmic contact layer within the first contact hole; forming a drain electrode electrically connected with the second ohmic contact layer and the pixel electrode within the second contact hole; and attaching the first and second

Abstract: Disclosed is a high-quality, efficiently manufacturable thin film transistor in which leakage current is minimized. The thin film transistor is provided with a semiconductor layer (34) that contains a channel region (34C) having a microcrystalline semiconductor; source and drain contact layers (35S and 35D) that contains impurities; a first source metal layer (36S) and a first drain metal layer (36D), and a second source metal layer (37S) and a second drain metal layer (37D). The end portion of the second metal source layer (37S) is located at a position receded from the end portion of the first metal source layer (36S) and the end portion of the second drain metal layer (37D) is located at a position receded from the end portion of the first drain metal layer (36D). The semiconductor layer (34) contains low concentration impurity diffusion regions formed near the end portions of the aforementioned source contact layer (35S) and drain contact layer (35D).

Abstract: A schottky diode includes a SiC substrate which has a first surface and a second surface facing away from the first surface, a semiconductor layer which is formed on the first surface of the SiC substrate, a schottky electrode which is in contact with the semiconductor layer, and an ohmic electrode which is in contact with the second surface of the SiC substrate. The first surface of the SiC substrate is a (000-1) C surface, upon which the semiconductor layer is formed.

Abstract: An indirect bandgap thin film semiconductor circuit can be combined with a compound semiconductor LED such as to provide an active matrix LED array that can have high luminous capabilities such as for a light projector application. In another example, a highly efficient optical detector is achievable through the combination of indirect and direct bandgap semiconductors. Applications can include display technologies, light detection, MEMS, chemical sensors, or piezoelectric systems. An LED array can provide structured illumination, such as for a light and pattern source for projection displays, such as without requiring spatial light modulation (SLM). An example can combine light from separate monolithic light projector chips, such as providing different component colors. An example can provide full color from a single monolithic light projector chip, such as including selectively deposited phosphors, such as to contribute individual component colors to an overall color of a pixel.

Abstract: Disclosed are a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises a substrate; a light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, which are formed on the substrate such that a part of the first conductive semiconductor layer is exposed upward; schottky contact regions on the second conductive semiconductor layer; a second electrode on the second conductive semiconductor layer; and a first electrode on the exposed first conductive semiconductor layer, wherein a distance between the schottky contact regions narrowed as the schottky contact regions are located closely to a mesa edge region.

Abstract: Several embodiments of light emitting diode packaging configurations including a substrate with a cavity are disclosed herein. A patterned wafer has a plurality of individual LED attachment sites, and an alignment wafer has a plurality of individual cavities. The patterned wafer and the alignment wafer are superimposed with the LED attachment sites corresponding generally to the cavities of the alignment wafer. At least one LED is placed in the cavities using the cavity to align the LED relative to the patterned wafer. The LED is electrically connected to contacts on the patterned wafer, and a phosphor layer is formed in the cavity to cover at least a part of the LED.

Abstract: To achieve enlargement and high definition of a display portion, a single crystal semiconductor film is used as a transistor in a pixel, and the following steps are included: bonding a plurality of single crystal semiconductor substrates to a base substrate; separating part of the plurality of single crystal semiconductor substrates to form a plurality of regions each comprising a single crystal semiconductor film over the base substrate; forming a plurality of transistors each comprising the single crystal semiconductor film as a channel formation region; and forming a plurality of pixel electrodes over the region provided with the single crystal semiconductor film and a region not provided with the single crystal semiconductor film. Some of the transistors electrically connecting to the pixel electrodes formed over the region not provided with the single crystal semiconductor film are formed in the region provided with the single crystal semiconductor film.