Abstract: Some embodiments include methods of forming BJTs. A first type doped region is formed within semiconductor material. First and second trenches are formed within the semiconductor material to pattern an array of pedestals, and the trenches are filled with electrically insulative material. An upper portion of the first type doped region is counter-doped to form a first stack having a second type doped region over a first type doped region, and an upper portion of the first stack is then counter-doped to form a second stack having a second type doped region between a pair of first type doped regions. Some embodiments include a BJT array. A base implant region is between a pair of emitter/collector implant regions. Electrically insulative material is adjacent the base implant region, and contains at least about 7×1016 atoms/cm3 of base implant region dopant.

Abstract: Nanoscale switching devices are disclosed. The devices have a first electrode of a nanoscale width; a second electrode of a nanoscale width; and a layer of an active region disposed between and in electrical contact with the first and second electrodes. The active region contains a switching material capable of carrying a significant amount of defects which can trap and de-trap electrons under electrical bias. The switching material is in an amorphous state. A nanoscale crossbar array containing a plurality of the devices and a method for making the devices are also disclosed.

Abstract: A method of forming a memory cell is provided. The method includes forming a steering element pillar having a first stiffness and a sidewall, forming a sidewall collar along at least a portion of the sidewall of the steering element pillar, the sidewall collar having a second stiffness, wherein the second stiffness is greater than the first stiffness, and forming a memory element coupled to the steering element pillar. Numerous other aspects are provided.

Abstract: A bond type flip-chip light-emitting structure and method of manufacturing the same. Firstly, form a positive electrode and a negative electrode on an epitaxy layer. Next, deposit an insulation layer on parts of the positive electrode and negative electrode, to expose respectively a positive electrode via hole and a negative electrode via hole. Then, form a bonded metal layer on the insulation layer, the positive electrode via hole, and the negative electrode via hole, so that the positive electrode and the negative electrode are on a same plane by means of the bonded metal layer. Finally, on a substrate, bond the first metal layer and the second metal layer onto the corresponding first bonded metal unit and the second bonded metal unit of the bonded metal layer, to form into shape, thus realizing a bond type flip-chip light-emitting structure.

Abstract: According to one embodiment, a semiconductor light-emitting device includes: a first conductivity type first semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in a (0001) surface; a second conductivity type second semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in the (0001) surface; a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, containing a nitride semiconductor crystal, and having an average lattice constant larger than the lattice constant of the first semiconductor layer; and a first stress application layer provided on a side opposite to the light emitting layer of the first semiconductor layer and applying a compressive stress to the first semiconductor layer.

Abstract: A method of manufacturing a nitride semiconductor light emitting device which includes forming an n-type semiconductor layer, forming an active layer on the n-type semiconductor layer, forming a superlattice layer by alternately stacking at least two nitride layers made of InxAlyGa(1-x-y)N (0?x?1, 0?y?1, and 0?x+y?1) having different energy bandgaps from each other and doped with a p-type dopant, and forming a p-type semiconductor layer on the superlattice layer. The forming of the superlattice layer is performed by adjusting a flow rate of a p-type dopant source gas to reduce the flow rate in a growth termination period of the superlattice layer by no greater than about half of the flow rate in a growth initiation period of the superlattice layer while being doped with the p-type dopant.

Abstract: Light emitting diodes including low refractive index layers for reducing guided light are disclosed. The light-emitting diodes include at least one n-doped layer, at least one p-doped layer, and an active region disposed between the at least one n-doped layer and the at least one p-doped layer. The active region comprises a light-emitting material. The light-emitting diode further comprises at least one low refractive index layer disposed in or around the active region.

Abstract: A semiconductor nanocrystal capable of emitting blue light upon excitation. Also disclosed are devices, populations of semiconductor nanocrystals, and compositions including a semiconductor nanocrystal capable of emitting blue light upon excitation. In one embodiment, a semiconductor nanocrystal capable of emitting blue light including a maximum peak emission at a wavelength not greater than about 470 nm with a photoluminescence quantum efficiency greater than about 65% upon excitation. In another embodiment, a semiconductor nanocrystal includes a core comprising a first semiconductor material comprising at least three chemical elements and a shell disposed over at least a portion of the core, the shell comprising a second semiconductor material, wherein the semiconductor nanocrystal is capable of emitting blue light with a photoluminescence quantum efficiency greater than about 65% upon excitation.

Abstract: A gallium nitride based compound semiconductor light-emitting element according to an embodiment of the present disclosure includes: an n-type gallium nitride based compound semiconductor layer; a p-type gallium nitride based compound semiconductor layer; and an active layer which is arranged between the n- and p-type gallium nitride based compound semiconductor layers. The active layer and the p-type gallium nitride based compound semiconductor layer are m-plane semiconductor layers. The p-type gallium nitride based compound semiconductor layer includes magnesium at a concentration of 2.0×1018 cm?3 to 2.5×1019 cm?3 and oxygen, of which the concentration is 5% to 15% of the concentration of the magnesium.

Abstract: A method for forming optical devices. The method includes providing a gallium nitride substrate member having a crystalline surface region and a backside region. The method also includes subjecting the backside region to a laser scribing process to form a plurality of scribe regions on the backside region and forming a metallization material overlying the backside region including the plurality of scribe regions. The method removes at least one optical device using at least one of the scribe regions.

Abstract: A semiconductor optical modulator includes a first n-type semiconductor region, a first p-type semiconductor region, an i-type semiconductor region, a second p-type semiconductor region, and a second n-type semiconductor region that constitute a stacked layer structure. The stacked layer structure includes a first cladding layer, a second cladding layer, and a core layer disposed between the first and second cladding layer. The first n-type semiconductor region and the first p-type semiconductor region form a first p-n junction disposed in an intermediate region between the first and second cladding layer. The second p-type semiconductor region and the second n-type semiconductor region form a second p-n junction disposed in the intermediate region or the second cladding layer. The intermediate region, the first n-type semiconductor region, and the second n-type semiconductor region include the core layer, the first cladding layer, and part or all of the second cladding layer, respectively.

Abstract: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel material to causes a uni-axial strain in the channel, in addition to a bi-axial strain caused in the channel layer by a top barrier layer and a bottom buffer layer of the quantum well.

Abstract: Graphene-channel based devices and techniques for the fabrication thereof are provided. In one aspect, a semiconductor device includes a first wafer having at least one graphene channel formed on a first substrate, a first oxide layer surrounding the graphene channel and source and drain contacts to the graphene channel that extend through the first oxide layer; and a second wafer having a CMOS device layer formed in a second substrate, a second oxide layer surrounding the CMOS device layer and a plurality of contacts to the CMOS device layer that extend through the second oxide layer, the wafers being bonded together by way of an oxide-to-oxide bond between the oxide layers. One or more of the contacts to the CMOS device layer are in contact with the source and drain contacts. One or more other of the contacts to the CMOS device layer are gate contacts for the graphene channel.

Abstract: An organic light emitting display device includes a first substrate including a pixel region in which at least one organic light emitting diode including a first electrode, an organic layer, and a second electrode is formed and a non-pixel region formed beside the pixel region. The device includes a second substrate and a frit provided between the non-pixel region on the first substrate and the second substrate. A reflection prevention layer is formed on at least one surface of the second substrate.

Abstract: An organic electronic device includes an active region polarity definition layer, and a bulk heterojunction active layer formed on the active region polarity definition layer. The bulk heterojunction active layer includes an upper region and a lower region having respective majority carriers localized therein of different polarities.

Abstract: The organic light emitting display apparatus includes a substrate; a gate electrode formed on the substrate; a source electrode and a drain electrode formed on the gate electrode to be insulated from the gate electrode; an active layer formed on the source electrode and the drain electrode and containing an organic semiconductor material, at least one region of the active layer overlapping with the gate electrode; a pixel defining layer formed on the active layer and including an aperture; an intermediate layer disposed to correspond to the aperture and including an organic emission layer; and an opposite electrode formed on the intermediate layer. One of the source electrode and the drain electrode is formed to be long to act as a pixel electrode and includes a first conductive layer and a second conductive layer on the first conductive layer, the second conductive layer formed to contact the intermediate layer.

Abstract: Embodiments of the present invention include an amine-based compound represented by Formula 1, an organic light-emitting diode including the amine-based compound, and an organic light-emitting apparatus including the amine-based compound.

Abstract: An organic electroluminescence device employing a specific biscarbazole derivative having a cyano group as a first host and a compound having both a carbazole structure and a nitrogen-containing aromatic heteroring as a second host. The organic electroluminescence device has a prolonged lifetime.

Abstract: Provided is a light-emitting apparatus which, without using an insulating film for separating pixels, inhibits leakage current between adjacent pixels and which accommodates higher resolution. By providing a groove in an insulating layer along an edge of a first electrode, the thickness of a first charge transport layer is reduced to inhibit leakage current between adjacent pixels.

Abstract: A manufacturing method of an organic EL apparatus according to the present application example is provided with a plurality of light emitting elements having a light emitting layer between an anode and a cathode, and includes: forming the light emitting layer using a liquid phase process, and forming an intermediate layer between the light emitting layer and the cathode in contact with the light emitting layer using a gas phase process, in which the intermediate layer includes a low molecular weight host material included in the light emitting layer.

Abstract: An organic EL display device of active matrix type wherein insulated-gate field effect transistors formed on a single-crystal semiconductor substrate are overlaid with an organic EL layer; characterized in that the single-crystal semiconductor substrate (413 in FIG. 4) is held in a vacant space (414) which is defined by a bed plate (401) and a cover plate (405) formed of an insulating material, and a packing material (404) for bonding the bed and cover plates; and that the vacant space (414) is filled with an inert gas and a drying agent, whereby the organic EL layer is prevented from oxidizing.

Abstract: To provide a light emitting device that has a structure in which a light emitting element is sandwiched by two substrates to prevent moisture from penetrating into the light emitting element, and a method for manufacturing thereof. In addition, a gap between the two substrates can be controlled precisely. In the light emitting device according to the present invention, an airtight space surrounded by a sealing material with a closed pattern is kept under reduced pressure by attaching the pair of substrates under reduced pressure. A columnar or wall-shaped structure is formed between light emitting regions inside of the sealing material, in a region overlapping with the sealing material, or in a region outside of the sealing material so that the gap between the pair of substrates can be maintained precisely.

Abstract: Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.

Abstract: An organic material consisting of a ?-conjugated molecule which is in a liquid form at ambient temperature and use thereof are provided. The ambient temperature liquid-form organic material according to the present invention consists of a ?-conjugated molecule having 2 or more side chains, the 2 or more side chains are same or different side chains selected from the group consisting of a branched alkyl chain, an alkyl chain having a polymerization site at a terminal, an oligosiloxane chain, a fluorocarbon chain, an oligoethylene glycol chain and derivatives thereof, and each of the 2 or more side chains is bound directly or via a substituent to the ?-conjugated molecule.

Abstract: The present invention provides an organic EL display panel such that, even when a light emitting layer is formed in a line bank, generation of brightness unevenness and emission color unevenness due to application unevenness of an organic light emitting layer is suppressed, and good display quality is achieved. In the present invention, an insulation layer, which would cause application unevenness of the organic light emitting layer, is formed on the organic light emitting layer so as to cover an edge of a pixel electrode. It is possible to suppress film-shape unevenness of the organic light emitting layer, whereby provision and manufacture of an organic EL display panel which exhibits excellent display quality with reduced brightness unevenness and emission color unevenness become possible.

Abstract: The present invention addresses the problem of providing an organic electroluminescent lighting device in which it is difficult for an organic light emitting film to be scratched.

Abstract: An object of the present invention is to facilitate reduction in channel length and increase in channel width in an organic semiconductor device and to improve yield. According to an embodiment of the present invention, an organic semiconductor device includes a laminate provided in a first region of a substrate and including a first electrode, a first organic semiconductor film, and a second electrode which are laminated with each other, the first organic semiconductor film being placed between the first electrode and the second electrode; a first wiring portion provided in a second region adjacent to a portion of the periphery of the first region so as to be electrically connected to the first electrode; a second wiring portion provided in the second region so as to be electrically connected to the second electrode; a gate electrode which surrounds a portion of the periphery of the first region; and a gate insulating film provided at least between the laminate and the gate electrode.

Abstract: An organic EL panel comprises anodes, a cathode, organic light-emitting layers, and first functional layers each including a hole injection layer and a hole transport layer. The hole injection layer of each of the R, G, and B colors is made of only a metal oxide including tungsten oxide, and has a thickness of 5 nm to 40 nm. At least one of the hole injection layers has a thickness different from the other hole injection layers. The hole transport layers of the R, G, and B colors are equivalent in thickness. The organic light-emitting layers of the R, G, and B colors are equivalent in thickness.

Abstract: A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a first insulating film formed on the semiconductor layer; a charge storage film that is formed on the first insulating film, includes C60 fullerenes, and is not less than 0.5 monolayer but is less than 1.0 monolayer; a second insulating film formed on the charge storage film; and a control electrode formed on the second insulating film.

Abstract: A semiconductor device which has stable electrical characteristics and high reliability is provided. The semiconductor device includes a gate electrode over an insulating surface, a gate insulating film over the gate electrode, a semiconductor film which is over the gate insulating film and overlaps with the gate electrode, and a protective insulating film over the semiconductor film; and the protective insulating film includes a crystalline insulating film and an aluminum oxide film over the crystalline insulating film.

Abstract: One object is to provide a semiconductor device with a structure which enables reduction in parasitic capacitance sufficiently between wirings. In a bottom-gate type thin film transistor including a stacked layer of a first layer which is a metal thin film oxidized partly or entirely and an oxide semiconductor layer, the following oxide insulating layers are formed together: an oxide insulating layer serving as a channel protective layer which is over and in contact with a part of the oxide semiconductor layer overlapping with a gate electrode layer; and an oxide insulating layer which covers a peripheral portion and a side surface of the stacked oxide semiconductor layer.

Abstract: An object is to provide a UV sensor with high accuracy, which can be manufactured at low cost and formed over a flexible substrate. A semiconductor device includes a transistor having an oxide semiconductor film, and a voltage source electrically connected to a gate of the transistor, in which a threshold voltage of the transistor is changed by irradiating the oxide semiconductor film with UV rays; a change in the threshold voltage of the transistor is dependent on a wavelength of the UV rays with which the oxide semiconductor film is irradiated, and the voltage source adjusts a voltage output to the gate of the transistor.

Abstract: A thin film transistor including a gats electrode, a gate-insulating film, an oxide semiconductor film in contact with the gate-insulating film, and source and drain electrodes which connect to the oxide semiconductor film and are separated with a channel part therebetween, wherein the oxide semiconductor film comprises a crystalline indium oxide which includes hydrogen element, and the content of the hydrogen element contained in the oxide semiconductor film is 0.1 at % to 5 at % relative to all elements which form the oxide semiconductor film.

Abstract: A thin film transistor includes at least a gate electrode, a gate insulating film, an active layer, a source electrode and a drain electrode are provided on a substrate, with the source electrode and the drain electrode being provided on the active layer. The active layer is configured of an amorphous oxide semiconductor. A first amount of moisture present in the gate insulating film is smaller than a second amount of moisture present in the active layer.

Abstract: A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.

Abstract: A TFT (20) includes a semiconductor layer (12s1) of an oxide semiconductor, a source electrode (13sd) and a drain electrode (13dd) provided on the semiconductor layer (12s1) and separated from each other, a gate insulating film (15) covering a portion of the semiconductor layer between the source electrode (13sd) and the drain electrode (13dd), a gate electrode (18gd) provided over the semiconductor layer (12s1) with the gate insulating film (15) being interposed between the gate electrode (18gd) and the semiconductor layer (12s1). The source electrode (13sd) is integrally formed with the source line (13s1). The gate electrode (18gd) is integrally formed with the gate line (18g1). The semiconductor layer (12s1) extends below the source line (13s1). The entireties of the source line (13s1), the source electrode (13sd), and the drain electrode (13dd) are provided on the semiconductor layer (12s1).

Abstract: Disclosed herein are various electrical test structures for evaluating semiconductor devices that employ high-k dielectrics and/or metal gate electrode structures. In one example, the test structure disclosed herein includes a first resistor comprised of at least one of a high-k layer of insulating material or a metal layer and a silicon-containing material layer and first and second spaced-apart metal silicide regions formed on the silicon-containing material layer, wherein the silicon-containing layer further comprises a non-silicided region positioned between the first and second spaced-apart metal silicide regions.

Abstract: A semiconductor integrated circuit includes a plurality of stacked slices each configured to have a plurality of vias formed therein so that signals are transferred between the slices arranged in a vertical direction, wherein each of the plurality of slices is configured to transfer a pulse signal, generated during a test section, to a lowest slice of the plurality of slices through the vias connected thereto.

Abstract: Measures are described with the aid of which not only a rupture, but also cracks may be detected in the diaphragm structure of a micromechanical component with the aid of circuit means integrated into the diaphragm structure. At least some circuit elements are integrated for this purpose into the bottom side of the diaphragm, i.e., into a diaphragm area directly adjoining the cavern below the diaphragm.

Abstract: A high voltage semiconductor device includes a substrate, an insulating layer positioned on the substrate, and a silicon layer positioned on the insulating layer. The silicon layer further includes at least a first doped strip, two terminal doped regions formed respectively at two opposite ends of the silicon layer and electrically connected to the first doped strip, and a plurality of second doped strips. The first doped strip and the terminal doped regions include a first conductivity type, the second doped strips include a second conductivity type, and the first conductivity type and the second conductivity type are complementary. The first doped strip and the second doped strips are alternately arranged.

Abstract: A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.

Abstract: A liquid crystal display array substrate and a method for manufacturing the same are discussed. The liquid crystal display array substrate includes a gate line arranged on a substrate in one direction, a data line which crosses the gate line and defines a plurality of pixel areas, a thin film transistor formed at a crossing of the gate line and the data line, a pixel electrode connected to the thin film transistor, and a common electrode which is positioned opposite the pixel electrode and forms an electric field. The common electrode includes a shield line overlapping the data line, and the shield line includes at least two cutting portions having a width less than other portion of the shield line.

Abstract: RC delay in gate lines of a wide display is reduced by using a low resistivity conductor in the gate lines and a different conductor for forming corresponding gate electrodes. More specifically, a corresponding display substrate includes a gate line made of a first gate line metal, a data line made of a first data line metal, a pixel transistor and a first connection providing part. The pixel transistor includes a first active pattern formed of polycrystalline silicon (poly-Si) and a first gate electrode formed there above and made of a conductive material different from the first gate line metal. The first connection providing part connects the first gate electrode to the gate line. On the other hand, the source electrode is integrally extended from the data line.

Abstract: A semiconductor device is disclosed. In one embodiment, the semiconductor device includes two different semiconductor materials. The two semiconductor materials are arranged adjacent one another in a common plane.

Abstract: A semiconductor device is disclosed. One embodiment includes a lateral HEMT (High Electron Mobility Transistor) structure with a heterojunction between two differing group III-nitride semiconductor compounds and a layer arranged on the heterojunction. The layer includes a group III-nitride semiconductor compound and at least one barrier to hinder current flow in the layer.

Abstract: An embodiment is a structure comprising a substrate, a high energy bandgap material, and a high carrier mobility material. The substrate comprises a first isolation region and a second isolation region. Each of first and second isolation regions extends below a first surface of the substrate between the first and second isolation regions. The high energy bandgap material is over the first surface of the substrate and is disposed between the first and second isolation regions. The high carrier mobility material is over the high energy bandgap material. The high carrier mobility material extends higher than respective top surfaces of the first and second isolation regions to form a fin.

Abstract: Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of III-V semiconductor material such as GaN over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of GaN bonded to the molybdenum nitride.

Abstract: A light emitting diode is made using a laser to texture the sidewalls of the bottom contact layer, without damaging a mesa. To do so, the substrate is mounted on a laser machining platform, and trenches are cut along lines through the semiconductor layer on the substrate using a first sequence of laser pulses having short pulse lengths that result in formation of textured sidewalls in the trenches, without causing recasting of the material. Then the substrate can be scribed along the lines of the trenches using a second sequence of laser pulses for singulation of die.

Abstract: A light emitting diode includes a substrate, a transitional layer on the substrate and an epitaxial layer on the transitional layer. The transitional layer includes a planar area with a flat top surface and a patterned area with a rugged top surface. An AlN material includes a first part consisting of a plurality of spheres and a second part consisting of a plurality of slugs. The spheres are on a top surface of the transitional layer, both at the planar area and the patterned area. The slugs are in grooves defined in the patterned area. Air gaps are formed between the slugs and a bottom surface of the epitaxial layer. The spheres and slugs of the AlN material help reflection of light generated by the epitaxial layer to a light output surface of the LED.

Abstract: According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0<x1?1) and a first low Al composition layer. A compressive strain is applied to the first low Al composition layer. Unstrained GaN has a first lattice spacing. The Alx1Ga1-x1N (0<x1?1) when unstrained has a second lattice spacing. The first high Al composition layer has a third lattice spacing. An Al composition ratio of the first low Al composition layer is not more than a ratio of a difference between the first and third lattice spacings to a difference between the first and second lattice spacings.