Abstract: Radio-frequency (RF) switch circuits are disclosed having one or more transistors coupled to provide improved switching performance. RF switches include at least one field-effect transistor (FET) disposed between first and second nodes, each the at least one FET having a respective body and a corresponding gate. A coupling circuit couples the respective body and corresponding gate of the at least one FET. The coupling circuit may include a diode in series with a resistor and may be configured to facilitate removal of excess charge from the respective body.

Abstract: Radio-frequency (RF) switch circuits are disclosed having one or more transistors coupled to provide improved harmonic management. The RF switch circuits including at least one field-effect transistor (FET) disposed between first and second nodes, each of the at least one FET having a respective body and gate. A coupling circuit can be configured to couple the respective body and gate of each of the at least one FET. The coupling circuit can include a capacitor electrically parallel with a diode.

Abstract: Radio-frequency (RF) switch circuits are disclosed providing improved switching performance. An RF switch system includes a plurality of field-effect transistors (FETs) connected in series between first and second nodes, each FET having a gate and a body. A compensation network including a gate-coupling circuit couples the gates of each pair of neighboring FETs. The compensation network may further including a body-coupling circuit that couples the bodies of each pair of neighboring FETs.

Abstract: Touch sensing systems comprising bulk-solidifying amorphous alloys and methods of making touch sensing arrays and electronic devices containing touch sensitive screens that include arrays containing bulk-solidifying amorphous alloys. The bulk-solidifying amorphous alloy substrates have select areas of crystalline and amorphous alloy providing for discrete areas of conductivity and resistivity.

Abstract: There is provided a capacitance sensing apparatus including: a driving circuit unit applying a driving signal to a first capacitor; a first integrating circuit unit including a second capacitor charged by a change in capacitance generated in the first capacitor based on the driving signal to generate a first output voltage; and a second integrating circuit unit including a third capacitor charged by a change in capacitance generated in the second capacitor to generate a second output voltage, wherein a level of the second output voltage is changed at least twice during a single period of the driving signal applied to the first capacitor.

Abstract: A capacitive touch-control panel apparatus is illustrated. The capacitive touch-control panel apparatus includes a touch-control substrate and a hub circuit. The touch-control substrate has M touch areas, and each touch-control area includes an axial body and N electrodes. N electrodes are disposed corresponding to the axial body and are electrically connected to the hub circuit. One of the electrodes on each touch-control area is connected to one of the electrodes on the other touch-control area by one-to-one manner, wherein M and N are positive integer.

Abstract: Embodiments disclosed herein may relate to supply voltage or ground connections for integrated circuit devices. As one example, two or more supply voltage bond pads on an integrated circuit die may be connected together via one or more electrically conductive interconnects.

Abstract: A die including a first set of power tiles arranged in a first array and having a first voltage; a second set of power tiles arranged in a second array offset from the first array and having a second voltage; a set of power mesh segments enclosed by the second set of power tiles and having the first voltage; a first power rail passing underneath the set of power mesh segments and the first set of power tiles; and a set of vias operatively connecting the power rail with the set of power mesh segments and the first plurality of power tiles.

Abstract: A circuit includes a charge pump, a first level shifter, a second level shifter, a voltage follower and a current mirror. The charge pump is configured to generate a voltage difference between the input node and the output node. The first level shifter is coupled to the charge pump output and configured to apply a first voltage variation to the charge pump output in response to a bias current. The second level shifter is coupled to the input node and configured to apply a second voltage variation to the charge pump input. The voltage follower is configured to equalize outputs from the first and second level shifters and provide a difference current which is multiplied by the current multiplier to generate a charging current applied to the charge pump.

Abstract: A vertical Hall sensor circuit includes an arrangement comprising a vertical Hall effect region of a first doping type, formed within a semiconductor substrate and having a stress dependency with respect to a Hall effect-related electrical characteristic. The vertical Hall sensor circuit further includes a stress compensation circuit which comprises at least one of a lateral resistor arrangement and a vertical resistor arrangement for generating a stress-dependent lateral resistor arrangement signal based on a reference signal provided to the stress compensation circuit, and for generating a stress-dependent vertical resistor arrangement signal based on the reference signal, respectively. The vertical Hall sensor circuit further includes a first circuit for providing a first signal to the arrangement based on at least one of the stress-dependent lateral resistor arrangement signal and the stress-dependent vertical resistor arrangement signal.

Abstract: Chopper circuitry may be adapted to operate in a high-temperature environment of a turbine. A first semiconductor switch (122) may have a first terminal coupled to receive a first output signal from a first leg (148) of a differential amplifier (150). A second switch (128) may have a first terminal coupled thru a first resistive element (R1) to a second terminal of the first semiconductor switch. The first terminal of the second semiconductor switch may be coupled to receive thru a second resistive element (R2) a second output signal from a second leg (152) of the amplifier. Switches (122,128) may be responsive to a switching control signal to respective gate terminals of the switches to supply an output signal, which alternates in correspondence with a frequency of the switching control signal from a first amplitude level to a second amplitude level, which effectively provides a doubling amplification factor.

Abstract: A bias voltage source for a differential circuit has low output impedance at DC, but considerably higher output impedance within the frequency band of the differential signal being processed, to provide an accurate, well-matched common-mode bias voltage to each component of a differential signal path, while providing a low noise current, minimizing the conversion between common-mode and differential modes, and preserving available headroom, and all without requiring the use of large resistors.

Abstract: Included is a radio transmission system comprising a plurality of power amplifiers (PAs); a plurality of Volterra Engine (VE) linearizers corresponding to the PAs; a plurality of feedback loops corresponding to the PAs; at least one digital hybrid matrix (DHM) coupled to the VE linearizers; and an analog hybrid matrix (AHM) coupled to the PAs, wherein the feedback loops are connected to the AHM and the VE linearizers but not to the PAs to reduce the number of feedback loops. Also included is a radio system comprising a plurality of PAs; a Volterra DHM (VDHM) coupled to the PAs; a plurality of feedback loops corresponding to the PAs; and an AHM coupled to the PAs, wherein the feedback loops are connected to the AHM but not to the PAs to reduce the number of feedback loops.

Abstract: A method and system for determining adaptation parameters for pre-distorters in a multi-band power amplifier system of a communication system are disclosed. A method includes receiving, at an adaptor, a reference signal comprising a first plurality of signals having substantially overlapping frequency spectra. Each of the first plurality of signals is input to a corresponding one of a plurality of pre-distorters. The adaptor also receives an observation signal comprising a second plurality of signals tuned to substantially a same frequency to have overlapping frequency spectra. Each of the second plurality of signals is derived from an output of the multi-band power amplifier system. The adaptor computes the adaptation parameters based on the reference signal and the observation signal.

Abstract: Embodiments for at least one method and apparatus of a voltage supply are disclosed. One voltage supply apparatus includes a voltage supply, a plurality of power amplifier (PA) decoupling circuits, and a plurality of power amplifiers. Each PA decoupling circuit is connected to the voltage supply and provides a filtered voltage supply to a corresponding one of the plurality power amplifiers. Each PA decoupling circuit configured to suppress noise of the provided filtered voltage supply below a threshold at one or more selected frequencies, wherein the suppression is provided by the PA decoupling circuit operating in conjunction with at least one other of the plurality of PA decoupling circuits.

Abstract: A switch mode power supply converter, a parallel amplifier, and a parallel amplifier output impedance compensation circuit are disclosed. The switch mode power supply converter provides a switching voltage and generates an estimated switching voltage output, which is indicative of the switching voltage. The parallel amplifier generates a power amplifier supply voltage at a power amplifier supply output based on a compensated VRAMP signal. The parallel amplifier output impedance compensation circuit provides the compensated VRAMP signal based on a combination of a VRAMP signal and a high frequency ripple compensation signal. The high frequency ripple compensation signal is based on a difference between the VRAMP signal and the estimated switching voltage output.

Abstract: An apparatus and a method select and use parameter values for an RF power amplifier linearizer to pre-distort the input signals of a power amplifier, so as to achieve a linear output response in the power amplifier. The apparatus and the method select from a number of sets of parameter values, each set of parameter values corresponding to a different output power range of the power amplifier. The set of parameters include a coefficient vector tailored for the particular output power range for that set. The power amplifier input power is repeatedly measured and filtered at various time intervals. The input power measurements may be filtered by a fast attack/slow decay filter, which follows the peaks of the measurements under operation of the fast attack portion of the filter and provides a low variance during operation of the slow decay portion of the filter.

Abstract: A mixed-signal adaptive integrated circuit may comprise a primary function circuit, a digitally controlled analog sub-system cooperatively connected with the primary function circuit, and an on-chip signal analyzer. The on-chip signal analyzer may be arranged to analyze RF signals. The signal analyzer may comprise at least one multiplexor for selecting selected RF signals for comparison and analysis, and may comprise a digital signal processor (DSP) for analyzing the selected RF signals and adjusting at least one operational parameter of the digital controlled analog sub-system responsive to the analysis.

Abstract: An audio power amplifier includes a first and a second amplification unit, each including a switching voltage amplifier, an output filter, a current compensator, an inner current feedback loop feeding a measurement of current measured at the output inductor back to a summing input of the current compensator, a voltage compensator coupled to the summing input of the current compensator, and an outer voltage feedback loop. A controlled signal path provides the output of the voltage compensator of the first amplification unit to the current compensator of the second amplification unit. The first and second amplification units are operable with separate loads, in parallel driving a common load, or across a bridge-tied-load. A second pair of amplification units may be added and operated together with the first pair to drive a single speaker with a parallel pair of amplifiers on each side of a bridge-tied-load.

Abstract: Embodiments of the present invention provide an apparatus for amplifying an input-signal. The apparatus includes a switch-mode amplifier for amplifying a digital input-signal. The apparatus is characterized by a generator for generating the digital input-signal based on the input-signal, wherein the generator is configured to generate the digital input-signal such that the digital input-signal is located at a predefined frequency band and such that distortions are located at a frequency higher than the predefined frequency band.

Abstract: A power amplifier including a MOSFET including a source supplied with a first DC power, a gate connected to an RF input signal, and a drain connected to a power supply terminal of an RF power amplification unit; a supply voltage modulation control unit that determines a DC gate voltage of the MOSFET based on an envelope of the RF input signal; and a bypass circuit connected between the drain and the power supply terminal. The MOSFET outputs a second DC power via the drain and amplifies the RF input signal based on a third DC power substantially identical to a differential between the first and the second DC power, and also outputs an RF power via the drain. The bypass circuit receives and rectifies the RF power to supply a recycled DC power to the power supply terminal of the RF power amplification unit.

Abstract: An amplification system is provided that comprises a push-pull amplifier system having a first power transistor series coupled with a second power transistor that alternately switch between a push-pull amplifier mode of operation and a single-ended amplifier mode of operation. In the push-pull amplifier mode, both the first power transistor and the second power transistor alternately conduct to provide an amplified output signal to an output load in response to an input signal having an amplitude that is greater than or equal to a threshold level. In the single-ended amplifier mode of operation, the first power transistor conducts and the second power transistor is disabled for amplification purposes in response to the input signal having an amplitude that is less than the threshold level.

Abstract: An oscillator system includes a first oscillator, a second oscillator, and a changeover component. The first oscillator is configured to generate a first signal at a selected frequency. The second oscillator is configured to generate a second signal at about the selected frequency. The changeover component is configured to generate a changeover output signal according to the first signal and the second signal.

Abstract: An oven controlled crystal oscillator includes a crystal unit, a temperature control circuit, and a circuit board. The temperature control circuit is configured to control a temperature of the crystal unit. The crystal unit includes a flange that projects outward to an entire outer periphery in one end. The circuit board includes a depressed portion in which the flange is partially inserted. The temperature control circuit includes a power transistor, a thermistor as a temperature sensor, and a metal pattern. The power transistor becomes a heat source. The metal pattern commonly connects a ground terminal of the crystal unit, a collector of the power transistor, and a ground terminal of the thermistor. The crystal unit is positioned in a state where the flange is partially inserted in the depressed portion. The crystal unit is connected to the metal pattern.

Abstract: Multi-mode oscillators supporting multiple modes and having different desirable characteristics (e.g., good phase noise or low power consumption) in different modes are disclosed. In an exemplary design, an apparatus includes first and second transistors of a first transistor type (e.g., NMOS transistors) and third and fourth transistors of a second transistor type (e.g., PMOS transistors) for a multi-mode oscillator. The third and fourth transistors are coupled (e.g., directly) to the first and second transistors. The first and second transistors are enabled in a first mode to provide signal gain for the oscillator and generate an oscillator signal in the first mode. The first to fourth transistors are enabled in a second mode to provide signal gain for the oscillator and generate the oscillator signal in the second mode. Different supply voltages may be provided at different supply nodes of the oscillator in the first and second modes.

Abstract: A frequency modulator includes a first pair of diodes with two capacity diodes, and a second pair of diodes with two additional capacity diodes. The second pair of diodes is employed in parallel. The frequency modulator also includes a first modulator input for reception of a first modulation signal and a second modulator input for reception of a symmetrical second modulation signal. Both pairs of diodes are coupled to an oscillator unit.

Abstract: A network signal coupling and EMI protection circuit assembly includes a processing circuit installed in a circuit board and coupled between a voltage-mode network-on-chip at the circuit board and a network connector and drivable by a driving voltage from the voltage-mode network-on-chip to process network signals. The processing circuit includes opposing first connection end and second connection end, two-wire channels electrically connected between the first connection end and the second connection end, a coupling module and an EMI protection module installed in each two-wire channel for coupling network signals and removing noises.

Abstract: A network signal processing circuit assembly includes a network-on-chip, a network connector, and a processing circuit including a plurality of channels respectively and electrically connected between the network-on-chip and the network connector, a plurality of signal coupling capacitors respectively electrically coupled to the channels, and a plurality of inductor sets electrically connected in parallel between the signal coupling capacitors and the network connector for causing a back-EMF (back-electro motive force) when receiving power supply from the signal coupling capacitors.

Abstract: A high-frequency module includes a mount board, a wave splitter chip mounted on one principal surface of the mount board and including a transmission filter and a reception filter, a first inductor chip mounted on one principal surface of the mount board and including an inductor, and a second inductor chip mounted on one principal surface of the mount board and including an inductor. The first and second inductor chips are disposed adjacent to each other and each has a polarity. The first and second inductor chips are disposed such that the polarities thereof are opposite to each other, as viewed from the reception filter.

Abstract: A laminated structural type balun includes a low pass filter that is provided between an unbalanced terminal inputting and outputting unbalanced signals and a first balanced terminal inputting and outputting balanced signals and includes a first coil and a first capacitor; and a high pass filter that is provided between the unbalanced terminal and a second balanced terminal inputting and outputting balanced signals and includes a second capacitor and a second coil. The first capacitor and the second capacitor are arranged in a different area from the first coil and the second coil in a laminated direction.

Abstract: A transmission line is provided in which a first portion of the transmission line is configured to be connected to a source, and a second portion of the transmission line is configured to be connected to a load. A capacitive element is coupled to the transmission line and is configured to compensate for an impedance difference between the load and at least one of the source or the transmission line, at a frequency within a frequency bandwidth of the load. A difference between an internal capacitance of the first portion of the transmission line and the second portion of the transmission line substantially matches the capacitance of the capacitive element.

Abstract: A network signal coupling and EMI protection circuit assembly includes a processing circuit installed in a circuit board and coupled between a voltage-mode network-on-chip at the circuit board and a network connector and drivable by a driving voltage outputted by the voltage-mode network-on-chip to process network signals. The processing circuit includes opposing first connection end and second connection end, two-wire channels electrically connected between the first connection end and the second connection end, a coupling module and an EMI protection module installed in each two-wire channel for coupling network signals and removing noises.

Abstract: The RF MEMS crosspoint switch comprising a first transmission line and a second transmission line that crosses the first transmission line; the first transmission line comprises two spaced-apart transmission line portions, and a switch element that permanently electrically connects the said two spaced-apart transmission line portions; the second transmission line crosses the first transmission line between the two spaced-apart transmission line portions; the RF MEMS crosspoint switch further comprises actuation means for actuating the switch element at least between a first position, in which the switch element is electrically connecting the two spaced-apart transmission line portions of the first transmission line and the first and second transmission lines are electrically disconnected, and a second position, in which the switch element is electrically connecting the two spaced-apart transmission line portions of the first transmission line and is also electrically connecting the two transmission lines toge

Abstract: A transceiver front-end of a communication device comprises a frequency blocking arrangement, which may be either a transmit frequency blocking arrangement or a receive frequency blocking arrangement. The frequency blocking arrangement has a blocking frequency interval associated with one of a transmit frequency and receive frequency, and a non-blocking frequency interval associated with the other of the transmit frequency and receive frequency. The frequency blocking arrangement is configured to block passage of signals in the blocking frequency interval between said signal transmission and reception node and either said receiver node or said transmitter node. The frequency blocking arrangement comprises a network of passive components comprising at least one transformer and a filter arrangement adapted to have a higher impedance value in the blocking frequency interval than in the non-blocking frequency interval.

Abstract: A network signal enhancement circuit assembly includes a processing circuit installed in a circuit board and having opposing first and second connection ends thereof respectively coupled to a network connector and a voltage-mode network-on-chip. The processing circuit includes coupling modules for coupling network signals, EMI protection modules for removing noises from coupled network signals, and a signal enhancement module including a voltage source and a plurality of pull-up resistors and adapted to compensate for an attenuation of the network signal due to long distance signal transmission, assuring a high level of signal transmission stability.

Abstract: A duplexer includes: a transmission filter connected between a common terminal and a transmission terminal; and a reception filter connected between the common terminal and a reception terminal, wherein the reception filter includes resonators located on a piezoelectric substrate, at least one resonator of the resonators is grounded, and a resonator located at a side closest to the common terminal out of the grounded resonator is a divided resonator that is divided into two or more, and a resonance frequency fr of the divided resonator is in a range of fr=2×(fTL to fTH)?(fRL to fRH) when a pass frequency of the transmission filter is fTL to fTH and a pass frequency of the reception filter is fRL to fRH.

Abstract: A tunable series resonant circuit includes a voltage source, a source impedance, a variable capacitor, a series inductor, and a load impedance. The variable capacitor includes a sPAC (series programmable array of capacitors) having desirable characteristics for a tunable series resonant circuit. The sPAC may be a binary weighted sPAC, a thermometer coded sPAC, or some other sPAC.

Abstract: Tunable MEMS resonators having adjustable resonance frequency and capable of handling large signals are described. In one exemplary design, a tunable MEMS resonator includes (i) a first part having a cavity and a post and (ii) a second part mated to the first part and including a movable layer located under the post. Each part may be covered with a metal layer on the surface facing the other part. The movable plate may be mechanically moved by a DC voltage to vary the resonance frequency of the MEMS resonator. The cavity may have a rectangular or circular shape and may be empty or filled with a dielectric material. The post may be positioned in the middle of the cavity. The movable plate may be attached to the second part (i) via an anchor and operated as a cantilever or (ii) via two anchors and operated as a bridge.

Abstract: A mover assembly of a circuit breaker is provided. A mover assembly of a circuit breaker according to one aspect includes: a terminal fixed within a circuit breaker; a connector coupled to the terminal; a plurality of movers rotatably installed in the connector; and an elastic member applying elastic force to the movers to tightly attach the movers to the connector, wherein each of the movers includes a first mover and a second mover and the elastic member is positioned between the first mover and the second mover.

Abstract: The present invention provides a transformer having assembled bobbins and a voltage transformation module having the transformer. The transformer includes a base, bobbins, secondary windings and two magnetic cores. The base is provided with a penetration hole. The bobbins are disposed in the base and each has an annular groove, a hollow portion corresponding to the penetration hole, and protrusions formed on a surface of the bobbin. The protrusions form a gap between the two adjacent bobbins when the two adjacent bobbins are assembled with each other. The secondary windings are disposed between the bobbins and each has a through-hole corresponding to the hollow portion. The two magnetic cores penetrate the penetration hole of the base, the hollow portions of the bobbins, and the through-holes of the secondary windings to assemble them together.

Abstract: An inductor includes soft magnetic alloy powder-containing resin that contains amorphous soft magnetic alloy powder, which resin is used as a sealing material that seals a coil wound around a winding core of the core. This soft magnetic alloy powder-containing resin contains two groups of large and small particles having a first peak and second peak in their particle size distribution, where the particle size corresponding to the second peak is equal to or smaller than one-half the particle size corresponding to the first peak, and the magnitude ratio (abundance ratio) of the second peak and first peak is 0.2 or more but 0.6 or less. The inductor demonstrates improved DC superimposition characteristics and does not cause sealing irregularities.

Abstract: An improved current transformer has a ring shaped core and a plurality of windings wound around the ring shaped core. The ring shaped core has a rectangular cross sectional area configured to provide a current transformer current rating of at least 375 amperes.

Abstract: A coil component 1 includes a substrate 2, a planar spiral conductor 10a formed on a top surface 2t of the substrate 2, a lead conductor 11a connected to an outer peripheral end of the planar spiral conductor 10a, a dummy lead conductor 15a formed on the top surface of the substrate 2 and between an outermost turn of the planar spiral conductor 10a and an end 2X2 of the substrate 2 and free from an electrical connection with another conductor within the same plane, external electrodes 26a and 26b arranged in parallel with the top surface of the substrate 2, and a bump electrode 25a formed on a surface of the lead conductor 11a and connects the lead conductor 11a with the external electrode 26a. The external terminals 26a and 26b have a larger area than the bump electrodes 15a and 15b for securing a bonding strength.

Abstract: Disclosed is a fuse appliance, which comprises a fuse carrier for carrying a fuse and a fuse appliance base. The fuse carrier is arranged, in a manually operable way, in a hollow cavity of the fuse appliance base that is formed by buckling and assembling a shell bottom and a shell cover, so as to remove or insert the fuse. Arranged on the two sides of the fuse appliance base are fixed contacts which come into contact with moving contacts arranged on the fuse carrier, and wiring terminals for electrically connecting the two contacts of the fuse appliance with a main circuit respectively.

Abstract: Systems and methods for recognizing 3-D human motions are described. In some embodiments, the present disclosure contemplates a variety of methods and systems for recognizing a 3-D motion on 2-D planes. The 3-D human motions may include, but is not limited to, kinematic based gestures, such as clapping, spell casting, security gestures, etc.

Abstract: This disclosure relates to a system and method for implementing threat condition in pass control. In one embodiment, a method for implementing threat condition can comprise, receiving by a checkpoint computer, from a server, a threat condition status. The method can further comprise requiring from a visitor at a checkpoint an information set by the checkpoint computer, the information dependent on the threat condition. The method can further comprise issuing a pass to the visitor only if the visitor supplies the information set at the checkpoint.

Abstract: Articles of clothing or pieces of athletic equipment include modules, e.g., for sensing physical and/or physiological characteristics associated with use of the clothing or athletic equipment or for performing other functions. Such systems and methods may use physical or other interaction(s) between the module and the article of clothing or piece of athletic equipment for activating and/or deactivating the module and/or sensing devices included with the module, for confirming whether the module and clothing or piece of athletic equipment are authorized for use with one another, and/or for automatic data algorithm selection methods. Additionally, such systems and methods also may use the activation and/or authentication systems for data input to the module. Some examples of such systems and methods may utilize magnets and magnetic sensing systems and/or light (or other radiation) sources and sensing systems for activation, authentication, data input, and/or algorithm selection.

Abstract: The invention discloses devices and methods for analyzing inbound and outbound ships for illegal or dangerous cargo or persons. An arch is generally placed several kilometers from shore, the arch including a plurality of distinct analytical and diagnostic equipment. A ship passing through the arch is analyzed by photographic, thermal and other means for presence of explosives, nuclear, chemical, or biological agents, terrorists, contraband, illegal passengers and/or other potential threats. Results from scanning are sent to appropriate security officials as are data of ships that attempt to circumvent the security arch.

Abstract: A system and method for querying vehicle status at a checkpoint using identity information is disclosed herein. In one embodiment, a method of querying vehicle status can comprise storing identity information in a data store, receiving from a checkpoint computer data from a visitor, querying the profiles using the data to locate the first profile, querying a motor vehicle database using the vehicle information, obtaining a vehicle status from the motor vehicle database, and sending the vehicle status to the chekpoint computer. First profile can be one of a plurality of profiles in the data store. Further, the data used for querying the profiles can comprise at least a portion of the identity information.

Abstract: An in-vehicle charger includes a charger that charges a device to be charged including a wireless key of a keyless entry device, a controller connected to the charger, and a detection unit connected to the controller and that detects an installation state of the device to be charged relative to the charger. The controller turns on power supply to the charger and controls the keyless entry device to perform first communication verification when the installation state of the device to be charged relative to the charger is detected by the detection unit. The controller turns on the power supply to the charger when it is determined that the communication verification of the keyless entry device has been performed.