Characterized By Specified Crystallography Or Arrangement Of Substrate (e.g., Wafer Cassette, Miller Index) Patents (Class 117/101)
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Patent number: 7686886Abstract: A method for forming a structure of a desired cross-section on a substrate is provided. The method provides a seed structure comprising at least one support layer on the substrate. The support layer has a geometric shape related to the desired cross-section of the structure and is diffusive to a precursor constituent. The method further includes growing the structure by supplying at least one precursor constituent on the substrate. The desired cross-section of the structure is defined by the geometric shape of at least one support layer.Type: GrantFiled: September 26, 2006Date of Patent: March 30, 2010Assignee: International Business Machines CorporationInventors: Walter H Riess, Heike E Riel, Siegfried F Karg, Heinz Schmid
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Publication number: 20090294775Abstract: A method of obtaining a hexagonal würtzite type epitaxial layer with a low impurity concentration of alkali-metal by using a hexagonal würtzite substrate possessing a higher impurity concentration of alkali-metal, wherein a surface of the substrate upon which the epitaxial layer is grown has a crystal plane which is different from the c-plane.Type: ApplicationFiled: May 28, 2009Publication date: December 3, 2009Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Makoto Saito, Shin-Ichiro Kawabata, Derrick S. Kamber, Steven P. DenBaars, James S. Speck, Shuji Nakamura
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Patent number: 7625448Abstract: The invention relates to a device for depositing especially crystalline layers on at least one especially crystalline substrate in a process chamber comprising a top and a vertically opposing heated bottom for receiving the substrates. A gas-admittance body forming vertically superimposed gas-admittance regions is used to separately introduce at least one first and one second gaseous starting material, said starting materials flowing through the process chamber with a carrier gas in the horizontal direction. The gas flow homogenises in an admittance region directly adjacent to the gas-admittance body, and the starting materials are at least partially decomposed, forming decomposition products which are deposited on the substrates in a growth region adjacent to the admittance region, under continuous depletion of the gas flow. An additional gas-admittance region of the gas-admittance body is essential for one of the two starting materials, in order to reduce the horizontal extension of the admittance region.Type: GrantFiled: August 28, 2006Date of Patent: December 1, 2009Assignee: Aixtron AGInventors: Martin Dauelsberg, Martin Conor, Gerhard Karl Strauch, Johannes Kaeppeler
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Patent number: 7625447Abstract: SiC is a very stable substance, and it is difficult to control the condition of a SiC surface to be suitable for crystal growth in conventional Group III nitride crystal growing apparatuses. This problem is solved as follows. The surface of a SiC substrate 1 is rendered into a step-terrace structure by performing a heating process in an atmosphere of HCl gas. The surface of the SiC substrate 1 is then treated sequentially with aqua regia, hydrochloric acid, and hydrofluoric acid. A small amount of silicon oxide film formed on the surface of the SiC substrate 1 is etched so as to form a clean SiC surface 3 on the substrate surface. The SiC substrate 1 is then installed in a high-vacuum apparatus and the pressure inside is maintained at ultrahigh vacuum (such as 10?6 to 10?8 Pa). In the ultrahigh vacuum state, a process of irradiating the surface with a Ga atomic beam 5 at time t1 at temperature of 800° C. or lower and performing a heating treatment at 800° C. or higher is repeated at least once.Type: GrantFiled: March 18, 2004Date of Patent: December 1, 2009Assignee: Japan Science and Technology AgencyInventors: Jun Suda, Hiroyuki Matsunami, Norio Onojima
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Patent number: 7615203Abstract: A single crystal diamond grown by vapor phase synthesis, wherein when one main surface is irradiated with a linearly polarized light considered to be the synthesis of two mutually perpendicular linearly polarized light beams, the phase difference between the two mutually perpendicular linearly polarized light beams exiting another main surface on the opposite side is, at a maximum, not more than 50 nm per 100 ?m of crystal thickness over the entire crystal. This single crystal diamond is of a large size and high quality unattainable up to now, and has characteristics that are extremely desirable in semiconductor device substrates and are applied to optical components of which low strain is required.Type: GrantFiled: May 26, 2005Date of Patent: November 10, 2009Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yoshiyuki Yamamoto, Kiichi Meguro, Takahiro Imai
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Patent number: 7604697Abstract: A heteroepitaxial growth method for gallium nitride yields gallium nitride which contains good quality fine crystals and has excellent optical properties, on a quartz substrate or a silicon substrate. The method comprises a step A of nitriding the surface of the substrate, and a step B of depositing or vapor depositing at least one atom layer of gallium.Type: GrantFiled: March 11, 2005Date of Patent: October 20, 2009Assignee: Yamaha CorporationInventors: Shingo Sakakibara, Yoku Inoue, Hidenori Mimura
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Patent number: 7594967Abstract: A semiconductor structure including a cap layer formed over a semiconductor substrate having a rough edge, which discourages formation of dislocation pile-up defects.Type: GrantFiled: October 10, 2002Date of Patent: September 29, 2009Assignee: AmberWave Systems CorporationInventors: Christopher J. Vineis, Richard Westhoff, Mayank Bulsara
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Patent number: 7560086Abstract: Synthetic monocrystalline diamond compositions having one or more monocrystalline diamond layers formed by chemical vapor deposition, the layers including one or more layers having an increased concentration of one or more impurities (such as boron and/or isotopes of carbon), as compared to other layers or comparable layers without such impurities. Such compositions provide an improved combination of properties, including color, strength, velocity of sound, electrical conductivity, and control of defects. A related method for preparing such a composition is also described, as well as a system for use in performing such a method, and articles incorporating such a composition.Type: GrantFiled: October 29, 2004Date of Patent: July 14, 2009Assignee: Apollo Diamond, Inc.Inventors: Robert C. Linares, Patrick J Doering
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Publication number: 20090165704Abstract: A silicon seed rod assembly used for producing polycrystalline silicon by means of a vapor deposition method includes two rod-shape silicon seed rods; and a silicon connection member bridging the silicon seed rods, wherein an opening-end peripheral edge of a through-hole on one side surface of the connection member is sharper than that on the other side surface thereof, and an opening-end peripheral surface on the one side surface thereof is formed into a flat contact surface disposed in a direction perpendicular to a perforation direction of the through-hole, and wherein a upper end portion of the silicon seed rod is inserted into the through-hole so that the contact surface comes into contact with the support surface of the silicon seed rod.Type: ApplicationFiled: December 23, 2008Publication date: July 2, 2009Applicant: MITSUBISHI MATERIALS CORPORATIONInventors: Masayuki Tebakari, Naoki Hatakeyama
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Patent number: 7537660Abstract: A crystallization method includes wavefront-dividing an incident light beam into a plurality of light beams, condensing the wavefront-divided light beams in a corresponding phase shift portion of a phase shift mask or in the vicinity of the phase shift portion to form a light beam having an light intensity distribution of an inverse peak pattern in which a light intensity is minimum in a point corresponding to the phase shift portion of the phase shift mask, and irradiating a polycrystalline semiconductor film or an amorphous semiconductor film with the light beam having the light intensity distribution to produce a crystallized semiconductor film.Type: GrantFiled: May 30, 2006Date of Patent: May 26, 2009Assignee: Advanced LCD Technologies Development Center Co., Ltd.Inventors: Yukio Taniguchi, Masakiyo Matsumura, Hirotaka Yamaguchi, Mikihiko Nishitani, Susumu Tsujikawa, Yoshinobu Kimura, Masayuki Jyumonji
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Publication number: 20090127506Abstract: The invention relates to a single crystal CVD diamond material, wherein the extended defect density as characterised by X-ray topography is less than 400/cm2 over an area of greater than 0.014 cm2. The invention further relates to a method for producing a CVD single crystal diamond material according to any preceding claim comprising the step of selecting a substrate on which to grow the CVD single crystal diamond, wherein the substrate has at least one of a density of extended defects as characterised by X-ray topography of less than 400/cm2 over an area greater than 0.014 cm2; an optical isotropy of less than 1×10-5 over a volume greater than 0.1 mm3; and a FWHM X-ray rocking curve width for the (004) reflection of less than 20 arc seconds.Type: ApplicationFiled: December 8, 2006Publication date: May 21, 2009Inventors: Daniel James Twitchen, Grant Charles Summerton, Ian Friel, John Olaf Hansen, Keith Barry Guy, Michael Peter Gaukroger, Philip Maurice Martineau, Robert Charles Burns, Simon Craig Lawson, Timothy Patrick Gerard Addison
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Patent number: 7528462Abstract: An aluminum nitride single-crystal multi-layered substrate comprising an aluminum nitride single-crystal layer formed by direct reduction nitridation on a single-crystal ?-alumina substrate such as a sapphire substrate and an edge-type dislocation layer having a thickness of 10 nm or less in the vicinity of the interface between the both crystals. Threading dislocation is rarely existent in the aluminum nitride single-crystal layer existent on the surface. It is useful as a semiconductor device substrate.Type: GrantFiled: February 6, 2006Date of Patent: May 5, 2009Assignees: Tokuyama Corporation, Tohoku University, Tokyo Institute of TechnologyInventors: Hiroyuki Fukuyama, Shinya Kusunoki, Katsuhito Nakamura, Kazuya Takada, Akira Hakomori
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Publication number: 20090025629Abstract: It is to provide a substrate for growing a semiconductor, which is effective for suppressing an occurrence of surface defects different in type from hillock defects in case of epitaxially growing a compound semiconductor layer, particularly an Al-based compound semiconductor layer. In a substrate for growing a compound semiconductor, in which a crystal surface inclined at a predetermined off angle with respect to a (100) plane is a principal plane, an angle made by a direction of a vector obtained by projecting a normal vector of the principal plane on the (100) plane and one direction of a [0-11] direction, a [01-1] direction, a [011] direction and a [0-1-1] direction is set to be less than 35°, and the compound semiconductor layer is epitaxially grown on the substrate.Type: ApplicationFiled: February 2, 2007Publication date: January 29, 2009Inventors: Hideki Kurita, Ryuichi Hirano
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Patent number: 7481881Abstract: Affords a method of manufacturing GaN crystal substrate in which enlargement of pit size in the growing of GaN crystal is inhibited to enable GaN crystal substrate with a high substrate-acquisition rate to be produced. The method of manufacturing GaN crystal substrate includes a step of growing GaN crystal (4) by a vapor growth technique onto a growth substrate (1), the GaN-crystal-substrate manufacturing method being characterized in that in the step of growing the GaN crystal (4), pits (6) that define facet planes (5F) are formed in the crystal-growth surface, and being characterized by having the pit-size increase factor of the pits (6) be 20% or less.Type: GrantFiled: January 20, 2005Date of Patent: January 27, 2009Assignee: Sumitomo Electric Industries, Ltd.Inventor: Takuji Okahisa
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Patent number: 7479188Abstract: A process for producing an inexpensive large high-quality GaN substrate which comprises forming a MgO buffer layer on a high-quality substrate, generating a ZnO layer on the MgO buffer layer while performing polarity control, growing a GaN layer on the ZnO layer while performing polarity control, and melting the ZnO layer, thereby producing a GaN substrate.Type: GrantFiled: March 19, 2004Date of Patent: January 20, 2009Assignee: Tohoku Techno Arch Co., Ltd.Inventors: Takafumi Yao, Takuma Suzuki, Hang-ju Ko, Agus Setiawan
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Patent number: 7473316Abstract: What is described here is a process for the initial growth of nitrogenous semiconductor crystal materials in the form AXBYCZNVMW wherein A, B, C is an element of group II or III, N is nitrogen, M represents an element of group V or VI, and X, Y, Z, W denote the molar fraction of each element of this compound, using a, which are deposited on sapphire, SiC or Si, using various ramp functions permitting a continuous variation of the growth parameters during the initial growth.Type: GrantFiled: July 24, 2000Date of Patent: January 6, 2009Assignee: Aixtron AGInventors: Bernd Schottker, Michael Heuken, Holger Jürgensen, Gerd Strauch, Bernd Wachtendorf
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Patent number: 7456084Abstract: There is provided a method of fabricating a wafer, comprising depositing semiconductor material into a recess in a setter, moving the setter through a heating/cooling region to subject the semiconductor material to a temperature profile, and removing a wafer from the recess. The size and shape of the wafer are substantially equal to the size of the wafer when it is used. As a result, the wafer can be fabricated in any desired shape and with any of a variety of surface structural features and/or internal structural features. The temperature profile can be closely controlled, enabling production of wafers having structural features not previously obtainable. There are also provided wafers formed by such methods and setters for use in such methods.Type: GrantFiled: January 28, 2005Date of Patent: November 25, 2008Assignee: Heritage Power LLCInventors: Ralf Jonczyk, Scott L. Kendall, James A. Rand
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Publication number: 20080283846Abstract: Disclosed herein is a method for growing a semiconductor layer which includes the step of growing a semiconductor layer of hexagonal crystal structure having the (11-22) or (10-13) plane direction on the (1-100) plane of a substrate of hexagonal crystal structure.Type: ApplicationFiled: May 16, 2008Publication date: November 20, 2008Applicant: SONY CORPORATIONInventors: Akira Ohmae, Masayuki Arimochi, Jugo Mitomo, Noriyuki Futagawa, Tomonori Hino
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Publication number: 20080156256Abstract: Synthetic monocrystalline diamond compositions having one or more monocrystalline diamond layers formed by chemical vapor deposition, the layers including one or more layers having an increased concentration of one or more impurities (such as boron and/or isotopes of carbon), as compared to other layers or comparable layers without such impurities. Such compositions provide an improved combination of properties, including color, strength, velocity of sound, electrical conductivity, and control of defects. A related method for preparing such a composition is also described., as well as a system for use in performing such a method, and articles incorporating such a composition.Type: ApplicationFiled: March 13, 2008Publication date: July 3, 2008Applicant: Apollo Diamond, Inc.Inventors: Robert C. Linares, Patrick J. Doering
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Patent number: 7393411Abstract: A method for growing a ?-Ga2O3 single crystal hardly cracking and having a weakened twinning tendency and an improved crystallinity, a method for growing a thin-film single crystal with high quality, a GazO3 light-emitting device capable of emitting a light in the ultraviolet region, and its manufacturing method are disclosed. In an infrared-heating single crystal manufacturing system, a seed crystal and polycrystalline material are rotated in mutually opposite directions and heated, and a ?-Ga2O3 single crystal is grown in one direction selected from among the a-axis <100> direction, the b-axis <010> direction, and the c-axis <001> direction. A thin film of a ?-Ga2O3 single crystal is formed by PLD. A laser beam is applied to a target to excite atoms constituting the target Ga atoms are released from the target by thermal and photochemical actions. The free Ga atoms are bonded to radicals in the atmosphere in the chamber.Type: GrantFiled: February 16, 2004Date of Patent: July 1, 2008Assignee: Waseda UniversityInventors: Noboru Ichinose, Kiyoshi Shimamura, Kazuo Aoki, Encarnacion Antonia Garcia Villora
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Patent number: 7390581Abstract: A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the <0001> direction predominantly toward a direction selected from the group consisting of <10-10> and <11-20> directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 ?m2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm?2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.Type: GrantFiled: May 11, 2006Date of Patent: June 24, 2008Assignee: Cree, Inc.Inventors: Xueping Xu, Robert P. Vaudo, Jeffrey S. Flynn, George R. Brandes
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Patent number: 7384481Abstract: Methods for forming compositions comprising a single-phase rare-earth dielectric disposed on a substrate are disclosed. In some embodiments, the method forms a semiconductor-on-insulator structure. Compositions and structures that are formed via the method provide the basis for forming high-performance devices and circuits.Type: GrantFiled: October 19, 2005Date of Patent: June 10, 2008Assignee: Translucent Photonics, Inc.Inventor: Petar Atanackovic
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Patent number: 7381267Abstract: A method for forming, by epitaxy, a heteroatomic single-crystal semiconductor layer on a single-crystal semiconductor wafer, the crystal lattices of the layer and of the wafer being different, including forming, before the epitaxy, in the wafer surface, at least one ring of discontinuities around a useful region.Type: GrantFiled: April 1, 2004Date of Patent: June 3, 2008Assignee: STMicroelectronics S.A.Inventors: Daniel Bensahel, Olivier Kermarrec, Yves Morand, Yves Campidelli, Vincent Cosnier
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Patent number: 7368014Abstract: A deposition method may include, at a first temperature, contacting a substrate with a first precursor and chemisorbing a first layer at least one monolayer thick over the substrate. At a second temperature different from the first temperature, the first layer may be contacted with a second precursor, chemisorbing a second layer at least one monolayer thick on the first layer. Temperature may be altered by adding or removing heat with a thermoelectric heat pump. The altering the substrate temperature may occur from the first to the second temperature. The second layer may be reacted with the first layer by heating to a third temperature higher than the second temperature. A deposition method may also include atomic layer depositing a first specie of a substrate approximately at an optimum temperature for the first specie deposition.Type: GrantFiled: August 9, 2001Date of Patent: May 6, 2008Assignee: Micron Technology, Inc.Inventor: Trung Tri Doan
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Patent number: 7357837Abstract: The method of making a GaN single crystal substrate comprises a mask layer forming step of forming on a GaAs substrate 2 a mask layer 8 having a plurality of opening windows 10 disposed separate from each other; and an epitaxial layer growing step of growing on the mask layer 8 an epitaxial layer 12 made of GaN.Type: GrantFiled: October 24, 2003Date of Patent: April 15, 2008Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kensaku Motoki, Takuji Okahisa, Naoki Matsumoto
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Patent number: 7354477Abstract: A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and facet valleys rooted upon the mask stripes, maintaining the facet hills and facet valleys, producing voluminous defect accumulating regions (H) accompanying the valleys, yielding low dislocation single crystal regions (Z) following the facets, making C-plane growth regions (Y) following flat tops between the facets, gathering dislocations on the facets into the valleys by the action of the growing facets, reducing dislocations in the low dislocation single crystal regions (Z) and the C-plane growth regions (Y), and accumulating the dislocations in cores (S) or interfaces (K) of the voluminous defect accumulating regions (H).Type: GrantFiled: September 9, 2004Date of Patent: April 8, 2008Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kensaku Motoki, Ryu Hirota, Takuji Okahisa, Seiji Nakahata
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Publication number: 20080067543Abstract: A method of manufacturing a single crystalline gallium nitride (GaN) thick film by using a hydride gas phase epitaxy (HVPE), more particularly, the method of manufacturing c-plane ({0001}) of a single crystalline GaN thick film by using the HVPE. A GaN film is grown on a substrate by providing a hydrogen chloride (HCl) gas and an ammonia (NH3) gas, thereby obtaining the GaN film on the substrate, and a GaN thick film on the GaN film on the substrate is grown.Type: ApplicationFiled: May 29, 2007Publication date: March 20, 2008Applicant: SAMSUNG CORNING CO., LTD.Inventors: Hyun Min Shin, Sun Hwan Kong, Ki Soo Lee, Jun Sung Choi
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Patent number: 7341883Abstract: A silicon germanium (SiGe) semiconductive alloy is grown on a substrate of single crystalline Al2O3. A {111} crystal plane of a cubic diamond structure SiGe is grown on the substrate's {0001} C-plane such that a <110> orientation of the cubic diamond structure SiGe is aligned with a <1,0,?1,0> orientation of the {0001} C-plane. A lattice match between the substrate and the SiGe is achieved by using a SiGe composition that is 0.7223 atomic percent silicon and 0.2777 atomic percent germanium.Type: GrantFiled: September 27, 2005Date of Patent: March 11, 2008Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventors: Yeonjoon Park, Sang H. Choi, Glen C. King
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Patent number: 7320732Abstract: A method for preparing film oxides deposited on a substrate with a resulting grain boundary junction that is atomistically straight. A bicrystal substrate having a straight grain boundary is prepared as a template. The Miller indices h1, k1, h2, k2 of the two grains of the substrate are chosen such that the misorientation angle of the film is equal to arctan k1/h1+arctan k2/h2. The film is grown on the substrate using a layer-by-layer growth mode.Type: GrantFiled: July 27, 2005Date of Patent: January 22, 2008Assignee: The Trustees of Columbia University in the City of New YorkInventor: Siu-Wai Chan
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Patent number: 7303632Abstract: A vapor transport growth process for bulk growth of high quality gallium nitride for semiconductor applications is disclosed. The method includes the steps of heating a gallium nitride source material, a substrate suitable for epitaxial growth of GaN thereon, ammonia, a transporting agent that will react with GaN to form gallium-containing compositions, and a carrier gas to a temperature sufficient for the transporting agent to form volatile Ga-containing compositions from the gallium nitride source material. The method is characterized by maintaining the temperature of the substrate sufficiently lower than the temperature of the source material to encourage the volatile gallium-containing compositions to preferentially form GaN on the substrate.Type: GrantFiled: May 26, 2004Date of Patent: December 4, 2007Assignee: Cree, Inc.Inventor: Gerald H. Negley
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Patent number: 7303630Abstract: Dotted seeds are implanted in a regular pattern upon an undersubstrate. A GaN crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations from neighboring regions, accumulate the dislocations into pit bottoms, and make closed defect accumulating regions (H) on the seeds. The polycrystalline or slanting orientation single crystal closed defect accumulating regions (H) induce microcracks due to thermal expansion anisotropy. The best one is orientation-inversion single crystal closed defect accumulating regions (H). At an early stage, orientation-inverse protrusions are induced on tall facets and unified with each other above the seeds. Orientation-inverse crystals growing on the unified protrusions become the orientation-inverse single crystal closed defect accumulating regions (H).Type: GrantFiled: September 3, 2004Date of Patent: December 4, 2007Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kensaku Motoki, Takuji Okahisa, Ryu Hirota, Seiji Nakahata, Koji Uematsu
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Patent number: 7288153Abstract: A method of fabricating an orientation film for a liquid crystal display device is provided. The orientation film is formed on a substrate. An ion-beam irradiation apparatus having an ion generator and a vacuum chamber having a stage on which the substrate is disposed are provided. The chamber is evacuated and an angle of the substrate having the orientation film is controlled such that the orientation film has a predetermined angle with respect to an ion beam of the ion-beam irradiation apparatus using the ion generator or the stage. The surface of the orientation film is irradiated by the ion beam. The ion beam has a predetermined intensity and dose. The substrate is subsequently heated at a predetermined temperature and time sufficient to harden a thermal polymerization functional group of the orientation layer.Type: GrantFiled: April 25, 2005Date of Patent: October 30, 2007Assignee: LG. Philips LCD Co., Ltd.Inventor: Yong-Sung Ham
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Patent number: 7279041Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.Type: GrantFiled: June 30, 2005Date of Patent: October 9, 2007Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Trung Tri Doan
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Patent number: 7270708Abstract: A susceptor (10) supporting a semiconductor substrate (W) in a vapor phase growth, wherein a pocket (11) is formed on an upper surface of the susceptor to arrange the semiconductor substrate (W) inside thereof. The pocket (11) has a two-stage structure having an upper stage pocket (11a) for supporting an outer peripheral edge portion of the semiconductor substrate (W) and a lower stage pocket (11b) formed on a lower stage of a center side from the upper stage pocket (11a). A hole (12) penetrated to a rear surface of the susceptor and opened in the vapor phase growth is formed in the lower stage pocket (11b).Type: GrantFiled: November 27, 2002Date of Patent: September 18, 2007Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Tomosuke Yoshida, Takeshi Arai, Kenji Akiyama, Hiroki Ose
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Patent number: 7258743Abstract: This invention relates to a process for controlling the orientation of secondary structures (A1, A2) with at least a crystalline part during the transfer of secondary structures from a primary structure (A) on which the secondary structures have an initial crystalline orientation identical to the orientation of the primary structure, onto at least one support structure (B), the process comprising: a) the formation of at least one orientation mark (Va, Va1, Va2) when the secondary structures are fixed to the primary structure (A), the mark having an arbitrary orientation with respect to the said initial crystalline orientation, but identical for each secondary structure, and b) when a set of secondary structures is transferred onto at least one support structure (B), an arrangement of the secondary structures so that their orientation marks can be oriented in a controlled manner.Type: GrantFiled: June 20, 2002Date of Patent: August 21, 2007Assignee: Commissariat A L'Energie AtomiqueInventors: Franck Fournel, Bernard Aspar, Hubert Moriceau
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Publication number: 20070166146Abstract: A semiconductor wafer which is disk-shaped as a whole, and which has a substantially flat face, a back substantially flat in at least a main portion thereof and substantially parallel to the face, and a side surface. The side surface is convex as a whole in a longitudinal sectional view. A means to be detected, which is composed of a local flat surface, is disposed in the side surface.Type: ApplicationFiled: January 8, 2007Publication date: July 19, 2007Inventor: Kazuma Sekiya
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Patent number: 7217323Abstract: A method for manufacturing a silicon carbide single crystal includes the steps of: setting a substrate as a seed crystal in a reactive chamber; introducing a raw material gas into the reactive chamber; growing a silicon carbide single crystal from the substrate; heating the gas at an upstream side from the substrate in a gas flow path; keeping a temperature of the substrate at a predetermined temperature lower than the gas so that the single crystal is grown from the substrate; heating a part of the gas, which is a non-reacted raw material gas and does not contribute to crystal growth, after passing through the substrate; and absorbing a non-reacted raw material gas component in the non-reacted raw material gas with an absorber.Type: GrantFiled: April 1, 2004Date of Patent: May 15, 2007Assignee: Denso CorporationInventors: Naohiro Sugiyama, Yasuo Kitou, Emi Makino, Kazukuni Hara, Kouki Futatsuyama, Atsuto Okamoto
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Patent number: 7217322Abstract: A method of fabricating an epitaxial silicon-germanium layer for an integrated semiconductor device comprises the step of depositing an arsenic in-situ doped silicon-germanium layer, wherein arsenic and germanium are introduced subsequently into different regions of said silicon-germanium layer during deposition of said silicon-germanium layer. By separating arsenic from germanium any interaction between arsenic and germanium is avoided during deposition thereby allowing fabricating silicon-germanium layers with reproducible doping profiles.Type: GrantFiled: September 2, 2004Date of Patent: May 15, 2007Assignee: Texas Instruments IncorporatedInventors: Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Angelo Pinto, Manfred Schiekofer, Philipp Steinmann, Badih El-Kareh
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Patent number: 7211144Abstract: A method of forming a tungsten nucleation layer using a sequential deposition process. The tungsten nucleation layer is formed by reacting pulses of a tungsten-containing precursor and a reducing gas in a process chamber to deposit tungsten on the substrate. Thereafter, reaction by-products generated from the tungsten deposition are removed from the process chamber. After the reaction by-products are removed from the process chamber, a flow of the reducing gas is provided to the process chamber to react with residual tungsten-containing precursor remaining therein. Such a deposition process forms tungsten nucleation layers having good step coverage. The sequential deposition process of reacting pulses of the tungsten-containing precursor and the reducing gas, removing reaction by-products, and than providing a flow of the reducing gas to the process chamber may be repeated until a desired thickness for the tungsten nucleation layer is formed.Type: GrantFiled: July 12, 2002Date of Patent: May 1, 2007Assignee: Applied Materials, Inc.Inventors: Xinliang Lu, Ping Jian, Jong Hyun Yoo, Ken Kaung Lai, Alfred W. Mak, Robert L. Jackson, Ming Xi
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Patent number: 7208044Abstract: This invention disclosure describes methods for the fabrication metal oxide films on surfaces by topotactic anion exchange, and laminate structures enabled by the method. A precursor metal-nonmetal film is deposited on the surface, and is subsequently oxidized via topotactic anion exchange to yield a topotactic metal-oxide product film. The structures include a metal-oxide layer(s) and/or a metal-nonmetal layer(s).Type: GrantFiled: November 24, 2004Date of Patent: April 24, 2007Inventor: Mark A. Zurbuchen
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Patent number: 7198671Abstract: A substrate comprising at least two layers which have different thermal expansion coefficients (TECs) is used for subsequent epitaxial growth of semiconductors. A typical example is an epitaxial growth of III-V Nitride (InGaAlBNAsP alloy semiconductor) on sapphire. Due to the thermal mismatch between III-V Nitrides and sapphire, epitaxially-processed wafers bow in a convex manner during cool down after the growth. A layered substrate compensates for the thermal mismatch between the epitaxial layered the top layer of the substrate, resulting in a flat wafer suitable for subsequent processing at high yields. The layered substrate is achieved by attaching to the back side of the substrate a material which has a lower TEC, for example silicon on the backside of the sapphire, to reduce or eliminate the bowing. Silicon is attached or grown on a sapphire wafer by such as wafer bonding or epitaxial growth.Type: GrantFiled: July 11, 2001Date of Patent: April 3, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Tetsuzo Ueda
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Patent number: 7175709Abstract: A method of forming an epitaxial layer of uniform thickness is provided to improve surface flatness. A substrate is first provided and a Si base layer is then formed on the substrate by epitaxy. A Si—Ge layer containing 5 to 10% germanium is formed on the Si base layer by epitaxy to normalize the overall thickness of the Si base layer and the Si—Ge layer containing 5 to 10% germanium.Type: GrantFiled: May 17, 2004Date of Patent: February 13, 2007Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Pang-Yen Tsai, Liang-Gi Yao, Chun-Chieh Lin, Wen-Chin Lee, Shih-Chang Chen
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Patent number: 7169227Abstract: A method for making a free-standing, single crystal, aluminum gallium nitride (AlGaN) wafer includes forming a single crystal AlGaN layer directly on a single crystal LiAlO2 substrate using an aluminum halide reactant gas, a gallium halide reactant gas, and removing the single crystal LiAlO2 substrate from the single crystal AlGaN layer to make the free-standing, single crystal AlGaN wafer. Forming the single crystal AlGaN layer may comprise depositing AlGaN by vapor phase epitaxy (VPE) using aluminum and gallium halide reactant gases and a nitrogen-containing reactant gas. The growth of the AlGaN layer using VPE provides commercially acceptable rapid growth rates. In addition, the AlGaN layer can be devoid of carbon throughout. Because the AlGaN layer produced is high quality single crystal, it may have a defect density of less than about 107 cm?2.Type: GrantFiled: March 25, 2003Date of Patent: January 30, 2007Assignee: Crystal Photonics, IncorporatedInventors: Herbert Paul Maruska, John Joseph Gallagher, Mitch M. C. Chou, David W. Hill
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Patent number: 7161148Abstract: New designs of electron devices such as scanning probes and field emitters based on tip structures are proposed. The tips are prepared from whiskers that are grown from the vapor phase by the vapor-liquid-solid technology. Some new designs for preparation of field-emitters and of probes for magnetic, electrostatic, morphological, etc, investigations based on the specific technology are proposed. New designs for preparation of multilever probes are proposed, too.Type: GrantFiled: May 31, 2000Date of Patent: January 9, 2007Assignee: Crystals and Technologies, Ltd.Inventors: Evgeny Invievich Givargizov, Michail Evgenievich Givargizov
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Patent number: 7135074Abstract: A method for manufacturing a silicon carbide single crystal includes the steps of: preparing a seed crystal with a screw dislocation generation region; and growing the single crystal on a growth surface of the seed crystal. The generation region occupies equal to or smaller than 50% of the growth surface, which has an offset angle equal to or smaller than 60 degrees. The screw dislocation density in the single crystal generated from the generation region is higher than that in the other region. The single crystal includes a flat C-surface facet disposed on a growing surface of the single crystal. The C-surface facet overlaps at least one of parts of the growing surface provided by projecting the generation region in a direction perpendicular to the growth surface and in a direction parallel to a <0001> axis, respectively.Type: GrantFiled: August 5, 2004Date of Patent: November 14, 2006Assignees: Kabushiki Kaisha Toyota Chuo Kenkyusho, Denso CorporationInventors: Itaru Gunjishima, Daisuke Nakamura, Naohiro Sugiyama, Fusao Hirose
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Patent number: 7128889Abstract: An ultrananocrystalline diamond (UNCD) having an average grain size between 3 and 5 nanometers (nm) with not more than about 8% by volume diamond having an average grain size larger than 10 nm. A method of manufacturing UNCD film is also disclosed in which a vapor of acetylene and hydrogen in an inert gas other than He wherein the volume ratio of acetylene to hydrogen is greater than 0.35 and less than 0.85, with the balance being an inert gas, is subjected to a suitable amount of energy to fragment at least some of the acetylene to form a UNCD film having an average grain size of 3 to 5 nm with not more than about 8% by volume diamond having an average grain size larger than 10 nm.Type: GrantFiled: May 13, 2004Date of Patent: October 31, 2006Inventors: John A. Carlisle, Orlando Auciello, James Birrell
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Patent number: 7128785Abstract: The invention relates to a device and to a method for depositing especially crystalline layers from the gas phase onto especially crystalline substrates. The device comprises a heated reaction chamber with a substrate support that receives at least one substrate; one or more heated sources where a gaseous halide is formed by chemical reaction of a halogen, especially HCl, fed to the source together with a substrate gas, and a metal, for example GA, In, Al associated with the source, which is transported through a gas inlet section to a substrate supported by the substrate support; and a hydride supply for supplying a hydride, especially NH3, AsH3 or PH3 into the reaction chamber. A plurality of rotationally driven substrate supports is disposed in an annular arrangement on a substrate support carrier, the sources being disposed in the center of said substrate carrier.Type: GrantFiled: October 14, 2003Date of Patent: October 31, 2006Assignee: Aixtron AGInventors: Johannes Kaeppeler, Michael Heuken, Rainer Beccard, Gerhard Karl Strauch
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Patent number: 7118813Abstract: A III–V nitride, e.g., GaN, substrate including a (0001) surface offcut from the <0001> direction predominantly toward a direction selected from the group consisting of <10-10> and <11-20> directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 ?m2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm?2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III–V nitride-based microelectronic and opto-electronic devices.Type: GrantFiled: November 14, 2003Date of Patent: October 10, 2006Assignee: Cree, Inc.Inventors: Xueping Xu, Robert P. Vaudo, Jeffrey S. Flynn, George R. Brandes
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Patent number: 7083679Abstract: A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.Type: GrantFiled: November 8, 2001Date of Patent: August 1, 2006Assignee: Nichia CorporationInventors: Hiroyuki Kiyoku, Shuji Nakamura, Tokuya Kozaki, Naruhito Iwasa, Kazuyuki Chocho
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Patent number: RE40647Abstract: The first object of the present invention is to provide a PDP with improved panel brightness which is achieved by improving the efficiency in conversion from discharge energy to visible rays. The second object of the present invention is to provide a PDP with improved panel life which is achieved by improving the protecting layer protecting the dielectrics glass layer. To achieve the first object, the present invention sets the amount of xenon in the discharge gas to the range of 10% by volume to less than 100% by volume, and sets the charging pressure for the discharge gas to the range of 500 to 760 Torr which is higher than conventional charging pressures. With such construction, the panel brightness increases. Also, to achieve the second object, the present invention has, on the surface of the dielectric glass layer, a protecting layer consisting of an alkaline earth oxide with (100)-face or (110)-face orientation.Type: GrantFiled: November 29, 2001Date of Patent: March 10, 2009Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masaki Aoki, Hideo Torii, Eiji Fujii, Mitsuhiro Ohtani, Takashi Inami, Hiroyuki Kawamura, Hiroyoshi Tanaka, Ryuichi Murai, Yasuhisa Ishikura, Yutaka Nishimura, Katsuyoshi Yamashita