Using An Energy Beam Or Field, A Particle Beam Or Field, Or A Plasma (e.g., Mbe) Patents (Class 117/108)
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Patent number: 7556688Abstract: A method for growing bulk GaN and AlGaN single crystal boules, preferably using a modified HVPE process, is provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth to achieve n-, i-, or p-type conductivity. In order to have growth cycles of sufficient duration, preferably an extended Ga source is used in which a portion of the Ga source is maintained at a relatively high temperature while most of the Ga source is maintained at a temperature close to, and just above, the melting temperature of Ga. To grow large boules of AlGaN, preferably multiple Al sources are used, the Al sources being sequentially activated to avoid Al source depletion and excessive degradation.Type: GrantFiled: May 20, 2005Date of Patent: July 7, 2009Assignee: Freiberger Compound Materials GmbHInventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A. Dmitriev
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Patent number: 7553368Abstract: A process for the manufacture of a gallium rich gallium nitride film is described. The process comprises (a) preparing a reaction mixture containing a gallium species and a nitrogen species, the gallium species and the nitrogen species being selected such that, when they react with each other, gallium nitride is formed; and (b) growing the gallium rich gallium nitride film from the reaction mixture, by allowing the gallium species to react with the nitrogen species and to deposit gallium nitride on a substrate selected from the group consisting of silicon, glass, sapphire, quartz and crystalline materials having a lattice constant closely matched to gallium nitride, including zinc oxide, optionally with a zinc oxide buffer layer, at a temperature of from about 480° C. to about 900 ° C. and in the presence of a gaseous environment in which the partial pressure of oxygen is less than 10?4 Torr, wherein the ratio of gallium atoms to nitrogen atoms in the gallium rich gallium nitride film is from 1.01 to 1.20.Type: GrantFiled: May 19, 2003Date of Patent: June 30, 2009Assignee: Gallium Enterprises Pty Ltd.Inventors: Kenneth Scott Alexander Butcher, Trevor Lionel Tansley, Afifuddin
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Patent number: 7544398Abstract: The invention relates to methods for producing doped thin layers on substrates comprising the steps of depositing a dopant precursor on the substrate via an atomic layer deposition technique; and exposing the deposited dopant precursor to radicals. The methods can further comprise depositing a compound adjacent the dopant metal via an atomic layer deposition technique; and exposing the deposited compound to radicals, thereby providing a host. The invention relates to articles comprising approximately atomically thin layers of metals or metal oxides doped with at least one different metal or metal oxide. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention.Type: GrantFiled: April 26, 2006Date of Patent: June 9, 2009Assignee: The Regents of the Univesity of CaliforniaInventors: Jane P. Chang, Trinh Tu Van, Tony Chiang, Chandra Deshpandey, Karl Lesser
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Publication number: 20090114887Abstract: A method of forming a bulk, free-standing cubic III-N substrate including a) growing epitaxial III-N material on a cubic III-V substrate using molecular beam epitaxy (MBE); and b) removing the III-V substrate to leave the III-N material as a bulk, free-standing cubic III-N substrate. A bulk, free-standing cubic III-N substrate for fabrication of III-N devices.Type: ApplicationFiled: May 5, 2006Publication date: May 7, 2009Inventors: A. J. Kent, S. V. Novikov, N. M. Stanton, R. P. Campion, C. T. Foxon
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Publication number: 20090084310Abstract: The present invention discloses a method for manufacturing single crystal nano-structures capable of controlling morphology so as to allow materials with various morphologies to form nano-structures in desired morphologies and a device for manufacturing the nano-structures, according to variables such as a temperature of a target member in a vacuum system, an applied voltage applied to the target member, a pulse width, a kind of precursors after vaporization of the target member, etc. Each of the nano-structures of the present invention can be used as a unit of a storage medium so that a high density storage medium can be manufactured and various devices can be miniaturized by using particular electrical and physical characteristics that are exhibited in a nano-size semiconductor or metal.Type: ApplicationFiled: November 29, 2007Publication date: April 2, 2009Inventors: Si-Kyung Choi, Hyun-Jung Kim
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Patent number: 7504643Abstract: A cleaning arrangement for a lithographic apparatus module may be provided in a collector. The cleaning arrangement includes a hydrogen radical source configured to provide a hydrogen radical containing gas to at least part of the module and a pump configured to pump gas through the module such that a flow speed of the hydrogen radical containing gas provided through at least part of the module is at least 1 m/s. The cleaning arrangement may also include a gas shutter configured to modulate a flow of the hydrogen radical containing gas to at least part of the module, a buffer volume of at least 1 m3 in communication with the module, and a pump configured to provide a gas pressure in the buffer volume between 0.001 mbar (0.1 Pa) and 1 mbar (100 Pa). The cleaning arrangement may further include a gas return system.Type: GrantFiled: June 1, 2006Date of Patent: March 17, 2009Assignee: ASML Netherlands B.V.Inventors: Johannes Maria Freriks, Vadim Yevgenyevich Banine, Vladimir Vitalevitch Ivanov, Derk Jan Wilfred Klunder, Maarten Marinus Johannes Wilhelmus Van Herpen
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Publication number: 20090064922Abstract: Methods are disclosed for producing highly doped semiconductor materials. Using the invention, one can achieve doping densities that exceed traditional, established carrier saturation limits without deleterious side effects. Additionally, highly doped semiconductor materials are disclosed, as well as improved electronic and optoelectronic devices/components using said materials. The innovative materials and processes enabled by the invention yield significant performance improvements and/or cost reductions for a wide variety of semiconductor-based microelectronic and optoelectronic devices/systems. Materials are grown in an anion-rich environment, which, in the preferred embodiment, are produced by moderate substrate temperatures during growth in an oxygen-poor environment.Type: ApplicationFiled: February 20, 2007Publication date: March 12, 2009Inventors: Thomas D. Boone, Eric S. Harmon, Robert D. Koudelka, David B. Salzman, Jerry M. Woodall
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Publication number: 20090068082Abstract: This invention relates to a highly stable silicon hydride (SiH(1/p)) surface coating formed from high binding energy hydride ions. SiH(1/p) may be synthesized in a cell for the catalysis of atomic hydrogen to form novel hydrogen species and/or compositions of matter containing new forms of hydrogen. The reaction may be maintained by a microwave plasma of a source of atomic hydrogen, a source of catalyst, and a source of silicon.Type: ApplicationFiled: June 19, 2008Publication date: March 12, 2009Inventor: Randell L. Mills
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Patent number: 7495239Abstract: A cleaning arrangement for a lithographic apparatus module may be provided in a collector. The cleaning arrangement includes a hydrogen radical source configured to provide a hydrogen radical containing gas to at least part of the module and a pump configured to pump gas through the module such that a flow speed of the hydrogen radical containing gas provided through at least part of the module is at least 1 m/s. The cleaning arrangement may also include a gas shutter configured to modulate a flow of the hydrogen radical containing gas to at least part of the module, a buffer volume of at least 1 m3 in communication with the module, and a pump configured to provide a gas pressure in the buffer volume between 0.001 mbar (0.1 Pa) and 1 mbar (100 Pa).Type: GrantFiled: December 22, 2005Date of Patent: February 24, 2009Assignee: ASML Netherlands B.V.Inventors: Johannes Maria Freriks, Vadim Yevgenyevich Banine, Vladimir Vitalevitch Ivanov
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Patent number: 7485349Abstract: A method for forming thin films of a semiconductor device is provided. The thin film formation method presented here is based upon a time-divisional process gas supply in a chemical vapor deposition (CVD) method, where the process gases are supplied and purged sequentially, and additionally plasma is generated in synchronization with the cycle of pulsing reactant gases. A method of forming thin films that possess a property of gradient composition profile is also presented.Type: GrantFiled: October 25, 2006Date of Patent: February 3, 2009Assignee: ASM Genitech Korea Ltd.Inventors: Won-Yong Koh, Chun-soo Lee
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Patent number: 7449065Abstract: A method and the benefits resulting from the product thereof are disclosed for the growth of large, low-defect single-crystals of tetrahedrally-bonded crystal materials. The process utilizes a uniquely designed crystal shape whereby the direction of rapid growth is parallel to a preferred crystal direction. By establishing several regions of growth, a large single crystal that is largely defect-free can be grown at high growth rates. This process is particularly suitable for producing products for wide-bandgap semiconductors, such as SiC, GaN, AlN, and diamond. Large low-defect single crystals of these semiconductors enable greatly enhanced performance and reliability for applications involving high power, high voltage, and/or high temperature operating conditions.Type: GrantFiled: December 2, 2006Date of Patent: November 11, 2008Assignee: Ohio Aerospace InstituteInventors: J. Anthony Powell, Philip G. Neudeck, Andrew J. Trunek, David J. Spry
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Patent number: 7435297Abstract: A method for growing Group III nitride materials using a molten halide salt as a solvent to solubilize the Group-III ions and nitride ions that react to form the Group III nitride material. The concentration of at least one of the nitride ion or Group III cation is determined by electrochemical generation of the ions.Type: GrantFiled: April 8, 2005Date of Patent: October 14, 2008Assignee: Sandia CorporationInventors: Karen E. Waldrip, Jeffrey Y. Tsao, Thomas M. Kerley
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Patent number: 7419546Abstract: A method for forming a noble metal coating on a gas diffusion medium substantially free of ionomeric components comprising subjecting an electrically conductive web to a first ion beam having an energy not higher than 500 eV, then to a second beam having an energy of at least 500 eV, containing the ions of at least one noble metal and electrodes provided by the method.Type: GrantFiled: March 3, 2005Date of Patent: September 2, 2008Assignee: BASF Fuel Cell GmbHInventors: Andrea F. Gulla, Robert J. Allen, Emory De Castro, Enrico Ramunni
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Patent number: 7402206Abstract: A method of synthesizing or growing a compound having the general formula Mn+1AXn(16) where M is a transition metal, n is 1, 2, 3 or higher, A is an A-group element and X is carbon, nitrogen or both, which comprises the step of exposing a substrate to gaseous components and/or components vaporized from at least one solid source (13, 14, 15) whereby said components react with each other to produce the Mn+1AXn (16) compound.Type: GrantFiled: December 2, 2002Date of Patent: July 22, 2008Assignee: ABB ABInventors: Peter Isberg, Jens-Petter Palmquist, Ulf Jansson, Lars Hultman, Jens Birch, Timo Seppänen
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Patent number: 7399357Abstract: A method for the controlled growth of thin films by atomic layer deposition by making use of multilayers and using energetic radicals to facilitate the process is described in this invention. In this method, a first reactant is admitted into the reaction chamber volume, where there is a substrate to be coated. This first reactant then adsorbs, in a self-limiting process, onto the substrate to be coated. After removing this first reactant from the reaction chamber volume, leaving a layer coating the substrate, a second reactant is then admitted into the reaction chamber volume, which adsorbs onto this initial layer in a self-limiting process. The second reactant is then also removed from the reaction chamber volume. Following this procedure a self-limited multilayer of unreacted species remains adsorbed on the substrate to be coated. If additional chemical species are desirable, these exposures and removals could be continued. Next this multilayer is exposed to a flux of radicals.Type: GrantFiled: May 8, 2003Date of Patent: July 15, 2008Inventor: Arthur Sherman
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Patent number: 7368067Abstract: A p-type ZnO semiconductor film comprised mainly of Zn and O elements is disclosed. The film is characterized as containing an alkali metal and nitrogen. Preferably, the alkali metal is contained such that its concentration is distributed to increase toward an end or toward both ends in the thickness direction of the film. More preferably, the alkali metal is contained in the concentration range of 1×1018-5×1021 cm?3 and the nitrogen in the concentration range of 2×1017-5×1020 cm?3.Type: GrantFiled: January 26, 2005Date of Patent: May 6, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Shigeo Yata, Kenichiro Wakisaka, Takeshi Kobayashi
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Patent number: 7341628Abstract: Gallium Nitride layers grown as single crystals by epitaxy such as Hydride Vapor Phase Epitaxy (HVPE) contain large numbers of crystal defects such as hexagonal pits, which limit the yield and performance of opto- and electronic devices. In this method, the Gallium Nitride layer is first coated with an Aluminum layer of approximate thickness of 0.1 microns. Next, Nitrogen is ion implanted through the Aluminum layer so as to occupy mostly the top 0.1 to 0.5 microns of the Gallium Nitride layer. Finally, through a pulsed directed energy beam such as electron or photons, with a fluence of approximately 1 Joule/cm2 the top approximately 0.5 microns are converted to a single crystal with reduced defect density.Type: GrantFiled: December 16, 2004Date of Patent: March 11, 2008Inventor: Andreas A. Melas
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Patent number: 7338582Abstract: It is an object of the present invention to provide an oxygen reduction electrode having excellent oxygen reduction catalysis ability. In a method of manufacturing a manganese oxide nanostructure having excellent oxygen reduction catalysis ability and composed of secondary particles which are aggregations of primary particles of manganese oxide, a target plate made of manganese oxide is irradiated with laser light to desorb the component substance of the target plate, and the desorbed substance is deposited on a substrate facing substantially parallel to the aforementioned target plate.Type: GrantFiled: August 16, 2005Date of Patent: March 4, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Nobuyasu Suzuki, Yasunori Morinaga, Hidehiro Sasaki, Yuka Yamada
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Publication number: 20080017100Abstract: A GaN based substrate is obtained with a simple etching. The GaN based substrate is separate from another base substrate with the etching. The whole process is easy and costs low. The substrate is made of a material having a matching lattice length for a lattice structure so that the substrate has good characteristics. And the GaN based substrate has good heat dissipation so that the stability and life-time of GaN based devices on the GaN based substrate are enhanced even when they are constantly operated under a high power.Type: ApplicationFiled: September 25, 2006Publication date: January 24, 2008Applicant: National Central UniversityInventors: Jen-Inn Chyi, Guan-Ting Chen
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Patent number: 7279041Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.Type: GrantFiled: June 30, 2005Date of Patent: October 9, 2007Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Trung Tri Doan
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Patent number: 7276121Abstract: Method and apparatus are provided for forming metal nitride (MN), wherein M is contacted with iodine vapor or hydrogen iodide (HI) vapor to form metal iodide (MI) and then contacting MI with ammonia to form the MN in a process of reduced or no toxicity. Such method is conducted in a reactor that is maintained at a pressure below one atmosphere for enhanced uniformity of gas flow and of MN product. The MN is then deposited on a substrate, on one or more seeds or it can self-nucleate on the walls of a growth chamber, to form high purity and uniform metal nitride material. The inventive MN material finds use in semiconductor materials, in nitride electronic devices, various color emitters, high power microwave sources and numerous other electronic applications.Type: GrantFiled: November 10, 2004Date of Patent: October 2, 2007Assignee: United States of America as represented by the Secretary of the Air ForceInventors: David F. Bliss, Vladimir L. Tassev, Michael J. Suscavage, John S. Bailey
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Patent number: 7273664Abstract: The invention concerns a monocrystalline coating crack-free coating of gallium nitride or mixed gallium nitride and another metal, on a substrate likely to cause extensive stresses in the coating, said substrate being coated with a buffer layer, wherein: at least a monocrystalline layer of a material having a thickness ranging between 100 and 300 nm, preferably between 200 and 250 nm, and whereof crystal lattice parameter is less than the crystal lattice parameter of the gallium nitride or of the mixed gallium nitride with another metal, is inserted in the coating of gallium nitride or mixed gallium nitride with another metal. The invention also concerns the method for preparing said coating. The invention further concerns electronic and optoelectronic devices comprising said coating.Type: GrantFiled: June 8, 2001Date of Patent: September 25, 2007Assignee: Picogiga International SASInventors: Fabrice Semond, Jean Claude Massies, Nicolas Pierre Grandjean
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Publication number: 20070196743Abstract: A mask for laser-crystallizing amorphous silicon into polysilicon is provided. The mask comprises a transparent substrate having a first block, a second block, and a third block with equal sizes. The second block is located between the first block and the third block. The first block includes a plurality of first transmission regions and a plurality of first opaque regions located between the first transmission regions. The second block includes a plurality of second transmission regions correspond to the first opaque regions and a plurality of second opaque regions located between the second transmission regions and corresponds to the first transmission regions. The third block includes a plurality of third transmission regions arranged corresponding to the centers of the first transmission regions and corresponding to centers of the second transmission regions and a plurality of third opaque regions located between the third transmission regions.Type: ApplicationFiled: November 8, 2006Publication date: August 23, 2007Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Fang-Tsun Chu, Yu-Cheng Chen
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Publication number: 20070163489Abstract: A method of forming a layer, including forming an insulation layer having an opening on a single crystalline substrate, the opening partially exposing an upper face of the substrate, forming a first seed layer in the opening, converting an upper portion of the first seed layer to a first amorphous layer, converting the first amorphous layer to a second seed layer, forming a second amorphous layer on the second seed layer, and converting the second amorphous layer to a single crystalline layer.Type: ApplicationFiled: January 12, 2007Publication date: July 19, 2007Inventors: Yong-Hoon Son, Jong-Wook Lee
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Patent number: 7189287Abstract: Formation of a layer of material on a surface by atomic layer deposition methods and systems includes using electron bombardment of the chemisorbed precursor.Type: GrantFiled: June 29, 2004Date of Patent: March 13, 2007Assignee: Micron Technology, Inc.Inventor: Neal R. Rueger
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Patent number: 7182812Abstract: The bulk synthesis of highly crystalline noncatalytic low melting metals such as ?-gallium oxide tubes, nanowires, and nanopaintbrushes is accomplished using molten gallium and microwave plasma containing a mixture of monoatomic oxygen and hydrogen. Gallium oxide nanowires were 20–100 nm thick and tens to hundreds of microns long. Transmission electron microscopy (TEM) revealed the nanowires to be highly crystalline and devoid of any structural defects. Results showed that multiple nucleation and growth of gallium oxide nanostructures can occur directly out of molten gallium exposed to appropriate composition of hydrogen and oxygen in the gas phase. These gallium oxide nanostructures are of particular interest for opto-electronic devices and catalytic applications.Type: GrantFiled: September 16, 2003Date of Patent: February 27, 2007Assignee: University of LouisvilleInventors: Mahendra Kumar Sunkara, Shashank Sharma
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Patent number: 7160529Abstract: Novel uses of diamondoid-containing materials in the field of microelectronics are disclosed. Embodiments include, but are not limited to, thermally conductive films in integrated circuit packaging, low-k dielectric layers in integrated circuit multilevel interconnects, thermally conductive adhesive films, thermally conductive films in thermoelectric cooling devices, passivation films for integrated circuit devices (ICs), and field emission cathodes. The diamondoids employed in the present invention may be selected from lower diamondoids, as well as the newly provided higher diamondoids, including substituted and unsubstituted diamondoids. The higher diamondoids include tetramantane, pentamantane, hexamantane, heptamantane, octamantane, nonamantane, decamantane, and undecamantane.Type: GrantFiled: February 24, 2004Date of Patent: January 9, 2007Assignee: Chevron U.S.A. Inc.Inventors: Jeremy E. Dahl, Robert M. Carlson, Shenggao Liu
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Patent number: 7087113Abstract: A method for forming a sharply biaxially textured substrate, such as a single crystal substrate, includes the steps of providing a deformed metal substrate, followed by heating above the secondary recrystallization temperature of the deformed substrate, and controlling the secondary recrystallization texture by either using thermal gradients and/or seeding. The seed is selected to shave a stable texture below a predetermined temperature. The sharply biaxially textured substrate can be formed as a tape having a length of 1 km, or more. Epitaxial articles can be formed from the tapes to include an epitaxial electromagnetically active layer. The electromagnetically active layer can be a superconducting layer.Type: GrantFiled: July 3, 2002Date of Patent: August 8, 2006Assignee: UT-Battelle, LLCInventor: Amit Goyal
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Patent number: 7077904Abstract: The present invention relates to a method for forming silicon oxide films on substrates using an atomic layer deposition process. Specifically, the silicon oxide films are formed at low temperature and high deposition rate via the atomic layer deposition process using a Si2Cl6 source unlike a conventional atomic layer deposition process using a SiCl4 source. The atomic layer deposition apparatus used in the above process can be in-situ cleaned effectively at low temperature using a HF gas or a mixture gas of HF gas and gas containing —OH group.Type: GrantFiled: April 23, 2003Date of Patent: July 18, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Byoung Ha Cho, Yong Il Kim, Cheol Ho Shin, Won Hyung Lee, Jung Soo Kim, Sang Tae Sim
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Patent number: 7060131Abstract: The present invention relates a method for epitaxial growth of a second group III-V crystal having a second lattice constant over a first group III-V crystal having a first lattice constant, wherein strain relaxation associated with lattice-mismatched epitaxy is suppressed and thus dislocation defects do not form. In the first step, the surface of the first group III-V crystal (substrate) is cleansed by desorption of surface oxides. In the second step, a layer of condensed group-V species is condensed on the surface of the first group III-V crystal. In the third step, a mono-layer of constituent group-III atoms is deposited over the layer of condensed group-V species in order for the layer of constituent group-III atoms to retain the condensed group-V layer. Subsequently, the mono-layer of group-III atoms is annealed at a higher temperature.Type: GrantFiled: May 9, 2001Date of Patent: June 13, 2006Assignee: HRL Laboratories, LLCInventor: Binqiang Shi
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Patent number: 7048798Abstract: A method of producing a silicon carbide single crystal in which a sublimation raw material 40 is accommodated at the side of vessel body 12 in a graphite crucible 10, placing a seed crystal of a silicon carbide single crystal at the side of cover body 11 of the graphite crucible 10, the sublimation raw material 40 is sublimated by a first induction heating coil 21 placed at the side of sublimation raw material 40, a re-crystallization atmosphere is form by a second induction heating coil 20 placed at the side of cover body 11 so that the sublimation raw material 40 sublimated by the first induction heating coil 21 is re-crystallizable only in the vicinity of the seed crystal of a silicon carbide single crystal, and the sublimation raw material 40 is re-crystallized on the seed crystal of a silicon carbide single crystal, and a silicon carbide single crystal 60 is grown while keeping the whole surface of its growth surface in convex shape through the all growth processes.Type: GrantFiled: December 21, 2001Date of Patent: May 23, 2006Assignee: Bridgestone CorporationInventors: Takayuki Maruyama, Shigeki Endo
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Patent number: 7037371Abstract: After distributing a nonmetal element in a region in the vicinity of a surface portion of a semiconductor layer, a metal film is deposited on the semiconductor layer. Next, a semiconductor-metal compound layer is epitaxially grown in the surface portion of the semiconductor layer by causing a reaction between an element included in the semiconductor layer and a metal included in the metal film through annealing carried out on the metal film.Type: GrantFiled: October 3, 2000Date of Patent: May 2, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shin Hashimoto, Takenobu Kishida, Kyoko Egashira, Yoshifumi Hata, Toru Nishiwaki, Tomoya Tanaka
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Patent number: 7022182Abstract: The present invention provides a single-crystal ZnO thin film having a high ferromagnetic transition temperature. In one aspect of the present invention, the ZnO thin film comprises a ferromagnetic p-type single-crystal zinc oxide including a transition metal element consisting of Mn, and a p-type dopant. In another aspect of the present invention, the thin film comprises a ferromagnetic p-type single-crystal zinc oxide including a transition metal element consisting of Mn, a p-type dopant, and an n-type dopant. The single-crystal zinc oxide material can be applied to quantum computers and high-capacity magnetic-optical recording medium by combining with conventional n-type or p-type transparent electrode ZnO materials or optical fibers, and to powerful information-communication devices or quantum computers as a photoelectric material usable for a wide range from visible light to ultraviolet light.Type: GrantFiled: July 3, 2000Date of Patent: April 4, 2006Assignee: Japan Science and Technology AgencyInventors: Hiroshi Yoshida, Kazunori Sato
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Patent number: 7022183Abstract: To improve the laser annealing process for polycrystallizing amorphous silicon to form silicon thin films having large crystal particle diameters at a high throughput, the present invention is directed to a process of crystallization by irradiation of a semiconductor thin film formed on a substrate with pulsed laser light. The process comprises having a means to shape laser light into a linear beam and a means to periodically and spatially modulate the intensity of pulsed laser in the direction of the long axis of the linear beam by passing through a phase-shifting stripy pattern perpendicular to the long axis, and collectively forming for each shot a polycrystalline film composed of crystals which have grown in a certain direction over the entire region irradiated with the linear beam.Type: GrantFiled: June 17, 2003Date of Patent: April 4, 2006Assignee: Hiatchi, Ltd.Inventors: Kazuo Takeda, Jun Gotou, Masakazu Saito, Makoto Ohkura, Takeshi Satou, Hiroshi Fukuda, Takeo Shiba
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Patent number: 7001459Abstract: A method of making a spinel-structured metal oxide on a substrate by molecular beam epitaxy, comprising the step of supplying activated oxygen, a first metal atom flux, and at least one other metal atom flux to the surface of the substrate, wherein the metal atom fluxes are individually controlled at the substrate so as to grow the spinel-structured metal oxide on the substrate and the metal oxide is substantially in a thermodynamically stable state during the growth of the metal oxide. A particular embodiment of the present invention encompasses a method of making a spinel-structured binary ferrite, including Co ferrite, without the need of a post-growth anneal to obtain the desired equilibrium state.Type: GrantFiled: August 29, 2003Date of Patent: February 21, 2006Assignee: Battelle Memorial InstituteInventor: Scott A. Chambers
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Patent number: 6962624Abstract: The invention relates to a method and a device for depositing especially, organic layers. In a heated reactor, a non-gaseous starting material that is stored in a source in the form of a container is transported from said source to a substrate by a carrier gas in gaseous form and is deposited on said substrate. The rate of production of the gaseous starting material by the source is unpredictable due to a heat input that cannot be regulated in a reproducible manner and due to cooling resulting from the carrier gas. The invention therefore provides that the preheated carrier gas washes through the starting material from bottom to top, the starting material being kept essentially isothermal in relation to the carrier gas by the heated container walls.Type: GrantFiled: March 28, 2003Date of Patent: November 8, 2005Assignee: Aixtron AGInventors: Holger Jürgensen, Gerhard Karl Strauch, Markus Schwambera
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Patent number: 6953703Abstract: An epitaxial growth system comprises a housing around an epitaxial growth chamber. A substrate support is located within the growth chamber. A gallium source introduces gallium into the growth chamber and directs the gallium towards the substrate. An activated nitrogen source introduces activated nitrogen into the growth chamber and directs the activated nitrogen towards the substrate. The activated nitrogen comprises ionic nitrogen species and atomic nitrogen species. An external magnet and/or an exit aperture control the amount of atomic nitrogen species and ionic nitrogen species reaching the substrate.Type: GrantFiled: June 30, 2003Date of Patent: October 11, 2005Assignee: The Trustees of Boston UniversityInventor: Theodore D. Moustakas
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Patent number: 6916374Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.Type: GrantFiled: October 8, 2002Date of Patent: July 12, 2005Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Trung Tri Doan
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Patent number: 6902620Abstract: Atomic layer deposition systems and methods are disclosed utilizing a multi-wafer sequential processing chamber. The process gases are sequentially rotated among the wafer stations to deposit a portion of a total deposition thickness on each wafer at each station. A rapid rotary switching of the process gases eliminates having to divert the process gases to a system vent and provides for atomic layer film growth sufficient for high-volume production applications. Conventional chemical vapor deposition can also be performed concurrently with atomic layer deposition within the multi-wafer sequential processing chamber.Type: GrantFiled: December 19, 2001Date of Patent: June 7, 2005Assignee: Novellus Systems, Inc.Inventors: Thomas R. Omstead, Karl B. Levy
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Patent number: 6899928Abstract: The present invention is directed towards a process and apparatus for epitaxial deposition of a material, e.g., a layer of MgO, onto a substrate such as a flexible metal substrate, using dual ion beams for the ion beam assisted deposition whereby thick layers can be deposited without degradation of the desired properties by the material. The ability to deposit thicker layers without loss of properties provides a significantly broader deposition window for the process.Type: GrantFiled: July 29, 2002Date of Patent: May 31, 2005Assignee: The Regents of the University of CaliforniaInventors: James R. Groves, Paul N. Arendt, Robert H. Hammond
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Patent number: 6896731Abstract: The present invention provides a low-resistivity p-type single-crystal zinc oxide. An n-type dopant and p-type dopant are doped into zinc oxide with higher concentration of the p-type dopant than that of the n-type dopant during forming a single-crystal of the zinc oxide through a thin film forming process. Further, an element of the second group is co-doped to allow oxygen to be stabilized.Type: GrantFiled: July 4, 2000Date of Patent: May 24, 2005Assignee: Japan Science and Technology Corp.Inventors: Tetsuya Yamamoto, Hiroshi Yoshida, Takafumi Yao
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Patent number: 6869880Abstract: A continuous in situ process of deposition, etching, and deposition is provided for forming a film on a substrate using a plasma process. The etch-back may be performed without separate plasma activation of the etchant gas. The sequence of deposition, etching, and deposition permits features with high aspect ratios to be filled, while the continuity of the process results in improved uniformity.Type: GrantFiled: January 24, 2002Date of Patent: March 22, 2005Assignee: Applied Materials, Inc.Inventors: Padmanabhan Krishnaraj, Pavel Ionov, Canfeng Lai, Michael Santiago Cox, Shamouil Shamouilian
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Patent number: 6863728Abstract: A low defect (e.g., dislocation and micropipe) density silicon carbide (SiC) is provided as well as an apparatus and method for growing the same. The SiC crystal, grown using sublimation techniques, is preferably divided into two stages of growth. During the first stage of growth, the crystal grows in a normal direction while simultaneously expanding laterally. Although dislocations and other material defects may propagate within the axially grown material, defect propagation and generation in the laterally grown material are substantially reduced, if not altogether eliminated. After the crystal has expanded to the desired diameter, the second stage of growth begins in which lateral growth is suppressed and normal growth is enhanced. A substantially reduced defect density is maintained within the axially grown material that is based on the laterally grown first stage material.Type: GrantFiled: May 31, 2002Date of Patent: March 8, 2005Assignee: The Fox Group, Inc.Inventors: Yury Alexandrovich Vodakov, Mark Grigorievich Ramm, Evgeny Nikolaevich Mokhov, Alexandr Dmitrievich Roenkov, Yury Nikolaevich Makarov, Sergei Yurievich Karpov, Mark Spiridonovich Ramm, Heikki I. Helava
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Patent number: 6860943Abstract: Disclosed is a method for producing a Group III nitride compound semiconductor including a pit formation step in which a portion of an uppermost layer of a first Group III nitride compound semiconductor layer containing one or more sub-layers, the portion containing lattice defects, is subjected to treatment by use of a solution or vapor which corrodes the portion more easily than it corrodes a portion of the uppermost layer containing no lattice defects, the first Group III nitride compound semiconductor layer not being accompanied by a substrate therefor as a result of removal therefrom, or being accompanied by a substrate such that the semiconductor layer is formed with or without intervention of a buffer layer provided on the substrate; and a lateral growth step of growing a second Group III nitride compound semiconductor layer through vertical and lateral epitaxial overgrowth around nuclei as seeds for crystal growth which are on flat portions of the uppermost layer of the first Group III nitride compounType: GrantFiled: October 11, 2002Date of Patent: March 1, 2005Assignee: Toyoda Gosei Co., Ltd.Inventors: Masayoshi Koike, Hiroshi Watanabe
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Patent number: 6841003Abstract: Carbon nanotubes are formed on a surface of a substrate using a plasma chemical deposition process. After the nanotubes have been grown, a purification step is performed on the newly formed nanotube structures. The purification removes graphite and other carbon particles from the walls of the grown nanotubes and controls the thickness of the nanotube layer. The purification is performed with the plasma at the same substrate temperature. For the purification, the hydrogen containing gas added as an additive to the source gas for the plasma chemical deposition is used as the plasma source gas. Because the source gas for the purification plasma is added as an additive to the source gas for the chemical plasma deposition, the grown carbon nanotubes are purified by reacting with the continuous plasma which is sustained in the plasma process chamber. This eliminates the need to purge and evacuate the plasma process chamber as well as to stabilize the pressure with the purification plasma source gas.Type: GrantFiled: November 22, 2002Date of Patent: January 11, 2005Assignee: cDream Display CorporationInventors: Sung Gu Kang, Craig Bae
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Patent number: 6841002Abstract: Carbon nanotubes are formed on a surface of a substrate using a plasma chemical deposition process. After the nanotubes have been grown, a post-treatment step is performed on the newly formed nanotube structures. The post-treatment removes graphite and other carbon particles from the walls of the grown nanotubes and controls the thickness of the nanotube layer. The post-treatment is performed with the plasma at the same substrate temperature. For the post-treatment, the hydrogen containing gas is used as a plasma source gas. During the transition from the nanotube growth step to the post-treatment step, the pressure in the plasma process chamber is stabilized with the aforementioned purifying gas without shutting off the plasma in the chamber. This eliminates the need to purge and evacuate the plasma process chamber.Type: GrantFiled: November 22, 2002Date of Patent: January 11, 2005Assignee: cDream Display CorporationInventors: Sung Gu Kang, Craig Bae
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Patent number: 6811611Abstract: A method and system for growing a crystalline layer on a substrate. Using an electrically-shielded RF (ESRF) source, a plasma is created and directed to a substrate inside the ESRF source. The plasma arrives at the substrate surface with a high mobility and enables its constituents to form a highly regular structure on the substrates.Type: GrantFiled: August 16, 2002Date of Patent: November 2, 2004Assignee: Tokyo Electron LimitedInventor: Wayne L. Johnson
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Patent number: 6800135Abstract: A ZnO/sapphire substrate includes an R-plane sapphire substrate whose (0 1-1 2) planes are parallel to the surface thereof and a ZnO epitaxial film formed on the R-plane sapphire substrate. The (1 1-2 0) planes of the ZnO epitaxial film are disposed with an interplanar spacing in the range of about 1.623 to 1.627 Å parallel to the (0 1-1 2) planes of the R-plane sapphire substrate.Type: GrantFiled: June 17, 2002Date of Patent: October 5, 2004Assignee: Murata Manufacturing Co., Ltd.Inventors: Jun Koike, Hideharu Ieki
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Patent number: 6790278Abstract: The present invention provides a method for preparing a novel low-resistance p-type SrTiO3 capable of opening the way for oxide electronics in combination with an already developed low-resistance n-type SrTiO3. The method is characterized in that an acceptor and a donor are co-doped into a perovskite-type transition-metal oxide SrTiO3 during crystal growth.Type: GrantFiled: December 23, 2002Date of Patent: September 14, 2004Assignee: Japan Science and Technology AgencyInventors: Hiroshi Yoshida, Kiyoshi Betsuyaku, Tomoji Kawai, Hidekazu Tanaka
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Patent number: H2193Abstract: A method of growing a SiC film within an MBE system is disclosed. The method includes charging a first crucible with a quality of C60, and coating a second crucible with a layer of SiC. The second crucible is charged with a quantity of solid Si. The crucibles are installed into first and second effusion cells which are placed within the MBE growth chamber. A substrate is prepared by cleaning and polishing and loaded into the MBE growth chamber. The substrate and effusion cells are heated and a layer of SiC is grown by MBE onto the substrate.Type: GrantFiled: January 14, 2002Date of Patent: July 3, 2007Assignee: The United States of America as represented by the Secretary of the Air ForceInventors: William V. Lampert, Christopher J. Eiting, Scott A. Smith, Trice W. Haas