Plasma Cleaning Patents (Class 134/1.1)
-
Patent number: 11107705Abstract: A cleaning solution production system is for cleaning a semiconductor substrate. The system includes a pressure tank, a plasma reaction tank configured to form a plasma in gas bubbles suspended in a decompressed liquid obtained from the pressure tank to thereby generate radical species in the decompressed liquid, a storage tank configured to store a cleaning solution containing the radical species generated in the plasma reaction tank, and a nozzle configured to supply the cleaning solution from the storage tank to a semiconductor substrate.Type: GrantFiled: July 8, 2019Date of Patent: August 31, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Beom Jin Yoo, Min Hyoung Kim, Sang Ki Nam, Won Hyuk Jang, Kyu Hee Han, Young Do Kim, Jeong Min Bang
-
Patent number: 11091830Abstract: To provide a moth-eye transfer mold and a method of manufacturing a moth-eye transfer mold that provide a simple and inexpensive manufacturing process. A moth-eye transfer mold 1 is characterized by including a base 10, an underlayer 20 formed on the base 10, and a glassy carbon layer 30 formed on the underlayer 20, the glassy carbon layer 30 has an inverted moth-eye structure RM over a surface 30a, and the inverted moth-eye structure RM is randomly arranged cone-shaped pores.Type: GrantFiled: June 12, 2019Date of Patent: August 17, 2021Assignees: Tokyo University of Science Foundation, GEOMATEC CO., LTD.Inventors: Jun Taniguchi, Hiroyuki Sugawara
-
Patent number: 11086215Abstract: A reticle and a method for manufacturing a reticle are provided. The method includes forming a reflective multilayer (ML) over a front-side surface of a mask substrate. The method further includes forming a capping layer over the reflective ML. The method further includes forming a sacrificial multilayer over the capping layer. The method further includes forming an opening in the sacrificial multilayer to expose the capping layer. The method further includes forming a first absorption layer over the sacrificial multilayer and covering the capping layer in the opening. The method further includes removing the first absorption layer outside the opening in the sacrificial multilayer to form a first absorption pattern on a portion of the capping layer.Type: GrantFiled: June 27, 2018Date of Patent: August 10, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yun-Yue Lin, Hsin-Chang Lee
-
Patent number: 11062897Abstract: Methods and apparatuses for etching metal-doped carbon-containing materials are provided herein. Etching methods include using a mixture of an etching gas suitable for etching the carbon component of the metal-doped carbon-containing material and an additive gas suitable for etching the metal component of the metal-doped carbon-containing material and igniting a plasma to selectively remove metal-doped carbon-containing materials relative to underlayers such as silicon oxide, silicon nitride, and silicon, at high temperatures. Apparatuses suitable for etching metal-doped carbon-containing materials are equipped with a high temperature movable pedestal, a plasma source, and a showerhead between a plasma generating region and the substrate.Type: GrantFiled: June 30, 2017Date of Patent: July 13, 2021Assignee: Lam Research CorporationInventors: Yongsik Yu, David Wingto Cheung, Kirk J. Ostrowski, Nikkon Ghosh, Karthik S. Colinjivadi, Samantha Tan, Nathan Musselwhite, Mark Naoshi Kawaguchi
-
Patent number: 11062912Abstract: A process for etching a film layer on a semiconductor wafer is disclosed. The process is particularly well suited to etching carbon containing layers, such as hardmask layers, photoresist layers, and other low dielectric films. In accordance with the present disclosure, a reactive species generated from a plasma is contacted with a surface of the film layer. Simultaneously, the substrate or semiconductor wafer is subjected to rapid thermal heating cycles that increase the temperature past the activation temperature of the reaction in a controlled manner.Type: GrantFiled: February 28, 2020Date of Patent: July 13, 2021Assignees: Mattson Technology, Inc., Beijing E-Town Semiconductor Technology Co., Ltd.Inventor: Shawming Ma
-
Patent number: 11043393Abstract: Apparatus, systems, and methods for processing a workpiece are provided. In one example implementation, the workpiece can include a silicon nitride layer and a silicon layer. The method can include admitting an ozone gas into a processing chamber. The method can include exposing the workpiece to the ozone gas. The method can include generating one or more species from a process gas using a plasma induced in a plasma chamber. The method can include filtering the one or more species to create a filtered mixture. The method can further include exposing the workpiece to the filtered mixture in the processing chamber such that the filtered mixture at least partially etches the silicon nitride layer more than the silicon layer. Due to ozone gas reacting with surface of silicon layer prior to etching process with fluorine-containing gas, selective silicon nitride etch over silicon can be largely promoted.Type: GrantFiled: January 16, 2020Date of Patent: June 22, 2021Assignees: Mattson Technology, Inc., Beijing E-Town Semiconductor Technology Co., Ltd.Inventors: Shanyu Wang, Ting Xie, Chun Yan, Xinliang Lu, Hua Chung, Michael X. Yang
-
Patent number: 11020778Abstract: A photoresist removal method is provided. The photoresist removal method includes analyzing the process status of each of a number of semiconductor substrate models undergoing a tested plasma ash process by a residue gas analyzer. The tested plasma ash processes for the semiconductor substrate models utilize a plurality of tested recipes. The photoresist removal method further includes selecting one of the tested recipes as a process recipe based on the analysis results from the residue gas analyzer and at least one expected performance criterion. In addition, the photoresist removal method includes performing a plasma ash process on a semiconductor substrate according to the process recipe to remove a photoresist layer from the semiconductor substrate.Type: GrantFiled: July 4, 2019Date of Patent: June 1, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chun-Jen Hsiao, Ya-Ping Chen, Chien-Hung Lin, Wen-Pin Liu, Chin-Wen Chen
-
Patent number: 11008646Abstract: A vapor deposition apparatus disclosed by an embodiment comprises: a vacuum chamber (8); a mask holder (15) for holding a deposition mask 1; a substrate holder (29) for holding a substrate for vapor deposition (2); an electromagnet (3) disposed above a surface; a vapor deposition source 5 for vaporizing or sublimating a vapor deposition material; and a heat pipe (7) including at least a heat absorption part (71) and a heat dissipation part (72), the heat absorption part being in contact with the electromagnet (3), and the heat dissipation part being derived to an outside of the vacuum chamber (8). The heat pipe (7) and the electromagnet (3) are in intimate contact with each other at an area of a contact part between the heat pipe (7) and the electromagnet (3), the area being equal to or more than a cross-sectional area within an inner perimeter of a coil (32).Type: GrantFiled: April 21, 2020Date of Patent: May 18, 2021Assignee: Sakai Display Products CorporationInventors: Susumu Sakio, Katsuhiko Kishimoto
-
Patent number: 11000045Abstract: A method of treating a product or surface with a reactive gas, comprises producing the reactive gas by forming a high-voltage cold plasma (HVCP) from a working gas; transporting the reactive gas at least 5 cm away from the HVCP; followed by contacting the product or surface with the reactive gas. The HVCP does not contact the product or surface.Type: GrantFiled: December 10, 2018Date of Patent: May 11, 2021Assignee: NanoGuard Technologies, LLCInventors: Kevin M. Keener, Mark A. Hochwalt
-
Patent number: 10991551Abstract: A cleaning method is provided. In the cleaning method, a cleaning gas is supplied into a processing chamber, a radio frequency (RF) power for plasma generation is applied to one of a first electrode on which a substrate is to be mounted and a second electrode disposed to be opposite to the first electrode in the processing chamber, and a negative voltage is applied to an edge ring disposed to surround the substrate. Further, plasma is generated from the cleaning gas and a cleaning process using the plasma is performed.Type: GrantFiled: April 9, 2020Date of Patent: April 27, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Mohd Fairuz Bin Budiman, Shinya Morikita, Toshifumi Nagaiwa
-
Patent number: 10971339Abstract: An ion source includes a plasma chamber, and a suppression electrode disposed downstream of the plasma chamber, and is operable to irradiate the suppression electrode with an ion beam produced from a cleaning gas to clean the suppression electrode. Prior to cleaning, the ion source moves the suppression electrode or the plasma chamber in a first direction to increase a distance between the plasma chamber and the suppression electrode.Type: GrantFiled: February 11, 2020Date of Patent: April 6, 2021Assignee: NISSIN ION EQUIPMENT CO., LTD.Inventors: Masakazu Adachi, Yuya Hirai, Tomoya Taniguchi
-
Patent number: 10964746Abstract: Some embodiments of the present disclosure relate to a method in which a functional layer is formed over an upper semiconductor surface of a semiconductor substrate, and a capping layer is formed over the functional layer. A first etchant is used to form a recess through the capping layer and through the functional layer. The recess has a first depth and exposes a portion of the semiconductor substrate there through. A protective layer is formed along a lower surface and inner sidewalls of the recess. A second etchant is used to remove the protective layer from the lower surface of the recess and to extend the recess below the upper semiconductor surface to a second depth to form a deep trench. To prevent etching of the functional layer, the protective layer remains in place along the inner sidewalls of the recess while the second etchant is used.Type: GrantFiled: May 7, 2019Date of Patent: March 30, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Hsien Chou, Shih Pei Chou, Chih-Yu Lai, Sheng-Chau Chen, Chih-Ta Chen, Yeur-Luen Tu, Chia-Shiung Tsai
-
Patent number: 10952309Abstract: The present disclosure is drawn to plasma treatment heads. In one example, a plasma head can include a dielectric barrier formed of a dielectric material. The dielectric barrier can have a treatment surface and an interior surface opposite of the treatment surface. A first electrode can be embedded within the dielectric barrier beneath the treatment surface. A second electrode can also be embedded within the dielectric barrier beneath the treatment surface and spaced laterally apart from the first electrode. A plurality of injection holes can penetrate through the dielectric plate from the interior surface to the treatment surface. The plurality of injection holes can be located between the first electrode and second electrode.Type: GrantFiled: July 19, 2016Date of Patent: March 16, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventor: James P. Shields
-
Patent number: 10950449Abstract: Examples of a substrate processing apparatus includes a chamber, a susceptor provided in the chamber, a flow control ring of an insulator that is mounted on the chamber and surrounds the susceptor, a shower plate opposed to the susceptor, and a metal film that is formed on a lower surface of the flow control ring while exposing an upper surface of the flow control ring, and is in contact with the chamber.Type: GrantFiled: January 12, 2018Date of Patent: March 16, 2021Assignee: ASM IP Holding B.V.Inventors: Wataru Adachi, Kazuo Sato
-
Patent number: 10950416Abstract: Processes for surface treatment of a workpiece are provided. In one example implementation, a method can include conducting a pre-treatment process on a processing chamber to generate a hydrogen radical affecting layer on a surface of the processing chamber prior to performing a hydrogen radical based surface treatment process on a workpiece in the processing chamber. In this manner, a pretreatment process can be conducted to condition a processing chamber to increase uniformity of hydrogen radical exposure to a workpiece.Type: GrantFiled: October 21, 2019Date of Patent: March 16, 2021Assignees: Mattson Technology, Inc., Beijing E-Town Semiconductor Technology Co., Ltd.Inventors: Qi Zhang, Xinliang Lu, Hua Chung
-
Patent number: 10892144Abstract: A plasma processing apparatus includes a storage unit, an acquisition unit and a monitoring unit. The storage unit stores change information indicating a change in a value for a temperature of a mounting table when a processing condition of plasma processing for a target object mounted on the mounting table is changed. The acquisition unit acquires the value for the temperature of the mounting table in a predetermined cycle. The monitoring unit monitors, based on the change information, a change in the processing condition of the plasma processing from the change in the value for the temperature of the mounting table acquired by the acquisition unit.Type: GrantFiled: October 3, 2019Date of Patent: January 12, 2021Assignee: TOKYO ELECTRON LIMITEDInventor: Shinsuke Oka
-
Patent number: 10883175Abstract: The disclosure relates to a vertical furnace for processing a plurality of substrates and a liner for use therein. The vertical furnace having an outer reaction tube having a central axis; and a liner constructed to extend in the interior of the outer reaction tube. The liner defines an interior space for accommodating substrates and is provided with a gas exhaust hole extending from the interior space to the outside. One of the outer wall of the liner and the inner wall of the reaction tube is provided with a flow deflector that protrudes radially from the respective wall into a gas passage between an outer wall of the liner and an inner wall of the reaction tube.Type: GrantFiled: August 9, 2018Date of Patent: January 5, 2021Assignee: ASM IP Holding B.V.Inventor: Frans Wiegers
-
Patent number: 10879079Abstract: The invention is directed to a method for treating an electronic device that is encapsulated in a plastic package, said method comprising the steps of providing a gas stream comprising a hydrogen source; inducing a hydrogen-containing plasma stream from said gas; and directing the hydrogen-containing plasma stream to the plastic package to etch the plastic package.Type: GrantFiled: July 20, 2017Date of Patent: December 29, 2020Assignee: JIACO Instruments Holding B.V.Inventors: Jiaqi Tang, Cornelis Ignatius Maria Beenakker, Willibrordus Gerardus Maria Van Den Hoek
-
Patent number: 10868022Abstract: Flash memory devices and fabrication methods thereof are provided. An exemplary method includes providing discrete bit lines on a semiconductor substrate, a first dielectric layer on top surfaces of the bit lines, and a floating gate structure on the first dielectric layer, trenches being formed between adjacent bit lines and on the semiconductor substrate; forming a sacrificial layer with a top surface above the top surfaces of the bit lines in the trenches; forming a second dielectric layer on top and side surfaces of the floating gate structure and the top surface of the sacrificial layer; forming a control gate structure on the second dielectric layer; removing portions of the second dielectric layer, the floating gate structure and the first dielectric layer to expose a portion of the sacrificial layer; and removing the sacrificial layer from the adjacent bit lines and the semiconductor substrate, thereby forming air gaps.Type: GrantFiled: January 5, 2018Date of Patent: December 15, 2020Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) CorporationInventors: Sheng Fen Chiu, Liang Chen, Chao Feng Zhou, Xiao Bo Li
-
Patent number: 10847417Abstract: A method includes forming a first conductive feature and a second conductive feature adjacent the first conductive feature in a first dielectric layer, where the first dielectric layer includes a first dielectric material, and forming a dielectric feature in the first dielectric layer, where the dielectric feature contacts sidewalls of the first and the second conductive features and where the dielectric feature includes a second dielectric material different from the first dielectric material. The method further includes forming a second dielectric layer over the first dielectric layer, where the second dielectric layer includes a third dielectric material different from the second dielectric material, and forming a third conductive feature in the second dielectric layer, where the third conductive feature contacts a sidewall of the dielectric feature and either a top surface of the first conductive feature or a top surface of the second conductive feature.Type: GrantFiled: August 21, 2019Date of Patent: November 24, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsin-Chieh Yao, Chung-Ju Lee
-
Patent number: 10804073Abstract: An apparatus and method for a large-scale high-throughput quantitative characterization and three-dimensional reconstruction of a material structure. The apparatus having a glow discharge sputtering unit, a sample transfer device, a scanning electron microscope unit and a GPU computer workstation. The glow discharge sputtering unit can achieve large size (cm order), nearly flat and fast sample preparation, and controllable achieve layer-by-layer ablation preparation along the depth direction of the sample surface; rapid scanning electron microscopy (SEM) can achieve large-scale and high-throughput acquisition of sample characteristic maps. The sample transfer device is responsible for transferring the sample between the glow discharge sputtering source and the scanning electron microscope in an accurately positioning manner.Type: GrantFiled: October 30, 2019Date of Patent: October 13, 2020Assignee: THE NCS TESTING TECHNOLOGY CO., LTD.Inventors: Haizhou Wang, Xing Yu, Xuejing Shen, Yunhai Jia, Xiaojia Li, Yuhua Lu, Weihao Wan, Jianqiu Luo, Dongling Li, Lei Zhao
-
Patent number: 10744771Abstract: To manufacture a liquid ejection head, a film having a lower surface free energy than a surface free energy of a substrate is first formed on an inner face of a liquid supply port. Next, a dry film to be a flow path forming member is attached to cover the surface of the substrate, and then a member to be an ejection orifice forming member is provided on the surface of the dry film.Type: GrantFiled: August 30, 2018Date of Patent: August 18, 2020Assignee: CANON KABUSHIKI KAISHAInventors: Keiji Matsumoto, Seiichiro Yaginuma, Koji Sasaki, Jun Yamamuro, Kunihito Uohashi, Ryotaro Murakami, Tomohiko Nakano, Shingo Nagata
-
Patent number: 10714320Abstract: A time period for cleaning performed to remove a deposit formed within a chamber main body can be reduced. A plasma processing method including the cleaning of an inside of the chamber main body of a plasma processing apparatus is provided. The method includes etching including a main etching of etching an etching target film of a processing target object placed on a stage in a low temperature by generating plasma of a processing gas containing a fluorocarbon gas and/or a hydrofluorocarbon gas; carrying-out the processing target object from a chamber; and cleaning the inside of the chamber main body by generating plasma of a cleaning gas in a state that a temperature of an electrostatic chuck is set to be high.Type: GrantFiled: January 22, 2018Date of Patent: July 14, 2020Assignee: TOKYO ELECTRON LIMITEDInventors: Jin Kudo, Taku Gohira
-
Patent number: 10697063Abstract: The present disclosure relates to a corner spoiler designed to decrease high deposition rates on corner regions of substrates by changing the gas flow. In one embodiment, a corner spoiler for a processing chamber includes an L-shaped body fabricated from a dielectric material, wherein the L-shaped body is configured to change plasma distribution at a corner of a substrate in the processing chamber. The L-shaped body includes a first and second leg, wherein the first and second legs meet at an inside corner of the L-shaped body. The length of the first or second leg is twice the distance defined between the first or second leg and the inside corner. In another embodiment, a shadow frame for a depositing chamber includes a rectangular shaped body having a rectangular opening therethrough, and one or more corner spoilers coupled to the rectangular shaped body at corners of the rectangular shaped body.Type: GrantFiled: January 30, 2015Date of Patent: June 30, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Lai Zhao, Gaku Furuta, Qunhua Wang, Robin L. Tiner, Beom Soo Park, Soo Young Choi, Sanjay D. Yadav
-
Patent number: 10688538Abstract: Implementations described herein generally relate to methods and apparatus for in-situ removal of unwanted deposition buildup from one or more interior surfaces of a semiconductor substrate-processing chamber. In one implementation, the method comprises forming a reactive fluorine species from a fluorine-containing cleaning gas mixture. The method further comprises delivering the reactive fluorine species into a processing volume of a substrate-processing chamber. The processing volume includes one or more aluminum-containing interior surfaces having unwanted deposits formed thereon. The method further comprises permitting the reactive fluorine species to react with the unwanted deposits and aluminum-containing interior surfaces of the substrate-processing chamber to form aluminum fluoride. The method further comprises exposing nitrogen-containing cleaning gas mixture to in-situ plasma to form reactive nitrogen species in the processing volume.Type: GrantFiled: July 19, 2017Date of Patent: June 23, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Vivek Bharat Shah, Anup Kumar Singh, Bhaskar Kumar, Ganesh Balasubramanian, Bok Hoen Kim
-
Patent number: 10672592Abstract: The present invention provides a Soft Plasma Cleaning (SPC) system (30, 130, 230) including a Guided Soft-Plasma Cleaning (G-SPC) (30). The SPC system is a non-thermal, low temperature process and operable at atmosphere pressure, in both air and liquid medium. In an embodiment, a feedstock gas (40) is supplied to provide a discharging fluid (50) in the cleaning chamber (34). A plasma guiding and amplifying component (52) guides and expands the discharging fluid to cover a large ablation area over the workpiece (32), thereby also suppressing ion and electron bombardment damage or etching. The plasma guiding and amplifying component (52) may be formed with dielectric plates or tubes (37, 56, 58), with each dielectric having an aperture (37a, 56a, 58a). The electric field and ion energy in the cleaning chamber can be additionally controlled via a floating electrode (160, 160a), so as to suppress plasma damage during SPC.Type: GrantFiled: January 22, 2016Date of Patent: June 2, 2020Inventor: Chia Sern Chan
-
Patent number: 10643854Abstract: Multilayered stacks having layers of silicon interleaved with layers of a dielectric, such as silicon dioxide, are plasma etched with non-corrosive process gas chemistries. Etching plasmas of fluorine source gases, such as SF6 and/or NF3 typically only suitable for dielectric layers, are energized by pulsed RF to achieve high aspect ratio etching of silicon/silicon dioxide bi-layers stacks without the addition of corrosive gases, such as HBr or Cl2. In embodiments, a mask open etch and the multi-layered stack etch are performed in a same plasma processing chamber enabling a single chamber, single recipe solution for patterning such multi-layered stacks. In embodiments, 3D NAND memory cells are fabricated with memory plug and/or word line separation etches employing a fluorine-based, pulsed-RF plasma etch.Type: GrantFiled: December 4, 2015Date of Patent: May 5, 2020Assignee: Applied Materials, Inc.Inventors: Daisuke Shimizu, Jong Mun Kim
-
Patent number: 10580616Abstract: An ion implantation system has an ion source configured form an ion beam and an angular energy filter (AEF) having an AEF region. A gas source passivates and/or etches a film residing on the AEF by a reaction of the film with a gas. The gas can be an oxidizing gas or a fluorine-containing gas. The gas source can selectively supply the gas to the AEF region concurrent with a formation of the ion beam. The AEF is heated to assist in the passivation and/or etching of the film by the gas. The heat can originate from the ion beam, and/or from an auxiliary heater associated with the AEF. A manifold distributor can be operably coupled to the gas source and configured to supply the gas to one or more AEF electrodes.Type: GrantFiled: October 5, 2018Date of Patent: March 3, 2020Assignee: Axcelis Technologies, Inc.Inventors: Teng-Chao David Tao, David Allen Kirkwood
-
Patent number: 10577688Abstract: A method for processing a substrate in a substrate processing system includes flowing reactant gases into a process chamber including a substrate and supplying a first power level sufficient to promote rearrangement of molecules adsorbed from the reactant gases onto a surface of the substrate. The first power level is supplied in a first predetermined period where the reactant gases are flowing into the process chamber and a second power level is not supplied to the process chamber. The method further includes waiting a second predetermined period subsequent to flowing the reactant gases and supplying the first power level and prior to supplying the second power level to the process chamber and, after the second predetermined period, performing plasma-enhanced, pulsed chemical vapor deposition of film on the substrate by supplying one or more precursors while supplying the second power level to the process chamber for a third predetermined period.Type: GrantFiled: August 3, 2017Date of Patent: March 3, 2020Assignee: LAM RESEARCH CORPORATIONInventors: Adrien LaVoie, Hu Kang, Karl Leeser
-
Patent number: 10544483Abstract: A method includes providing nanoparticles having a tin coating surrounding a metal nucleus, such as copper. The nucleus forms first and acts as a seed growing into nanoparticles with a tin coating and a nucleus. The nanoparticles are at least partially vaporized, thereby producing vaporized tin ions. An emission of extreme ultraviolet (EUV) radiation is generated from the vaporized tin ions.Type: GrantFiled: July 1, 2016Date of Patent: January 28, 2020Assignee: Lockheed Martin CorporationInventors: Randall M. Stoltenberg, Alfred A. Zinn
-
Patent number: 10541171Abstract: A protective cover for an electrostatic chuck may include a conductive wafer and a plasma resistant ceramic layer on at least one surface of the conductive wafer. The plasma resistant ceramic layer covers a top surface of the conductive wafer, side walls of the conductive wafer and an outer perimeter of a bottom surface of the conductive wafer. Alternatively, a protective cover for an electrostatic chuck may include a plasma resistant bulk sintered ceramic wafer and a conductive layer on a portion of a bottom surface of the plasma resistant bulk sintered ceramic wafer, wherein a perimeter of the bottom surface is not covered. The protective layer may be used to protect an electrostatic chuck during a plasma cleaning process.Type: GrantFiled: December 13, 2017Date of Patent: January 21, 2020Assignee: APPLIED MATERIALS, INC.Inventor: Vijay D. Parkhe
-
Patent number: 10490390Abstract: A substrate processing device includes a housing connected to ground, a cathode stage that supports a substrate, an anode unit, and a gas feeding unit that feeds gas toward the first plate. The cathode stage is applied with voltage for generating plasma. The anode unit includes a first plate including first through holes and a second plate including second through holes that are larger than the first through holes. The second plate is located between the first plate and the cathode stage. The first plate produces a flow of the gas through the first through holes. The gas that has passed through the first through holes flows through the second through holes into an area between the second plate and the cathode stage. A distance between the first plate and the second plate is 10 mm or greater and 50 mm or less.Type: GrantFiled: June 8, 2016Date of Patent: November 26, 2019Assignee: ULVAC, INC.Inventors: Tetsushi Fujinaga, Atsuhito Ihori, Masahiro Matsumoto, Noriaki Tani, Harunori Iwai, Kenji Iwata, Yoshinao Sato
-
Patent number: 10474033Abstract: Embodiments described herein relate to methods and apparatus for performing immersion field guided post exposure bake processes. Embodiments of apparatus described herein include a chamber body defining a processing volume. A pedestal may be disposed within the processing volume and a first electrode may be coupled to the pedestal. A moveable stem may extend through the chamber body opposite the pedestal and a second electrode may be coupled to the moveable stem. In certain embodiments, a fluid containment ring may be coupled to the pedestal and a dielectric containment ring may be coupled to the second electrode.Type: GrantFiled: August 31, 2017Date of Patent: November 12, 2019Assignee: Applied Materials, Inc.Inventors: Viachslav Babayan, Douglas A. Buchberger, Jr., Qiwei Liang, Ludovic Godet, Srinivas D. Nemani, Daniel J. Woodruff, Randy Harris, Robert B. Moore
-
Patent number: 10446713Abstract: To remove the mask formed by nanoimprinting after dry etching. A mask is formed by nanoimprinting on a back surface of a substrate. Subsequently, dry etching is performed using chlorine gas. Dry etching is finished with the mask kept remaining. A deteriorated layer is formed on the surface of the remaining mask. The mask is irradiated with plasma generated using a mixture gas of nitrogen and oxygen. Thereby, the deteriorated layer formed on the surface of the mask is removed by evaporation. The mask is removed by dissolving in BHF (buffered hydrofluoric acid).Type: GrantFiled: September 24, 2018Date of Patent: October 15, 2019Assignee: TOYODA GOSEI CO., LTD.Inventor: Kimiyasu Ide
-
Patent number: 10446373Abstract: In an embodiment of the invention there is a cyclotronic actuator utilizing a high-voltage plasma driver connected to a first electrode. A second electrode is grounded and the two are isolated from each other by a dielectric plate. A magnet is positioned beneath the dielectric plate such that a coaxial dielectric barrier discharge plasma is formed outwardly between the first electrode across the dielectric plate. The magnet positioned beneath the dielectric plate introduces a magnetic field transverse to the plasma current path, such that the plasma discharge discharges radially and the local magnetic field is oriented vertically in a direction perpendicular to the dielectric plate to create a Lorentz Force, which forces the plasma discharge to move radially outwardly in a curved radial streamer mode pattern.Type: GrantFiled: April 18, 2019Date of Patent: October 15, 2019Assignee: CU Aerospace, LLCInventors: Joseph W. Zimmerman, David L. Carroll, Phillip J. Ansell, Georgi Hristov
-
Patent number: 10410845Abstract: Embodiments include a plasma processing method for cleaning polymer byproducts from interior surfaces of the plasma chamber. In an embodiment the plasma process may include processing a workpiece in a plasma processing chamber. Thereafter, the method may include removing the workpiece from the processing chamber. After the workpiece is removed, embodiments may include cleaning the plasma processing chamber with a cleaning process that includes a high pressure cleaning process, a first low pressure cleaning process, and a second low pressure cleaning process, wherein the second low pressure cleaning process includes applying a pulsed bias.Type: GrantFiled: November 22, 2017Date of Patent: September 10, 2019Assignee: Applied Materials, Inc.Inventors: Kenny Linh Doan, Usama Dadu, Wonseok Lee, Daisuke Shimizu, Li Ling, Kevin Choi
-
Patent number: 10395915Abstract: Provided is a substrate treatment apparatus. The apparatus includes a chuck supporting a substrate and being rotatable, a container surrounding the chuck and collecting chemicals scattered due to rotations of the substrate, and a first spray nozzle spraying the chemicals to the substrate.Type: GrantFiled: February 26, 2014Date of Patent: August 27, 2019Assignee: Semes Co., Ltd.Inventors: Se Won Lee, Yong Hee Lee, Jae Yong Kim
-
Patent number: 10351954Abstract: A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material, wherein one or more of the gas flows provides a pressure that at least contributes to the separation of the surface of the substrate from the face of the delivery head. A system capable of carrying out such a process is also disclosed.Type: GrantFiled: October 12, 2016Date of Patent: July 16, 2019Assignee: EASTMAN KODAK COMPANYInventor: David H. Levy
-
Patent number: 10340125Abstract: A system and method for providing pulsed excited species from a remote plasma unit to a reaction chamber are disclosed. The system includes a pressure control device to control a pressure at the remote plasma unit as reactive species from the remote plasma unit are pulsed to the reaction chamber.Type: GrantFiled: September 22, 2016Date of Patent: July 2, 2019Assignee: ASM IP Holding B.V.Inventor: Jereld Lee Winkler
-
Patent number: 10332724Abstract: In an embodiment of the invention there is a cyclotronic actuator. The actuator is defined by having a high-voltage plasma driver connected to a first electrode. The first electrode is surrounded by a dielectric material. A second electrode is grounded and placed away from the first electrode, such that a plasma arc is formed between the pair of electrodes when the high-voltage plasma driver is activated. A ring magnet surrounding the second electrode is configured to introduce a magnetic field locally to the plasma arc. The plasma arc will then discharge in a radial direction. The magnet creates a local magnetic field oriented vertically in a direction parallel to the axisymmetric orientation of the first and second electrodes to create a Lorentz Force. The force causes the plasma arc to move in a tangential direction and causes the plasma arc to discharge out in a circular pattern.Type: GrantFiled: March 16, 2018Date of Patent: June 25, 2019Assignee: CU Aerospace, LLCInventors: Joseph W. Zimmerman, David L. Carroll, Phillip J. Ansell, Georgi Hristov
-
Patent number: 10332850Abstract: Provided herein is a method for producing hollow contact areas for insertion bonding, formed on a semiconductor substrate comprising a stack of one or more metallization layers on a surface of the substrate. Openings are etched in a dielectric layer by plasma etching, using a resist layer as a mask. The resist layer and plasma etch parameters are chosen to obtain openings with sloped sidewalls having a pre-defined slope, due to controlled formation of a polymer layer forming on the sidewalls of the resist hole and the hollow contact opening formed during etching. According to a preferred embodiment, metal deposited in the hollow contact areas and on top of the dielectric layer is planarized using chemical mechanical polishing, leading to mutually isolated contact areas. The disclosure is also related to components obtainable by the method and to a semiconductor package comprising such components.Type: GrantFiled: June 24, 2014Date of Patent: June 25, 2019Assignee: IMECInventors: Eric Beyne, Wenqi Zhang, Geraldine Jamieson, Bart Swinnen
-
Patent number: 10325956Abstract: Some embodiments of the present disclosure relate to a method in which a functional layer is formed over an upper semiconductor surface of a semiconductor substrate, and a capping layer is formed over the functional layer. A first etchant is used to form a recess through the capping layer and through the functional layer. The recess has a first depth and exposes a portion of the semiconductor substrate there through. A protective layer is formed along a lower surface and inner sidewalls of the recess. A second etchant is used to remove the protective layer from the lower surface of the recess and to extend the recess below the upper semiconductor surface to a second depth to form a deep trench. To prevent etching of the functional layer, the protective layer remains in place along the inner sidewalls of the recess while the second etchant is used.Type: GrantFiled: May 10, 2017Date of Patent: June 18, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Hsien Chou, Shih Pei Chou, Chih-Yu Lai, Sheng-Chau Chen, Chih-Ta Chen, Yeur-Luen Tu, Chia-Shiung Tsai
-
Patent number: 10290510Abstract: A plasma etching method is performed by forming a desired pattern of a mask into a film including a zirconium oxide film by plasma etching with plasma generated from a first gas. The first gas consists of at least one chloride-containing gas of the group of boron trichloride, tetrachloromethane, chloride and silicon tetrachloride, at least one hydrogen-containing gas of the group of hydrogen bromide, hydrogen and methane, and a noble gas. An underlying film of a silicon oxide film or an amorphous carbon film is provided underneath the zirconium oxide film, and an etching selectivity of the zirconium oxide film to the underlying film is greater than or equal to one.Type: GrantFiled: April 5, 2016Date of Patent: May 14, 2019Assignee: Tokyo Electron LimitedInventor: Shunichi Mikami
-
Patent number: 10290504Abstract: Embodiments described herein generally relate to a method and apparatus for plasma treating a process chamber. A substrate having a gate stack formed thereon may be placed in a process chamber, and hydrogen containing plasma may be used to treat the gate stack in order to cure the defects in the gate stack. As the result of hydrogen containing plasma treatment, the gate stack has lower leakage and improved reliability. To protect the process chamber from Hx+ ions and H* radicals generated by the hydrogen containing plasma, the process chamber may be treated with a plasma without the substrate placed therein and prior to the hydrogen containing plasma treatment. In addition, components of the process chamber that are made of a dielectric material may be coated with a ceramic coating including an yttrium containing oxide in order to protect the components from the plasma.Type: GrantFiled: November 27, 2017Date of Patent: May 14, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Wei Liu, Theresa Kramer Guarini, Huy Q. Nguyen, Malcolm Bevan, Houda Graoui, Philip A. Bottini, Bernard L. Hwang, Lara Hawrylchak, Rene George
-
Patent number: 10280512Abstract: In one embodiment, an apparatus to selectively deposit a carbon layer on substrate, comprising a plasma chamber to receive a flow of carbon-containing gas; a power source to generate a plasma containing the carbon-containing gas in the plasma chamber; an extraction plate to extract an ion beam from the plasma and direct the ion beam to the substrate, the ion beam comprising ions having trajectories forming a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, the extraction plate further configured to conduct a neutral species derived from the carbon-containing gas to the substrate; and a substrate stage facing the extraction plate and including a heater to heat the substrate to a first temperature, when the ion beam and carbon-containing species impinge on the substrate.Type: GrantFiled: July 27, 2015Date of Patent: May 7, 2019Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Alex Tsung-Liang Chen, Simon Ruffell
-
Patent number: 10276364Abstract: Implementations described herein generally relate to methods and apparatus for processing a substrate. More particularly, implementations described herein relate to methods and an apparatus for bevel etch processing. In one embodiment, a method of cleaning a bevel edge of a semiconductor substrate is provided. The method includes placing a substrate on a cover plate inside of a processing chamber, the substrate having a deposition layer, which includes a center, and a bevel edge. A mask is placed over the substrate. The edge ring is disposed around/under the substrate. The method also includes flowing a process gas mixture adjacent the bevel edge, and flowing a purge gas through a first hole, a second hole, and a third hole of the mask in the center of the substrate adjacent a top of the substrate.Type: GrantFiled: July 19, 2017Date of Patent: April 30, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Zonghui Su, Vinay Prabhakar, Abdul Aziz Khaja, Jeongmin Lee
-
Patent number: 10276398Abstract: Methods and apparatus for laterally etching unwanted material from the sidewalls of a recessed feature are described herein. In various embodiments, the method involves etching a portion of the sidewalls, depositing a protective film over a portion of the sidewalls, and cycling the etching and deposition operations until the unwanted material is removed from the entire depth of the recessed feature. Each etching and deposition operation may target a particular depth along the sidewalls of the feature. In some cases, the unwanted material is removed from the bottom of the feature up, and in other cases the unwanted material is removed from the top of the feature down. Some combination of these may also be used.Type: GrantFiled: August 2, 2017Date of Patent: April 30, 2019Assignee: Lam Research CorporationInventors: Kwame Eason, Pilyeon Park, Mark Naoshi Kawaguchi, Seung-Ho Park, Hsiao-Wei Chang
-
Patent number: 10265742Abstract: Embodiments of the disclosure generally relate to methods of removing etch by-products from the plasma processing chamber using carbon monoxide or carbon dioxide. In one embodiment, a method for dry cleaning a processing chamber includes exposing a chamber component disposed within the processing chamber in absence of a substrate disposed therein to a first cleaning gas mixture comprising carbon monoxide or carbon dioxide, wherein a portion of the chamber component has a film layer or residues deposited thereon, and the film layer or residues comprises a refractory metal and/or a metal silicide.Type: GrantFiled: October 24, 2014Date of Patent: April 23, 2019Assignee: Applied Materials, Inc.Inventors: Kee Young Cho, Sang Wook Kim, Joo Won Han, Han Soo Cho
-
Patent number: 10236442Abstract: Provided herein are methods of fabricating a magnetic memory device including forming magnetic tunnel junction patterns on a substrate, forming an interlayered insulating layer on the substrate to cover the magnetic tunnel junction patterns, forming a conductive layer on the interlayered insulating layer, patterning the conductive layer to form interconnection patterns electrically connected to the magnetic tunnel junction patterns, and performing a cleaning process on the interconnection patterns. The cleaning process is performed using a gas mixture of a first gas and a second gas. The first gas contains a hydrogen element (H), and the second gas contains a source gas different from that of the first gas.Type: GrantFiled: August 3, 2016Date of Patent: March 19, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jaehun Seo, Jong-Kyu Kim, Jung-Ik Oh, Inho Kim, Jongchul Park, Gwang-Hyun Baek, Hyun-woo Yang
-
Patent number: 10236175Abstract: Disclosed is a liquid chemical for forming a water-repellent protecting film on a wafer. The liquid chemical is a liquid chemical containing a water-repellent-protecting-film-forming agent for forming the water-repellent protecting film, at the time of cleaning the wafer which has a finely uneven pattern at its surface and contains at least at a part of a surface of a recessed portion of the uneven pattern at least one kind of matter selected from the group consisting of titanium, titanium nitride, tungsten, aluminum, copper, tin, tantalum nitride, ruthenium and silicon, at least on the surface of the recessed portion. The liquid chemical is characterized in that the water-repellent-protecting-film-forming agent is a water-insoluble surfactant. The water-repellent protecting film formed with the liquid chemical is capable of preventing a pattern collapse of the wafer, in a cleaning step.Type: GrantFiled: September 14, 2016Date of Patent: March 19, 2019Assignee: Central Glass Company, LimitedInventors: Masanori Saito, Shinobu Arata, Takashi Saio, Soichi Kumon, Hidehisa Nanai, Yoshinori Akamatsu