Led, Multicolor Patents (Class 148/DIG99)
  • Patent number: 5712188
    Abstract: A fabrication method of a surface-emitting laser diode which permits easy control of polarization in a desired direction is disclosed. The laser emits light from an emitting surface having a sidewall inclined with respect to a normal to the emitting surface. An ion beam is provided for etching the inclined sidewall of the laser and a substrate is positioned having a face which is formed into the emitting surface in the ion beam to cause the ion beam to intercept a sidewall of the substrate to form the inclined sidewall. The face is tilted about either one of a ?110! or a ?110! direction. An angle is formed ranging between 5.degree. and 45.degree. measured between the inclined sidewall and the ?001! direction.
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: January 27, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: HyeYong Chu, ByuengSu Yoo, HyoHoon Park, MinSoo Park
  • Patent number: 5700713
    Abstract: A light-emitting semiconductor device a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n.sup.+ -layer (3) of high carrier (n-type) concentration, a Si-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N n.sup.+ -layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Mg doped ((Al.sub.x1 Ga.sub.1-x1).sub.y2 In.sub.1-y2 N n.sup.+ -layer (5), and a Mg doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N n.sup.+ -layer (6). The AlN layer (2) has a 500 .ANG. thickness. The GaN n.sup.+ -layer (3) has about a 2.0 .mu.m thickness and a 2.times.10.sup.18 /cm.sup.3 electron concentration. The n.sup.+ -layer (4) has about a 2.0 .mu.m thickness and a 2.times.10.sup.18 /cm.sup.3 electron concentration. A double i-layer structure includes the emission layer (5) and the i-layer (6). The emission layer (5) has about a 0.5 .mu.m thickness, and the i-layer (6) has about a 0.5 .mu.m thickness. Parts of the emission layer (5) and the i-layer (6) are p-type regions (50, 60).
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: December 23, 1997
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shiro Yamazaki, Naoki Shibata, Masayoshi Koike
  • Patent number: 5681756
    Abstract: A method of fabricating an integrated multicolor organic LED array including providing a negative layer and patterning a plurality of different color LED organic layers, one at a time, on the negative layer to form a plurality of different color LEDs in a plurality of areas of a selected array. A first color LED organic layer is patterned on the negative layer in first areas and to define additional areas for additional LEDs laterally separated from the first color LEDs and a final color LED organic layer is deposited in final areas and on previously patterned layers to form a plurality of final color LEDs. Transparent positive contacts are then formed on the final color LED layer in the first and final areas so as to form positive contacts to the first and the final color LEDs.
    Type: Grant
    Filed: May 30, 1995
    Date of Patent: October 28, 1997
    Assignee: Motorola
    Inventors: Michael P. Norman, Thomas B. Harvey, III, Xiaodong T. Zhu
  • Patent number: 5668047
    Abstract: A method for fabricating an InP diffraction grating for a distributed feedback semiconductor laser includes the steps of applying an electron beam resist on a semiconductor substrate, giving electron beam exposure to the electron beam resist and controlling heights of resist patterns by using fixed electron beam diameters but by varying incident electron doses. The semiconductor substrate is dry-etched. The electron beam exposure is such that the incident electron doses are made larger at a center portion than at portions towards two sides of the diffraction grating. Due to the proximity effect, the resist patterns after development will have a lower height and a narrower width at portions at which the incident electron doses are increased and, conversely, a higher height and a wider width at portions at which the incident electron doses are decreased.
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: September 16, 1997
    Assignee: NEC Corporation
    Inventor: Yoshiharu Muroya
  • Patent number: 5585305
    Abstract: A method for fabricating a semiconductor device includes the steps of growing a second semiconductor layer on a first semiconductor layer which is highly doped with an impurity such as Zn and diffusing the impurity concurrently with the growing step of the second semiconductor layer from the first semiconductor layer as an impurity source to the second semiconductor layer to have a predetermined carrier concentration profile, by controlling both the diffusing speed of said impurity and the growing speed of said second semiconductor layer by changing the temperature in accordance with a predetermined sequence to have a predetermined carrier concentration profile in the second semiconductor layer.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: December 17, 1996
    Assignee: Shin-Etsu Handotai Co. Ltd.
    Inventors: Masato Yamada, Takao Takenaka
  • Patent number: 5529936
    Abstract: Methods of etching optical elements in association with photosensitive elements are described. In some of the arrangements, the optical elements are formed integrally with a substrate containing the photosensitive elements. In other arrangements, an optical element is mounted to a package, or the like, containing the substrate and photosensitive elements. In other arrangements, two or more optical elements are employed, including conventional refractive elements, refractive focusing elements, and refractive beam splitting elements. Utility as solid state image sensors is discussed. Utility for monochromatic and color imaging is discussed.
    Type: Grant
    Filed: October 21, 1994
    Date of Patent: June 25, 1996
    Assignee: LSI Logic Corporation
    Inventor: Michael D. Rostoker
  • Patent number: 5482896
    Abstract: A light emitting device that comprises an organic LED array containing a plurality of light emitting pixels, the pixels each being located on a common electrically insulative transparent substrate, is characterized in that the transparent support is ultra thin, having a thickness less than the pitch of the pixels. The pixels in the LED array can be arranged in intersecting columns and rows, or they can comprise a line array.
    Type: Grant
    Filed: November 18, 1993
    Date of Patent: January 9, 1996
    Assignee: Eastman Kodak Company
    Inventor: Ching W. Tang
  • Patent number: 5459106
    Abstract: An AlGaAs chip which has an n-type layer and a p-type layer is immersed in an aqueous solution containing 0.2-0.6 wt. % of ammonia and 25-35 wt. % of hydrogen peroxide to form a primary protective layer, and after drying the AlGaAs chip, the AlGaAs chip is for a second time immersed in an aqueous solution containing 0.2-0.6 wt. % of ammonia and 25-35 wt. % of hydrogen peroxide to form a secondary protective layer.
    Type: Grant
    Filed: September 22, 1994
    Date of Patent: October 17, 1995
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masato Yamada, Tadashi Sakurai
  • Patent number: 5459082
    Abstract: A semiconductor device and a method of making the same capable of simplifying the process of making and reducing the cost of making. In the method a first layer is formed which has a plurality of conductors at its edge portion. Thereafter, a second layer is formed on the first layer which is to be selectively etched to form a pattern. During the etching, current is detected from the conductors and the etching is stopped dependent on the current detected from the conductors. The semiconductor device includes a transparent electrode on a substrate the transparent electrode having protrusions which have a top surface. A first insulation layer exists between the protrusions. There is a color emitting layer on the top surfaces of the protrusions and the insulation layer.
    Type: Grant
    Filed: August 9, 1994
    Date of Patent: October 17, 1995
    Assignee: Goldstar Co., Ltd.
    Inventor: Jae S. Jeong
  • Patent number: 5362673
    Abstract: A semiconductor light emitting device able to emit a high intensity, stable light. An edge surface lighting type light emitting diode array is formed on a substrate. A light emitting edge surface of each light emitting element is formed by an etching method. A surface of the substrate in front of the light emitting edge surface is formed in multiple stage so that a light beam is not reflected by the surface of the substrate.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: November 8, 1994
    Assignees: Ricoh Company, Ltd., Ricoh Research Institute of General Electronics Co., Ltd.
    Inventor: Hiroyuki Iechi
  • Patent number: 5354707
    Abstract: A semiconductor light emitting/detecting device has a first doped silicon layer, an intrinsic silicon epitaxial layer formed on the first doped silicon layer, at least one quantum dot embedded within the intrinsic silicon epitaxial layer, and a second doped silicon layer formed on the second intrinsic silicon epitaxial layer.
    Type: Grant
    Filed: November 9, 1993
    Date of Patent: October 11, 1994
    Assignee: International Business Machines Corporation
    Inventors: Jonathan D. Chapple-Sokol, Seshadri Subbanna, Manu J. Tejwani
  • Patent number: 5231049
    Abstract: A novel display screen structure and method of manufacturing such screens for use, for example, in large screen television displays. The process of the present invention is one which can be accomplished with no new materials, no critical geometric requirements such as critical separations and alignments and only low voltage drivers. The combination of these features results in a technology which can be easily scaled to large sizes to provide relatively low-cost large screens for televisions. An important step in a first embodiment of the present invention is the alignment of a large plurality of columnar-shaped light emitting diode slivers in an uncured optical epoxy by applying an electric field through a mixture of such slivers and epoxy and then curing the epoxy to effectively fix the light emitting diode slivers in that aligned configuration. In a second embodiment, the LED slivers are mixed with molten glass which is formed into elongated glass fibers.
    Type: Grant
    Filed: January 31, 1992
    Date of Patent: July 27, 1993
    Assignee: California Institute of Technology
    Inventors: Charles F. Neugebauer, Amnon Yariv
  • Patent number: 5221641
    Abstract: A process is provided for making light emitting diodes by using wire segments each plated with a glossy metal. The process comprises the steps of bending each wire segment generally into a U-shape to have a pair of legs connected together by an integral connecting web, deforming the free end of one leg by transverse compression to provide a cup end, mounting a semiconductor chip in the cup end, connecting the semiconductor chip to the free end of the other leg through a wire, forming a transparent or semitransparent resin package to enclose the respective free ends of the paired legs, and cutting the connecting web off the wire segment.
    Type: Grant
    Filed: May 27, 1992
    Date of Patent: June 22, 1993
    Assignee: Rohm Co., Ltd.
    Inventors: Yoshio Kurita, Yuji Sakamoto, Atsushi Imai
  • Patent number: 5196369
    Abstract: A method of fabricating light emitting diode array devices is provided, said method comprising the steps of layering through crystal growth the second semiconductor layer with an impurity serving as the diffusion source on the first semiconductor layer, removing by etching the area of said second semiconductor layer other than the island-like area at the location corresponding to the location where light emitting diodes are to be formed, and diffusing said impurity on said first semiconductor layer from said island-like area as the diffusion source. According to this method, such complicated process as gaseous phase diffusion, depositing ZnO film as the diffusion source, etc. may be eliminated.
    Type: Grant
    Filed: March 28, 1991
    Date of Patent: March 23, 1993
    Assignee: Eastman Kodak Company
    Inventor: Toshiro Hayakawa
  • Patent number: 5185290
    Abstract: A method of selectively coating one of two spaced apart facets of respective light-emitting regions on the same surface of a semiconductor device formed in a semiconductor wafer includes forming at least one first groove in a wafer and forming at least one second groove in the wafer intersecting the first groove, exposing light-emitting region facets on a side wall surface of the second groove. A stream of an evaporated coating material is directed across an edge, formed by the intersection of a side wall surface of the second groove with the first groove, at an angle relative to the wafer surface so that the edge shadows one of the light-emitting region facets but not the other. After the coating process, the wafer is divided into individual devices that may include adjacent, differently coated light-emitting region facets. The invention avoids a mechanical mask alignment step by employing in the coating process first grooves that are self aligning relative to the light-emitting region facets.
    Type: Grant
    Filed: August 1, 1990
    Date of Patent: February 9, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshitaka Aoyagi, Kimio Shigihara
  • Patent number: 5182228
    Abstract: In a ridge waveguide-type semiconductor light-emitting device, a buried layer is composed of a high-resistance semiconductor material (e.g., amorphous silicon), thereby improving the heat-dissipating characteristic and prolonging lifetime. The buried layer is made higher than the top surface of the ridge, the top surface of the ridge is situated in the resulting recess, and an electrode is formed from the top surface of the ridge to the top surface of the surrounding buried layer to cover the entirety of these surfaces. Making the buried layer higher than the top of the ridge prevents an electrical short circuit for being caused by an electrically conductive bonding agent used in junction-down mounting.
    Type: Grant
    Filed: January 28, 1992
    Date of Patent: January 26, 1993
    Assignee: Omron Corporation
    Inventors: Hiroshi Sekii, Koichi Imanaka
  • Patent number: 5137844
    Abstract: The electromagnetic radiation output from a solid-state radiation emitter is adjusted by covering at least part of the emission surface with an absorber material which absorbs the radiation emitted from the emitter, and directing a beam of radiation from outside the radiation emitter on to the absorber material so as to ablate at least part of the absorber material from the emission surface, or render at least part of the absorber material transmissive of the electromagnetic radiation from the emitter. The process is especially useful for equalizing the outputs from an array of emitters, such as a bar of light emitting diodes.
    Type: Grant
    Filed: April 5, 1991
    Date of Patent: August 11, 1992
    Assignee: Polaroid Corporation
    Inventor: Carl A. Chiulli
  • Patent number: 5116781
    Abstract: A process is disclosed of diffusing a zinc dopant into a III-V compound substrate. To avoid degrading the substrate surface the zinc dopant source is provided by coating an organic composition comprised of a zinc organic compound chosen from the group consisting of zinc alcoholates, .beta.-diketonate chelates and carboxylate salts. The composition inludes at least one organic film-forming moiety containing from 5 to 30 carbon atoms.
    Type: Grant
    Filed: August 17, 1990
    Date of Patent: May 26, 1992
    Assignee: Eastman Kodak Company
    Inventors: John A. Agostinelli, David J. Lawrence
  • Patent number: 5100833
    Abstract: A semiconductor light emitting device includes a vertical aperture produced at a main surface of a semi-insulating or insulating substrate, a transverse aperture provided in the substrate communicating with the vertical aperture, a conducting semiconductor layer buried in the vertical aperture and the transverse aperture, a groove produced by etching the substrate from the surface thereof until reaching the conducting semiconductor layer at a portion of the transverse aperture, and a light emitting element produced in the groove, and the light emitting region of the element being buried in the groove and connected with the buried conducting semiconductor layer. Accordingly, no pn junction exists at the periphery of the light emitting region, and a semiconductor light emitting element of quite low parasitic capacitance is obtained at high yield. A planar structure in which two electrodes are produced at the same plane is obtained, resulting in ease of integration and enhancement of the integration density.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: March 31, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shogo Takahashi, Etsuji Omura
  • Patent number: 5094970
    Abstract: In a light emitting diode array, an N-electrode layer (32) is extended from the bottom surface to the top surface of a semiconductor body (30) through the side surface. PN junctions (42) are exposed to the cleavage surface (S) and light is emitted therefrom. Since the N-electrode layer and P-electrode layers (41) are located on a common surface, the LED array can be mounted on a base plate through a soldering process. The LED array can be used without a self-focus lens array in an electric printer for photography.
    Type: Grant
    Filed: May 15, 1991
    Date of Patent: March 10, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Susumu Yoshida, Takafumi Nishioka
  • Patent number: 5024966
    Abstract: A silicon-based laser mounting structure is disclosed which provides improved interconnection between a semiconductor optical device, such as a laser, and an external high frequency modulation current source, by reducing the presence of parasitic inductive elements in the interconnecting network. The structure includes a stripline transmission path formed by depositing metal conductive strips on the top and bottom surfaces of a silicon substrate. The conductive strips are coupled at one end to the external modulation current source. A thin film resistor is deposited between the second end of the top conductive strip and the semiconductor optical device. This thin film resistor is utilized to provide impedance matching between the optical device and the stripline. That is, for a laser with an impedance Z.sub.L, and a stripline designed to have an impedance Z.sub.S, the resistance R is chosen such that R+Z.sub.L =Z.sub.S.
    Type: Grant
    Filed: April 16, 1990
    Date of Patent: June 18, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: Norman R. Dietrich, Ralph S. Moyer, Yiu-Huen Wong
  • Patent number: 4999310
    Abstract: A method of making an LED array capable of enhancing an internally generated light density with heterojunction by supporting the LED array with a current injection region by growing heterogeneous film and diffusing a zinc impurity. The improved LED array is capable of producing a high optical power by radiating efficiently a generated light beam without disturbance.
    Type: Grant
    Filed: August 29, 1989
    Date of Patent: March 12, 1991
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Ki-Joon Kim
  • Patent number: 4963507
    Abstract: In the manufacture of laser diodes having a stripe-shaped, active layer, a problem arises upon application of lateral layers, particularly of blocking pn-junctions for lateral current conduction, in that these layers are undesired above the active layer. By applying a protective cover layer that will dissolve in super-cooled melts of the material of the lateral layers, before the growth of the lateral layers, the growth of the lateral layers, particularly blocking pn-junctions, above the active stripe is avoided since the cover layer dissolves in the melt given epitaxial application of the lateral layers.
    Type: Grant
    Filed: April 27, 1988
    Date of Patent: October 16, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventors: Markus-Christian Amann, Wolfgang Thulke, Gerhard Baumann
  • Patent number: 4944811
    Abstract: A material for a light emitting element most suited for a light emitting diode or laser diode which emits visible light of 550 to 650 nm band wavelength. The material provides an at least two-layered structure composed of a GaAs substrate and a Sn doped InGaP layer developed on the substrate without forming a gradient layer therebetween. The mixed crystal composition of the Sn doped InGaP layer as expressed by the molar fraction of GaP is 0.50 to 0.75.According to the method for developing mixed crystals of InGaP, GaP and InP are dissolved in Sn to make a solution. The solution is allowed to come in contact with a GaAs substrate so that InGaP crystals are developed directly on the GaAs substrate without a gradient layer for coordinating the lattice constant formed on the GaAs substrate.
    Type: Grant
    Filed: August 9, 1989
    Date of Patent: July 31, 1990
    Assignees: Tokuzo Sukegawa, Mitsubishi Cable Industries, Ltd.
    Inventors: Tokuzo Sukegawa, Kazuyuki Tadatomo
  • Patent number: 4927778
    Abstract: A high yield method for the fabrication of multi-element, gallium-arsenide-phosphide light emitting diode arrays having square light emitting elements 7903 square microns on 88.9 micron center suitable for use in electronic/optical printers, is described. The resulting arrays at a current density of 200 A/cm.sup.2 have 0.6% power efficiency and a radiant exitance of 3.8 W cm -2 with less than 2% standard deviation in element to element radiant exitance. The integrated, relatively low cost LED arrays, are particularly suitable for use in electronic/optical printing applications.
    Type: Grant
    Filed: August 5, 1988
    Date of Patent: May 22, 1990
    Assignee: Eastman Kodak Company
    Inventor: Daniel C. Abbas
  • Patent number: 4921817
    Abstract: A substrate for a high-intensity LED and the method of epitaxially growing the substrate according to the invention are based on the fact that, in using an AuZn alloy or the like as the ohmic electrode of the p-type Al.sub.x Ga.sub.1-x As layer (2), the higher the carrier concentration of this layer, the smaller the contact resistance and the lower the applied voltage (V.sub.F) necessary for passing a forward current of 10 mA. Joint use is made of gas-phase epitaxy and liquid-phase epitaxy. A layer having a carrier concentration three to five times that of an epitaxial layer formed by liquid-phase epitaxy (LPE) can be realized with excellent reproducibility by gas-phase epitaxy (MOCVD process, MBE process, etc.). By utilizing this p-type Al.sub.x Ga.sub.1-x As layer (2) as an electrode contact layer, contact resistance can be reduced and variance diminished.
    Type: Grant
    Filed: March 8, 1989
    Date of Patent: May 1, 1990
    Assignees: Mitsubishi Monsanto Chemical Co., Mitsubishi Kasei Corp.
    Inventor: Masahiro Noguchi
  • Patent number: 4845052
    Abstract: The I/O ports of a packaged IC includes a plurality of optical conduits in the package adjacent electro-optical transmitters and receivers throughout the die spaced from the periphery of the die. The method of assembling the die in the package includes using optical transmitters on the die to align the top of the package and the optical conduits to the die which was previously mounted in the base of the package.
    Type: Grant
    Filed: January 13, 1988
    Date of Patent: July 4, 1989
    Assignee: Harris Corporation
    Inventor: Robert J. Abend