With Mechanical Mask, Shield Or Shutter For Shielding Workpiece Patents (Class 156/345.3)
  • Patent number: 10312090
    Abstract: A patterning method is disclosed. A substrate having a hard mask layer and a first material layer formed thereon is provided. The first material layer is patterned into first array patterns and first peripheral patterns. The first array patterns are further transferred into first spacer patterns. Subsequently, a planarization layer and a second material layer are successively formed on the substrate. The second material layer is patterned into second array patterns and second peripheral patterns. The second array patterns are further transferred into second spacer patterns. The second spacer patterns partially overlap the first spacer patterns. The second peripheral patterns do not overlap the first peripheral pattern. The first spacer patterns not overlapped by the second spacer patterns are removed to obtain third array patterns. The hard mask layer is then etched using the third array patterns, the second peripheral patterns and the first peripheral patterns as an etching mask.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: June 4, 2019
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Fu-Che Lee, Chieh-Te Chen
  • Patent number: 10163632
    Abstract: Provided is a material composition and method for substrate modification. A substrate is patterned to include a plurality of features. The plurality of features includes a first subset of features having one or more substantially inert surfaces. In various embodiments, a priming material is deposited over the substrate, over the plurality of features, and over the one or more substantially inert surfaces. By way of example, the deposited priming material bonds at least to the one or more substantially inert surfaces. Additionally, the deposited priming material provides a modified substrate surface. After depositing the priming material, a layer is spin-coated over the modified substrate surface, where the spin-coated layer is substantially planar.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Han Lai, Chien-Wei Wang, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10053361
    Abstract: A microelectromechanical systems (MEMS) package includes a eutectic bonding structure free of a native oxide layer and an anti-stiction layer, while also including a MEMS device having a top surface and sidewalls lined with the anti-stiction layer. The MEMS device is arranged within a MEMS substrate having a first eutectic bonding substructure arranged thereon. A cap substrate having a second eutectic bonding substructure arranged thereon is eutectically bonded to the MEMS substrate with a eutectic bond at the interface of the first and second eutectic bonding substructures. The anti-stiction layer lines a top surface and sidewalls of the MEMS device, but not the first and second eutectic bonding substructures. A method for manufacturing the MEMS package and a process system for selective plasma treatment are also provided.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: August 21, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yuan-Chih Hsieh, Hung-Hua Lin, Wen-Chuan Tai, Hsiang-Fu Chen
  • Patent number: 9552122
    Abstract: A dry etching apparatus for performing dry etching in manufacture of a set of touch screen panels on a mother substrate, including a chamber, an upper electrode in the chamber at an upper portion thereof, the upper electrode configured to apply a high-frequency power source (RF) to the interior of the chamber, a lower electrode in the chamber at a lower portion thereof, the lower electrode configured to apply the high-frequency power source to the interior of the chamber, a gas injection port configured to inject a compound mixture gas into the chamber, an exhaust port configured to exhaust a reactive gas produced in the interior of the chamber, and a shadow mask disposed above a location on the lower electrode for the mother substrate for the touch screen panels, the shadow mask having a plurality of exposure windows respectively corresponding to a plurality of exposure portions to be formed.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: January 24, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Bong-Sub Song, Soung-Chang Ku
  • Patent number: 9177762
    Abstract: A plasma process chamber includes a top electrode, a bottom electrode disposed opposite the top electrode, the bottom electrode capable of supporting a substrate. The plasma process chamber also includes a plasma containment structure defining a plasma containment region, the plasma containment region being less than an entire surface of the substrate. The plasma containment structure rotates relative to the substrate and wherein the plasma containment region includes a center point of the substrate throughout the rotation of the plasma containment structure relative to the substrate. The plasma containment structure includes multiple gaps. A vacuum source is coupled to the gaps in the plasma containment structure. A method of processing a substrate is also described.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: November 3, 2015
    Assignee: Lam Research Corporation
    Inventor: Eric Hudson
  • Patent number: 9034141
    Abstract: A thin film forming apparatus and a thin film forming method using the same are disclosed. In one aspect, the thin film forming apparatus comprises a mask that includes a blocking portion and an opening. It also includes an etching source that jets an etching gas through the opening of the mask to etch a thin film according to a pattern. The mask includes a gas blower for blowing a gas around the opening so that the etching gas does not penetrate into a thin film area corresponding to the block portion. When the thin film forming apparatus is used, a normal residual area of a thin film may be safely preserved and patterning may be accurately performed. Thus, the quality of a product manufactured by using the thin film forming apparatus may be improved.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung-Joong Joo, You-Min Cha
  • Publication number: 20150129129
    Abstract: A plasma processing apparatus includes a process chamber including a sidewall, a mounting table disposed in the process chamber, a shield member which is disposed along the inner surface of the sidewall to surround the mounting table and has an opening facing the transfer port, and a shutter configured to open/close the opening, the shutter being movable up and down. The shutter has a first portion adapted to face the opening, and a second portion adapted to face the shield member at a lower side of the shield member. The shield member has a lower portion including a contact surface facing the second portion. A contactor adapted to contact the contact surface is disposed at the second portion. The first portion of the shutter closes the opening through a gap between the first portion and the shield member. The contact surface and the contactor are formed of HASTELLOY®.
    Type: Application
    Filed: October 27, 2014
    Publication date: May 14, 2015
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Ippei SHIMIZU, Naoki MIHARA, Shunsuke OGATA
  • Publication number: 20150122419
    Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films. A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a carrier substrate by a double-sided UV-curable adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the ICs. The UV-curable adhesive film is partially cured by UV irradiation through the carrier. The singulated ICs are then detached from the partially cured adhesive film still attached to the carrier substrate, for example individually by a pick and place machine. The UV-curable adhesive film may then be further cured for the film's complete removal from the carrier substrate.
    Type: Application
    Filed: January 12, 2015
    Publication date: May 7, 2015
    Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
  • Publication number: 20150114559
    Abstract: A plasma shielding member may include a body having a first surface and a second surface that are opposite to each other, and a plurality of through holes each extending from the first surface to the second surface; a narrower portion of a respective through hole formed at one end of each of the through holes; and/or a wider portion of the respective through hole formed at another end of each of the through holes. A plasma shielding member may include a body including a plurality of through holes that extends from a first surface of the body toward a second surface of the body. Each of the through holes may be defined by a narrower portion of the body at a first end of the respective through hole, and by a wider portion of the body at a second end of the respective through hole.
    Type: Application
    Filed: August 18, 2014
    Publication date: April 30, 2015
    Inventors: Eun-Young HAN, Hyun-Su JUN, Gyung-jin MIN, Kye-Hyun BAEK, Tae-Rang KIM
  • Patent number: 9017526
    Abstract: The disclosed embodiments relate to methods and apparatus for removing material from a substrate. In various implementations, conductive material is removed from a sidewall of a previously etched feature such as a trench, hole or pillar on a semiconductor substrate. In practicing the techniques herein, a substrate is provided in a reaction chamber that is divided into an upper plasma generation chamber and a lower processing chamber by a corrugated ion extractor plate with apertures therethrough. The extractor plate is corrugated such that the plasma sheath follows the shape of the extractor plate, such that ions enter the lower processing chamber at an angle relative to the substrate. As such, during processing, ions are able to penetrate into previously etched features and strike the substrate on the sidewalls of such features. Through this mechanism, the material on the sidewalls of the features may be removed.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: April 28, 2015
    Assignee: Lam Research Corporation
    Inventors: Harmeet Singh, Alex Paterson
  • Patent number: 9016234
    Abstract: A mask holding device has a replaceable magnetic means, and a deposition apparatus for an organic light emitting device includes the mask holding device. The mask holding device is provided with magnets, and the magnets can be replaced as required so as to change the magnetic force of the mask holding device.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: April 28, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jung-Woo Ko
  • Publication number: 20150107769
    Abstract: A hard mask is provided which, while having a film density to demonstrate etching resistance, is low in film stress. The hard mask HD of this invention, which is provided to restrict the range of processing to the surface of a to-be-processed object W at the time of performing a predetermined processing to the to-be-processed object, is constituted by a titanium nitride film. This titanium nitride film is made into a two-layer structure. A lower-side layer L1 has a film thickness h1 within a range of 5 to 50% of the total film thickness ht of the hard mask, and also has a film density within a range of 3.5 to 4.7 g/cm3. An upper-side layer has a film density within a range of 4.8 to 5.3 g/cm3.
    Type: Application
    Filed: May 10, 2013
    Publication date: April 23, 2015
    Applicant: ULVAC, INC.
    Inventor: Katsuaki Nakano
  • Publication number: 20150099365
    Abstract: A bevel etcher for cleaning a bevel edge of a semiconductor substrate with plasma includes a lower electrode assembly having a lower support having a cylindrical top portion. An upper dielectric component is disposed above the lower electrode assembly having a cylindrical bottom portion opposing the top portion of the lower support. A tunable upper plasma exclusion zone (PEZ) ring surrounds the bottom portion of the dielectric component, wherein a lower surface of the tunable upper PEZ ring includes an upwardly tapered outer portion extending outwardly from the bottom portion of the upper dielectric component, wherein a vertical height of an adjustable gap between the lower surface of the upper PEZ ring and an upper surface of a substrate supported on the lower support can be increased or decreased such that the extent of the bevel edge of the substrate to be cleaned by the plasma can respectively be adjusted radially inward or radially outward.
    Type: Application
    Filed: October 4, 2013
    Publication date: April 9, 2015
    Applicant: Lam Research Corporation
    Inventors: Jack Chen, Adam Liron, Gregory Sexton
  • Publication number: 20150087524
    Abstract: There is provided a method for producing a substrate (600) suitable for supporting an elongated superconducting element, wherein, e.g., a deformation process is utilized in order to form disruptive strips in a layered solid element, and where etching is used to form undercut volumes (330, 332) between an upper layer (316) and a lower layer (303) of the layered solid element. Such relatively simple steps enable providing a substrate which may be turned into a superconducting structure, such as a superconducting tape, having reduced AC losses, since the undercut volumes (330, 332) may be useful for separating layers of material. In a further embodiment, there is placed a superconducting layer on top of the upper layer (316) and/or lower layer (303), so as to provide a superconducting structure with reduced AC losses.
    Type: Application
    Filed: May 17, 2013
    Publication date: March 26, 2015
    Inventor: Anders Christian Wulff
  • Patent number: 8985049
    Abstract: Pressure maskers for masking at least one passageway of an article include a body portion that surrounds at least a portion of the article around the at least one passageway, at least one fluid inlet connected to the body portion that provides a conduit for pressurized masking fluid to pass from an exterior of the pressure masker to an interior of the pressure masker, wherein the article is at least partially disposed within the interior of the pressure masker, and at least one seal that seals the body portion at least partially around the article such that the pressurized masking fluid that enters the interior of the pressure masker is at least partially forced through the at least one passageway.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 24, 2015
    Assignee: General Electric Company
    Inventors: Mark Carmine Bellino, Jonathan Matthew Lomas, Matthew Paul Berkebile, Michael Anthony DePalma, III
  • Patent number: 8980005
    Abstract: Embodiments described herein relate to an apparatus and method for lining a processing region within a chamber. In one embodiment, a modular liner assembly for a substrate processing chamber is provided. The modular liner assembly includes a first liner and a second liner, each of the first liner and second liner comprising an annular body sized to be received in a processing volume of a chamber, and at least a third liner comprising a body that extends through the first liner and the second liner, the third liner having a first end disposed in the process volume and a second end disposed outside of the chamber.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: David K. Carlson, Mehmet Tugrul Samir, Nyi O. Myo
  • Patent number: 8968477
    Abstract: A deposition mask for manufacturing an organic light emitting display (OLED) using the same are provided. The deposition mask is intended for preventing an organic film from being damaged due to touching of a blocked-off portion of the mask to an emission layer (EML), or chemical transition from being generated at the organic film. For that purpose, the deposition mask stuck to a substrate of the OLED to deposit an organic EML includes an opening and an indentation. The opening is opened so as to deposit the organic EML. The indentation is indented a predetermined depth from a plane facing the substrate.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: March 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chang-Ho Kang, Tae-Seung Kim, Jae-Min Hong
  • Publication number: 20150044873
    Abstract: A method of forming a silicon containing confinement ring for a plasma processing apparatus useful for processing a semiconductor substrate comprises inserting silicon containing vanes into grooves formed in a grooved surface of an annular carbon template wherein the grooved surface of the annular carbon template includes an upwardly projecting step at an inner perimeter thereof wherein each groove extends from the inner perimeter to an outer perimeter of the grooved surface. The step of the grooved surface and a projection at an end of each silicon containing vane is surrounded with an annular carbon member wherein the annular carbon member covers an upper surface of each silicon containing vane in each respective groove. Silicon containing material is deposited on the annular carbon template, the annular carbon member, and exposed portions of each silicon containing vane thereby forming a silicon containing shell of a predetermined thickness.
    Type: Application
    Filed: August 7, 2013
    Publication date: February 12, 2015
    Applicant: Lam Research Corporation
    Inventor: Michael C. Kellogg
  • Publication number: 20150027635
    Abstract: A plasma processing apparatus of exciting a processing gas into plasma by applying a high frequency power between an upper electrode and a lower electrode provided within a processing chamber and performing a plasma process on a target object to be processed with the plasma includes a DC power supply configured to apply a DC voltage to the upper electrode; a ground electrode connected to the DC power supply; and an annular shield member provided outside the ground electrode. A groove is formed into a downward recess at an outer peripheral portion of the ground electrode, and an upper end of the shield member is positioned above an upper end of the peripheral portion of the ground electrode. A protruding portion, which is protruded toward a center of the ground electrode, is formed at a portion of the shield member positioned above the ground electrode.
    Type: Application
    Filed: April 4, 2013
    Publication date: January 29, 2015
    Applicant: Tokyo Electron Limited
    Inventor: Hidetoshi Hanaoka
  • Publication number: 20150020974
    Abstract: The present invention relates to a substrate treating apparatus, and more particularly, to an apparatus treating a substrate using plasma. In an embodiment, a baffle is formed with holes distributing a process gas excited to a plasma state, and has a surface which is treated with a surface treating material comprising a silicon compound.
    Type: Application
    Filed: July 19, 2013
    Publication date: January 22, 2015
    Inventor: YoungYeon JI
  • Publication number: 20150020966
    Abstract: Disclosed is an apparatus and method for forming lubricant recesses having minute configurations by applying a photolithograph method in a curved inner surface, such as a cylinder bore surface of a cylinder block, the inside of a cylinder liner, the inside of a compressor cylinder, a big end of a connecting rod, a big end bearing, a shaft insertion hole of a rocker arm, or the like in an internal combustion engine.
    Type: Application
    Filed: February 20, 2014
    Publication date: January 22, 2015
    Applicant: Hwabaek Engineering Co., LTD.
    Inventors: Kang Lee, Young Hwan Uhm, Jung Min Han
  • Publication number: 20150024606
    Abstract: Embodiments of a method for thinning a wafer are provided. The method includes placing a wafer on a support assembly and securing an etching mask to a backside of the wafer. The etching mask covers a peripheral portion of the wafer. The method further includes performing a wet etching process on the backside of the wafer to form a thinned wafer, and the thinned wafer includes peripheral portions having a first thickness and a central portion having a second thickness smaller than the first thickness. Embodiments of system for forming the thinned wafer are also provided.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Inventors: Chien-Ling HWANG, Bor-Ping JANG, Hsin-Hung LIAO, Chung-Shi LIU
  • Publication number: 20150017481
    Abstract: The embodiments disclose a structure, including a first layer selectively etched on a substrate with a seedlayer deposited thereon, a first layer bit patterned growth guiding mechanism on the seedlayer, and a plurality of bit patterned magnetic recording features grown on the seedlayer guided by the growth guiding mechanism.
    Type: Application
    Filed: June 18, 2014
    Publication date: January 15, 2015
    Inventors: Thomas P. Nolan, Kim Y. Lee, Shuaigang Xiao, Tom Chang, Yingguo Peng
  • Patent number: 8920563
    Abstract: A thin film deposition apparatus that may be easily manufactured, that may be easily applied to manufacture large-sized display devices on a mass scale, and that improves manufacturing yield and deposition efficiency, and a method of manufacturing an organic light-emitting display device by using the thin film deposition apparatus are disclosed. The thin film deposition apparatus for forming a thin film on a substrate, the thin film deposition apparatus including: a magnet disposed on a first surface of the substrate; a patterning wheel disposed on a second surface opposite to the first surface of the substrate, rotatable around a rotation axis, and including a plurality of grooves along a peripheral surface; and a patterning wire including a plurality of blockers having shapes corresponding to the plurality of grooves of the patterning wheel, and windable to the patterning wheel.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: December 30, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Mu-Gyeom Kim, Chang-Mo Park
  • Patent number: 8920564
    Abstract: A substrate support may include a body; an inner ring disposed about the body; an outer ring disposed about the inner ring forming a first opening therebetween; a first seal ring disposed above the first opening; a shadow ring disposed above the inner ring, extending inward from the outer ring and forming a second opening between the shadow and outer rings; a second seal ring disposed above the second opening; a space at least partially defined by the body and the inner, outer, first, second, and shadow rings; a first gap defined between a processing surface of a substrate when present and the shadow ring; and a plurality of second gaps fluidly coupled to the space; wherein the first gap and the plurality of second gaps are configured such that, when a substrate is present, a gas provided to the space flows out of the space through the first gap.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: December 30, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Gwo-Chuan Tzu, Xiaoxiong Yuan, Amit Khandelwal, Benjamin Cheng Wang, Avgerinos V. Gelatos, Kai Wu, Michael P. Karazim, Jing Lin, Olkan Cuvalci
  • Publication number: 20140374381
    Abstract: A mask is disclosed. The mask includes at least one support base having at least one opening formed therein, where at least a portion of the boundary of the opening is tapered. The mask also includes at least one positioning layer disposed on the at least one support base, where at least one through opening corresponding to and aligned with the at least one opening is formed in the at least one positioning layer. In addition, at least a portion of the boundary of the through opening is tapered.
    Type: Application
    Filed: November 26, 2013
    Publication date: December 25, 2014
    Applicants: Tianma Micro-Electronics Co., Ltd., Xiamen Tianma Micro-Electronics Co., Ltd.
    Inventor: Tiansheng YE
  • Publication number: 20140374379
    Abstract: According to one embodiment, a pattern forming method includes, forming a first mask on a film to be processed, forming a guide that has a pattern including first openings and second openings, forming a second mask which covers the first openings and does not cover the second openings, etching the first mask using the second mask and the guide as a mask, removing the second mask, applying a self-assembling material into the first openings and the second openings, heating the self-assembling material to form a self-assembled pattern including a first polymer portion and a second polymer portion, etching the first polymer portion, etching the first mask using the second polymer portion and the guide as a mask, and processing the film to be processed using the first mask as a mask.
    Type: Application
    Filed: February 14, 2014
    Publication date: December 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hirokazu KATO
  • Publication number: 20140357087
    Abstract: Provided are an apparatus and method for etching an organic layer, in which an organic material deposited in a non-layer forming area of a substrate is etched. The apparatus includes an etching chamber; a plasma generator configured to supply plasma into the etching chamber; a stage disposed in the etching chamber and configured to support the substrate; and a mask configured to guide the plasma toward the non-pixel area.
    Type: Application
    Filed: September 17, 2013
    Publication date: December 4, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Yoshiaki SAKAMOTO, Nam Ha
  • Patent number: 8894768
    Abstract: A substrate processing apparatus that simultaneously forms thin films on a plurality of substrates and performs heat treatment includes: a plurality of substrate holders, each including a substrate support that supports a substrate and a first gas pipe having one or a plurality of injection holes; a boat where the plurality of substrate holders are stacked and including a second gas pipe connected with the first gas pipe of each of the substrate holders; a process chamber providing a space in which the substrates stacked in the boat are processed; a conveying unit that carries the boat into/out of the process chamber; a first heating unit disposed outside the process chamber; and a gas supply unit including a third gas pipe connected with the second gas pipe and supplying a heated or cooled gas into the second gas pipe.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: November 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Jong-Won Hong, Heung-Yeol Na, Tae-Hoon Yang, Yun-Mo Chung, Eu-Gene Kang, Seok-Rak Chang, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Ivan Maidanchuk, Byung-Soo So, Jae-Wan Jung
  • Patent number: 8888948
    Abstract: An apparatus for controlling a plasma etching process includes plasma control structure that can vary a size of a plasma flow passage, vary a speed of plasma flowing through the plasma flow passage, vary plasma concentration flowing through the plasma flow passage, or a combination thereof.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: November 18, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ming Chang, Chi-Lun Lu
  • Publication number: 20140332498
    Abstract: Provided are a substrate holder, a substrate supporting apparatus, a substrate processing apparatus, and a substrate processing method. Particularly, there are provided a substrate holder, a substrate supporting apparatus, a substrate processing apparatus, and a substrate processing method that are adapted to improve process efficiency and etch uniformity at the back surface of a substrate.
    Type: Application
    Filed: July 21, 2014
    Publication date: November 13, 2014
    Inventors: Young Ki HAN, Young Soo SEO, Hyoung Won KIM, Chi Kug YOON, Sang Hoon LEE
  • Patent number: 8882921
    Abstract: A thin film deposition apparatus capable of forming a precise deposition pattern on a large substrate includes a deposition source; a first nozzle disposed at a side of the deposition source having a plurality of first slits; a second nozzle disposed opposite to the first nozzle having a plurality of second slits; and a second nozzle frame bound to the second nozzle so as to support the second nozzle. The second nozzle frame includes two first frame portions spaced apart from each other and disposed in a direction in which the plurality of second slits are arranged, and two second frame portions each connecting the two first frame portions to each other, wherein the second frame portions are curved in the direction in which the plurality of second slits are arranged, so as to form arches.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: November 11, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Choong-Ho Lee, Jung-Min Lee
  • Publication number: 20140326408
    Abstract: A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns.
    Type: Application
    Filed: July 17, 2014
    Publication date: November 6, 2014
    Inventors: Jun-Hyeub SUN, Sung-Kwon LEE, Sang-Oh LEE
  • Patent number: 8852346
    Abstract: A mask frame assembly for thin film deposition is disclosed. In one embodiment, the assembly includes: a frame, and a plurality of unit mask strips attached to the frame, wherein each of the unit mask strips includes a plurality of unit masking patterns which are spaced apart from each other. In one embodiment, each of the unit masking patterns includes: i) a plurality of stripe pattern slits and ii) a plurality of sets of dot pattern slits each set formed to be substantially parallel with the stripe pattern slits. Further, the stripe pattern slits and the sets of dot pattern slits are alternately formed with respect to each other, wherein each set of the dot pattern slits includes a plurality of dot pattern slits, and wherein the length of each stripe pattern slit is substantially the same as the length of each set of the dot pattern slits.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: October 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Sang-Shin Lee
  • Publication number: 20140290858
    Abstract: Methods for fabricating sub-lithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.
    Type: Application
    Filed: June 10, 2014
    Publication date: October 2, 2014
    Inventor: Dan B. Millward
  • Publication number: 20140285272
    Abstract: A technique for implementing an clock tree distribution network having a clock buffer and a plurality of LC tanks that each take into \consideration local capacitance distributions and conductor resistances. An AC-based sizing formulation is applied to the buffer and to the LC tanks so as to reduce the total buffer area. The technique is iterative and can be fully automated while also reducing clock distribution power consumption.
    Type: Application
    Filed: April 15, 2014
    Publication date: September 25, 2014
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventor: Matthew Guthaus
  • Publication number: 20140283991
    Abstract: A wafer edge protector is used in an inductively coupled plasma reactive ion etching instrument for the manufacturing of GaN semiconductor devices and circuits. The wafer edge protector comprises a ring clamp, which has a first inner diameter and a second inner diameter, and the ring clamp covers the edges of a wafer and a wafer carrier to clamp the wafer and the wafer carrier and to prevent damage on the edges of the wafer and the wafer carrier during the etching process.
    Type: Application
    Filed: March 20, 2013
    Publication date: September 25, 2014
    Applicant: WIN Semiconductors Corp.
    Inventors: Chia-Hao CHEN, Yi-Feng WEI, Yao-Chung HSIEH, I Te CHO, Walter Tony WOHLMUTH
  • Publication number: 20140273494
    Abstract: According to one embodiment, a parallel plate dry etching apparatus includes: a lower electrode; an upper electrode having a plurality of etching gas supply ports in the lower surface; a reaction chamber including the lower and the upper electrode and having an exhaust port; a flow guide plate disposed in a ring form in an upper portion of a space between a side wall of the reaction chamber and a side wall of the lower electrode, the flow guide plate having a plurality of vent holes; and a pair of shield plates disposed to face the flow guide plate in the space, the pair of shield plates blocking the etching gas passing through part of the plurality of vent holes, and the pair of shield plates facing the lower electrode in a first direction parallel to the upper surface of the lower electrode.
    Type: Application
    Filed: July 23, 2013
    Publication date: September 18, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Shingo HONDA
  • Publication number: 20140273460
    Abstract: Embodiments of the present disclosure generally provide apparatus and methods for improving process result near the edge region of a substrate being processed. One embodiment of the present disclosure provides a cover ring for improving process uniformity. The cover ring includes a ring shaped body, and an extended lip extending radially inwards from the ring shaped body. An inner edge of the extended lip forms a central opening to expose a processing region on a substrate being processed, and a width of the extended lip is between about 15% to about 20% of a radius of the central opening.
    Type: Application
    Filed: February 20, 2014
    Publication date: September 18, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: David REYLAND, Dung Huu LE, Saravjeet SINGH, Madhava Rao YALAMANCHILI
  • Publication number: 20140262026
    Abstract: Variable geometry process kits for use in semiconductor process chambers have been provided herein. In some embodiments, a process kit for use in a semiconductor process chamber includes: an annular body configured to rest about a periphery of a substrate support; a first ring positioned coaxially with the annular body and supported by the annular body; a second ring positioned coaxially with the first ring and supported by the first ring; and an annular shield comprising a horizontal leg positioned coaxially with the second ring such that a portion of the horizontal leg is aligned with and below portions of the first ring and second ring.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: JOHN FORSTER, ZHENBIN GE, ALAN RITCHIE
  • Patent number: 8834674
    Abstract: According to one embodiment, a plasma etching apparatus includes an electrode to which a high-frequency voltage is applied, having an upper surface along which a processing target substrate is to be placed, and having an inclined side, and an electrode cover provided along the side of the electrode.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: September 16, 2014
    Assignees: Kabushiki Kaisha Toshiba, Shibaura Mechatronics Corporation
    Inventors: Takeharu Motokawa, Hidehito Azumano
  • Publication number: 20140255831
    Abstract: The invention refers to a method and apparatus for protecting a substrate during a processing by at least one particle beam. The method comprises the following steps: (a) applying a locally restrict limited protection layer on the substrate; (b) etching the substrate and/or a layer arranged on the substrate by use of the at least one particle beam and at least one gas; and/or (c) depositing material onto the substrate by use of the at least one particle beam and at least one precursor gas; and (d) removing the locally limited protection layer from the substrate.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 11, 2014
    Inventors: Thorsten Hofmann, Tristan Bret, Petra Spies, Nicole Auth, Michael Budach, Dajana Cujas
  • Publication number: 20140256144
    Abstract: A mask set and method for forming FinFET semiconductor devices provides a complementary set of fin-cut masks that are used in DPT (double patterning technology) to remove fins from non-active areas of a semiconductor device, after the fins are formed. Adjacent fins, or adjacent groups of fins, are removed using pattern features from different ones of the multiple fin-cut masks.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tzu-Chun LO, Min-Hung CHENG, Hsiao-Wei SU, Jeng-Shiun HO, Ching-Che TSAI, Cheng-Cheng KUO, Hua-Tai LIN, Chia-Chu LIU, Kuei-Shun CHEN
  • Patent number: 8821683
    Abstract: A substrate processing apparatus includes a plasma source facing a substrate, and a shielding member placed between the substrate and the plasma source. The plasma source diffuses a plasma radially and the shielding member has a through hole through which a part of the radially diffused plasma passes. A substrate processing method is used for performing a plasma processing on a substrate in a substrate processing apparatus including a plasma source facing the substrate and a shielding member placed between the plasma source and the substrate. The shielding member has a through hole. The method includes the step of diffusing a plasma radially by the plasma source.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: September 2, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Yusuke Hirayama, Kazuya Nagaseki
  • Publication number: 20140231913
    Abstract: Improved sidewall image transfer (SIT) techniques are provided. In one aspect, a SIT method includes the following steps. An oxide layer is formed on a substrate. A transfer layer is formed on a side of the oxide layer opposite the substrate. A mandrel layer is formed on a side of the transfer layer opposite the oxide layer. The mandrel layer is patterned to form at least one mandrel. Sidewall spacers are formed on opposite sides of the at least one mandrel. The at least one mandrel is removed, wherein the transfer layer covers and protects the substrate during removal of the at least one mandrel. The transfer layer is etched using the sidewall spacers as a hardmask to form a patterned transfer layer. The oxide layer and the sidewall spacers are removed from the substrate. The substrate is etched using the patterned transfer layer as a hardmask.
    Type: Application
    Filed: February 15, 2013
    Publication date: August 21, 2014
    Applicant: International Business Machines Corporation
    Inventor: Effendi Leobandung
  • Publication number: 20140235063
    Abstract: An edge ring assembly is disclosed for use in a plasma processing chamber, which includes an RF conductive ring positioned on an annular surface of a base plate and configured to surround an upper portion of the baseplate and extend underneath an outer edge of a wafer positioned on the upper surface of the baseplate, and a wafer edge protection ring positioned above an upper surface of the RF conductive ring and configured to extend over the outer edge of the wafer. The protection ring has an inner edge portion with a uniform thickness, which extends over the outer edge of the wafer, a conical upper surface extending outward from the inner edge portion to a horizontal upper surface, an inner annular recess which is positioned on the upper surface of the RF conductive and configured to extend over the outer edge of the wafer.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 21, 2014
    Applicant: Lam Research Corporation
    Inventors: Brian McMillin, Arthur Sato, Neil Benjamin
  • Patent number: 8807075
    Abstract: A shutter disk having a tuned coefficient of thermal expansion is provided herein. In some embodiments, a shutter disk having a tuned coefficient of thermal expansion may include a body formed from a first material comprising at least two components, wherein a ratio of each of the at least two components to one another is selected to provide a coefficient of thermal expansion of the body that is substantially similar to a coefficient of thermal expansion of a second material to be deposited atop the body.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: August 19, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Karl Brown
  • Patent number: 8801894
    Abstract: Methods for fabricating sub-lithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: August 12, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Dan B. Millward
  • Patent number: 8795466
    Abstract: Apparatus and methods are provided that enable processing of patterned layers on substrates using a detachable mask. Unlike prior art where the mask is formed directly over the substrate, according to aspects of the invention the mask is made independently of the substrate. During use, the mask is positioned in close proximity or in contact with the substrate so as to expose only portions of the substrate to processing, e.g., sputtering or etch. Once the processing is completed, the mask is moved away from the substrate and may be used for another substrate. The substrate may be cycled for a given number of substrates and then be removed for cleaning or disposal.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: August 5, 2014
    Assignee: Intevac, Inc.
    Inventors: Michael S. Barnes, Terry Bluck
  • Publication number: 20140213041
    Abstract: Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 31, 2014
    Inventors: Wei-Sheng LEI, Saravjeet SINGH, Jivko DINEV, Aparna IYER, Brad EATON, Ajay KUMAR