Abstract: A self-powered ‘near field’ lithographic system 100 includes three primary components, namely, a thin film or emitter substrate 110 including a radioactive material (e.g., a radioisotope 112), a target substrate 120 which carries an energy-modifiable layer 122 (e.g., photo-resist) and a stencil (e.g., 130) that is either positioned between the emitter and target substrates fabricated upon and defined in the emitter substrate. The stencil is made from a material capable of blocking particles emitted through radioactive decay from the radioisotope of the emitter substrate. The stencil includes openings or vias 132 patterned to permit selective transmission of the particles emitted through radioactive decay from the radioisotope of the emitter substrate 110, and the stencil is preferably placed up against (or very close to) the target substrate 120.

Abstract: A plasma probe assembly for use in a plasma processing chamber is provided. A semiconductor probe element with a probe surface at a first end of the semiconductor probe element is provided. An electrical connector is electrically connected to the semiconductor probe element. An electrically insulating sleeve surrounds at least part of the probe element. An adjustment device is connected to the semiconductor probe so that the probe surface is coplanar with an interior chamber surface of the plasma processing chamber.

Abstract: There are provided an etching mask which has a superior thermal imprinting characteristic and also a good anti-etching characteristic, a base material with the etching mask, a microfabricated product to which those etching mask and base material are applied, and a production method of the microfabricated product. The etching mask formed of a thermoplastic resin containing at least one kind of skeleton expressed by a chemical formula (1) or a chemical formula (2) in a main chain wherein R1, R2, R3, R4, R5, R6, R7, R8 in the formulae (1), (2) can be different or same one another, each of which is a hydrogen atom, a deuterium atom, a hydrocarbon group having a carbon number of 1 to 15, a halogen atom, or a substituent group containing a hetero atom like oxygen or sulfur, and may form a ring structure one another and wherein m and n are integers equal to or greater than 0.

Abstract: The present disclosure presents a three-dimensional thin film solar cell (3-D TFSC) substrate having enhanced mechanical strength, light trapping, and metal modulation coverage properties. The substrate includes a plurality of unit cells, which may or may not be different. Unit cells are defined as a small self-contained geometrical pattern which may be repeated. Each unit cell structure includes a wall enclosing a trench. Further, the unit cell includes an aperture having an aperture diameter. For the purposes of the present disclosure, the dimensions of interest include wall thickness, wall height, and aperture diameter. A pre-determined variation in these dimensions among unit cells across the substrate produces specific advantages.

Abstract: A selective self-aligned dual patterning method. The method includes performing a single lithography operation to form a patterned mask having a narrow feature in a region of a substrate that is to a have pitch-reduced feature and a wide feature in a region of the substrate that is to have a non-pitch-reduced feature. Using the patterned mask, a template mask is formed with a first etch and the patterned mask is then removed from the narrow feature while being retained over the wide feature. The template mask is then thinned with a second etch to introduce a thickness delta in the template mask between the narrow and wide features. A spacer mask is then formed and the thinned narrow template mask is removed to leave a pitch double spacer mask while the thick wide template mask feature is retained to leave a non-pitch reduced mask.

Abstract: There are provided an apparatus and method for processing a substrate. By using the apparatus and method, plasma processing can be individually performed on each of edge and rear regions of a substrate in a single chamber. The apparatus includes a chamber providing a reaction space; a stage installed in the chamber; a plasma shielding unit installed opposite to the stage in the chamber; a support unit for supporting a substrate between the stage and the plasma shielding unit; a first supply pipe provided at the stage to supply a reaction or non-reaction gas to one surface of the substrate; and second and third supply pipes provided at the plasma shielding unit, the second supply pipe supplying a reaction gas to the other surface of the substrate, the third supply pipe supplying a non-reaction gas to the other surface.

Abstract: A method for manufacturing a semiconductor device comprises dry-etching a thin film using a resist mask carrying patterns in which at least one of the width of each pattern and the space between neighboring two patterns ranges from 32 to 130 nm using a halogenated carbon-containing compound gas with the halogen being at least two members selected from the group consisting of F, I and Br. The ratio of at least one of I and Br is not more than 26% of the total amount of the halogen atoms as expressed in terms of the atomic compositional ratio to transfer the patterns onto the thin film. Such etching of a thin film avoids causing damage to the resist mask used. The resulting thin film carrying the transferred patterns is used as a mask for subjecting the underlying material to dry-etching.

Abstract: Spacers in a pitch multiplication process are formed without performing a spacer etch. Rather, the mandrels are formed over a substrate and then the sides of the mandrels are reacted, e.g., in an oxidization, nitridation, or silicidation step, to form a material that can be selectively removed relative to the unreacted portions of the mandrel. The unreacted portions are selectively removed to leave a pattern of free-standing spacers. The free-standing spacers can serve as a mask for subsequent processing steps, such as etching the substrate.

Abstract: Crisscrossing spacers formed by pitch multiplication are used as a mask to form isolated features, such as contacts vias. A first plurality of mandrels are formed on a first level and a first plurality of spacers are formed around each of the mandrels. A second plurality of mandrels is formed on a second level above the first level. The second plurality of mandrels is formed so that they cross, e.g., are orthogonal to, the first plurality of mandrels, when viewed in a top down view. A second plurality of spacers is formed around each of the second plurality of mandrels. The first and the second mandrels are selectively removed to leave a pattern of voids defined by the crisscrossing first and second pluralities of spacers. These spacers can be used as a mask to transfer the pattern of voids to a substrate. The voids can be filled with material, e.g., conductive material, to form conductive contacts.

Abstract: An apparatus and a method for compensating uniformity of film thickness are provided. A shielding plate is provided between a vapor deposition object and a evaporation source. During the vapor deposition process, a shielding plate is continuously moved according to film deposition rates, so as to selectively pass or block atoms emitted from the evaporation source to achieve purpose of adjustably depositing.

Abstract: A system for imprint lithography, which includes a substrate, a patterned mask, an imprint applying unit that imprints, via the patterned mask, a pattern into a resist layer on the substrate, and an overlay device that overlays a cladding layer over the substrate.

Abstract: A method of manufacturing microstructures is disclosed, the method comprising a applying a mask to substrate; forming a pattern in the mask; processing the substrate according to the pattern; and mechanically removing the mask from the substrate. A polymer mask is disclosed for manufacturing micro scale structure, the polymer mask comprising a thin, preferably ultra thin flexible film. A method of manufacturing an integrated circuit is disclosed, the method comprising forming a plurality of isolated semiconductor devices on a common substrate; and connecting some of the devices. Apparatus for manufacturing microstructures is disclosed comprising: a mechanism for coating a mass substrate to create a structure; a mechanism for removing a mask from the substrate; and processing apparatus.

Abstract: Embodiments of the invention relate to a substrate etching method and apparatus. In one embodiment, a method for etching a substrate in a plasma etch reactor is provided that include flowing a backside process gas between a substrate and a substrate support assembly, and cyclically etching a layer on the substrate.

Abstract: A plasma processing apparatus includes a vacuum processing chamber, supplying means for introducing a processing gas into the vacuum processing chamber, a mounting electrode in the vacuum processing chamber for mounting a specimen on the mounting electrode, and a pusher pin for raising the specimen placed on the mounting electrode and holding the specimen over the mounting electrode, wherein the mounting electrode includes an inner area for mounting the specimen, an outer area for mounting a focus ring, and a high-frequency power source for supplying electric power to the inner area and the outer area, and wherein high-frequency electric power is applied to the outer area to generate plasma at the outer edge of the backside of the specimen while the specimen is raised with the pusher pin.

Abstract: Methods for fabricating sublithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.

Abstract: An etching resist containing a metallic oxynitride. The etching resist of the present invention can be suitably used, for example, in the production of a molded article for surface-working an optical member such as a microlens sheet, a light diffusing sheet, a non-reflective sheet, a sheet for encapsulating photosemiconductor elements, an optical waveguide, an optical disk, or a photosensor.

Abstract: Disclosed is a method for fabrication of a CMOS image sensor capable of improving adhesion between an interlayer insulating film and photoresist. According to embodiments in this disclosure, the CMOS image sensor fabrication method may include: forming a plurality of photodiodes over a semiconductor substrate at regular intervals; forming an interlayer insulating film over the semiconductor substrate including the plurality of photodiodes; applying photoresist over the entirety of the interlayer insulating film; hard-baking the photoresist; conducting exposure and development of the photoresist to expose a part of the interlayer insulating film corresponding to the photodiodes, thereby completing a photoresist pattern; and using the photoresist pattern as a mask to selectively etch the exposed part of the interlayer insulating film.

Abstract: Plasma treatment apparatus and method for treatment of a surface of a substrate. A dielectric barrier discharge electrode structure is provided having a treatment space (5) and comprising a first electrode (2) and a second electrode (3), and a power supply (11) connected to the first electrode (2) and the second electrode (3) for generating an atmospheric pressure plasma in the treatment space (5). The plasma treatment apparatus further comprises a magnetic layer (6) provided on a surface of at least the first electrode (2). The first electrode (2) is arranged to receive, in operation, the substrate (1) to be treated and a mask device (7) in contact with the substrate (1), the mask device (7) interacting with the magnetic layer (6).

Abstract: A mask frame on which a mask, having a pattern area and a mask edge defining the pattern area, is fixed comprises: a through opening corresponding to the pattern area; and a base corresponding to the mask edge. The base is provided with discharging holes formed therein, and a vacuum pump is coupled to the discharging holes so that the mask is fixed to the mask frame without damaging the pattern formed on the pattern area of the mask.

Abstract: Apparatus is provided for plasma treating a substrate. This has a chamber (2) and a plasma generator (4) which forms a plasma from one or more gases flowing within the chamber so as to produce one or more species for interacting with a substrate (8) placed within the chamber. A guide (12) is provided for directing the gas flow containing the species towards the substrate (8). When in use, the width of the plasma is greater than that of the substrate by an amount defining an outer region of plasma. The guide is adapted to direct the species from at least substantially all of the outer region of the plasma towards the substrate. A corresponding method of plasma treatment is also disclosed.

Abstract: A plasma processing system (system) for processing a substrate is provided. The system includes a gas distribution system and a gas flow control assembly coupled to the gas distribution system. The gas flow control assembly is configured to control the input gases provided by the gas distribution system. The plasma processing system also includes a first set of nozzles coupled to the gas flow control assembly and configured to supply a first set of gases for processing a first portion of the substrate. The plasma processing system further includes a second set of nozzles coupled to the gas flow control assembly and configured to supply a second set of gases for processing a second portion of the substrate. The flow rate of the first set of gases is different from a flow rate of the second set of gases.

Abstract: For a plasma processing apparatus that performs an etching process for the face of a wafer opposite the circuit formation face, ceramic insulating films having a ring shape are positioned on the mounting face of an electrode member in consonance with the location of a large wafer or a small wafer. When a large wafer is employed, a ring member is attached. And when a small wafer is employed, a blocking member is mounted to hide a gap between the insulating films deposited on the mounting face 3b and to cover suction holes. Further, a cover member is attached to cover the blocking member from the top. With this arrangement, the plasma process can be performed, using the same electrode member, for wafers having different sizes.

Abstract: A device isolation layer includes a semiconductor substrate defining an upper trench etched to a predetermined depth, a lower trench defined in the semiconductor substrate at a lower part of the upper trench, the lower trench having a smaller width than the upper trench, and an insulating oxide embedded in the upper and lower trenches. Accordingly, since a stepped structure is formed in the trenches, generation voids may be restrained while improving the gap-filling efficiency.

Abstract: The present invention presents an improved bellows shield for a plasma processing system, wherein the design and fabrication of the bellows shield coupled to a substrate holder electrode advantageously provides protection of a bellows with substantially minimal erosion of the bellows shield.

Abstract: Improved layouts take better advantage of desirable cap-layer induced transverse and vertical stress. In one aspect, roughly described, a tensile strained cap material overlies the transistor channels in the N-channel diffusion regions but not the P-channel diffusion regions. The material terminates at an edge that is located as far as practical from the N-channel diffusion, toward the P-channel diffusion. In another aspect, roughly described, a gate conductor crosses a P-channel diffusion region and terminates as far as practical beyond the edge without making undesirable electrical contact with any other features of the integrated circuit design, and without overlying any other diffusion regions. A compressively strained cap layer overlies the P-channel diffusion. In yet another aspect, roughly described, a gate conductor crosses an N-channel diffusion and extends by as short a distance as practical before terminating or turning. A tensile strained cap material overlies the N-channel diffusion.

Abstract: A mask fixture for etching an item includes: a top fixture disposed over the item, including a reservoir centered within the top fixture for containing an etchant; a bottom fixture underneath the item to be etched including a recessed surface area centered within the bottom fixture; and an etch-resistant window for holding the item to be etched, the etch-resistant window disposed entirely within the recessed surface area. In addition, a small via centered within and intersecting both the top and bottom fixtures acts as a path for a high intensity light beam.

Abstract: A method of etching a wafer using resonant infrared energy and a filter to control non-uniformities during plasma etch processing. The filter includes a predetermined array or stacked arrangement of variable transmission regions that mirror the spatial etch distortions caused by the plasma etching process. By spatially attenuating the levels of IR energy that reach the wafer, the filter improves uniformity in the etching process. Filters may be designed to compensate for edge fast etching due to macro-loading, asymmetric pumping in a plasma chamber, and magnetic field cusping.

Abstract: Apparatus and methods are provided that enable processing of patterned layers on substrates using a detachable mask. Unlike prior art where the mask is formed directly over the substrate, according to aspects of the invention the mask is made independently of the substrate. During use, the mask is positioned in close proximity or in contact with the substrate so as to expose only portions of the substrate to processing, e.g., sputtering or etch. Once the processing is completed, the mask is moved away from the substrate and may be used for another substrate. The substrate may be cycled for a given number of substrates and then be removed for cleaning or disposal.

Abstract: The wafer bevel etching apparatus of the present invention includes a wafer-protecting mask to cover parts of a wafer. A central region and a wafer bevel region surrounding the central region are defined on the wafer. The wafer-protecting mask includes a center sheltering region and at least one wafer bevel sheltering region. The center sheltering region can completely shelter the central region of the wafer, and the wafer bevel sheltering region extends from the outside edge of the center sheltering region, shelters parts of the wafer bevel region, and exposes the other parts of the wafer bevel region.

Abstract: Apparatus and methods for shielding a feature projecting from a first area on a substrate to a plasma while simultaneously removing extraneous material from a different area on the substrate with the plasma. The apparatus includes at least one concavity positioned and dimensioned to receive the feature such that the feature is shielded from the plasma. The apparatus further includes a window through which the plasma removes the extraneous material. The method generally includes removing the extraneous material while shielding the feature against plasma exposure.

Abstract: A method is provided for creating a plurality of substantially uniform nano-scale features in a substantially parallel manner in which an array of micro-lenses is positioned on a surface of a substrate, where each micro-lens includes a hole such that the bottom of the hole corresponds to a portion of the surface of the substrate. A flux of charged particles, e.g., a beam of positive ions of a selected element, is applied to the micro-lens array. The flux of charged particles is focused at selected focal points on the substrate surface at the bottoms of the holes of the micro-lens array. The substrate is tilted at one or more selected angles to displace the locations of the focal points across the substrate surface. By depositing material or etching the surface of the substrate, several substantially uniform nanometer sized features may be rapidly created in each hole on the surface of the substrate in a substantially parallel manner.

Abstract: In a plasma etching apparatus for performing a plasma etching on a surface of a substrate mounted on a susceptor in a processing vessel, a focus ring is installed to surround the substrate and has a first region at an inner side on a surface thereof, in which an average surface roughness is small such that a reaction product produced during an etching processing is not captured to be deposited, and a second region at an outer side from the first region, in which an average surface roughness is large such that a reaction product produced during the etching process is captured to be deposited. A boundary between the first and the second region is a part where an etching amount is relatively significantly changed compared to other parts while the focus ring is equipped in the plasma etching apparatus and the plasma etching is performed on the substrate.

Abstract: A fin mask for forming saddle type fins in each of active regions formed in an island shape having a certain size with a major axis and a minor axis includes a first fin mask of a line type, and a second fin mask of an island type, wherein the first fin mask and the second fin mask in combination expose saddle type fin regions and cover ends of the neighboring active regions along the major axis.

Abstract: A method and an apparatus for forming a structure on a component made of a material composed of silicon oxide, especially of silicate glass, glass ceramic or quartz, wherein in accordance with the process at least a first surface of the component a partial removal of the material by plasma etching takes place and during the plasma etching at least at the surface to be etched a substrate temperature is established which is substantially greater than 90° C. but less than the softening temperature of the material. The apparatus is equipped for this purpose with a heater for generating the substrate temperature.

Abstract: An apparatus for etching a substrate includes: a chamber; a susceptor in the chamber, the susceptor including at least one loading portion corresponding to at least one substrate; a gas supply over the susceptor, the gas supply including a hollow and at least one through hole corresponding to the at least one loading portions; and at least one shielding means interposed into the at least one through holes, the at least one shielding means including a body part and a hanging part on the body part, the body pail having a cross-sectional area smaller than the at least one through holes, and the hanging part outwardly protruding from the body part, wherein the at least one shielding means is suspended on the gas supply by the hanging part, and wherein the body part shields a central portion of the at least one substrate and exposes an edge portion of the at least one substrate.

Abstract: Embodiments of the present invention provide apparatus and method for front side protection while processing side and backside of a substrate. One embodiment of the present invention provides a showerhead configured to provide a purge gas to a front side of a substrate during a backside etch processing. The showerhead comprises a body configured to be disposed over the front side of the substrate. The body has a process surface configured to face the front side of the substrate. The process surface has an outer circular region, a central region, a middle region between the outer central region and the central region. The first plurality of holes are distributed in the outer circular region and configured to direct the purge gas towards an edge area of the front side of the substrate. No gas delivery hole is distributed within a substantial portion of the middle region.

Abstract: Method and systems for patterning a hardmask film using ultraviolet light is disclosed according to one embodiment of the invention. Embodiments of the present invention alleviate the processing problem of depositing and etching photoresist in order to produce a hardmask pattern. A hardmask layer, such as, silicon oxide, is first deposited on a substrate within a deposition chamber. In some cases, the hardmask layer is baked or annealed following deposition. After which, portions of the hardmask layer are exposed with ultraviolet light. The ultraviolet light produces a pattern of exposed and unexposed portions of hardmask material. Following the exposure, an etching process, such as a wet etch, may occur that removes the unexposed portions of the hardmask. Following the etch, the hardmask may be annealed, baked or subjected to a plasma treatment.

Abstract: A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate.

Abstract: Positional relationships are established in a process chamber. An upper electrode is configured with a first surface to support a wafer, and an electrode has a second surface. A linear drive is mounted on the base and a linkage connected between the drive and the upper electrode. Linkage adjustment defines a desired orientation between the surfaces. The linear drive and linkage maintain the desired orientation while the assembly moves the upper electrode with the surfaces moving relative to each other. An annular etching region defined between the electrodes enables etching of a wafer edge exclusion region extending along a top and bottom of the wafer. Removable etch defining rings are configured to define unique lengths along each of the top and bottom of the wafer to be etched. Positional relationships of the surfaces enable limiting the etching to those unique lengths of the exclusion region.

Abstract: Impurities can be eluted simultaneously from a plurality of local areas of a surface layer of a semiconductor substrate. A supporting unit supports the substrate, and a sample plate is disposed on the surface of the substrate. The sample plate has a plurality of holes that expose the local areas of the surface of the substrate. Eluant is provided onto the local areas of the surface layer of the substrate through the holes in the sample plate. The impurities are thus dissolved by the eluant to produce a sample. A nozzle transfers the sample from the local areas of the surface of the substrate to a plurality of sample cups. Therefore, samples from the surface layer of the substrate may be produced in a short amount of time.

Abstract: There is disclosed a method, system, and screen for reducing solder voids on circuit boards. In an embodiment, there is provided a method of reducing solder voids on a circuit board, comprising: locating via holes provided at a conductive landing pad; and covering at least some of the via holes with a coating, whereby gases from the covered via holes are prevented from expanding and forming voids. In another embodiment, the method further comprises covering the location of at least some of the via holes in a pattern of strips, whereby more of the via holes may be covered by the coating while reducing areas of the conductive landing pad covered by the coating. In another embodiment, the coating and removal process may be performed at the same time as when all other areas of the circuit board are coated and removed, such that a separate manufacturing step is not required.

Abstract: A thin-film forming method, which includes the steps of: (1) holding at least one object in a chamber; (2) depositing a film-forming material on the object; (3) etching the forming material while depositing is conducted. In the present invention, the depositing and etching are controlled to simultaneously conduct. The invention also disclose a system for performing the method.

Abstract: A method of fabricating an integrated circuit includes providing a hard mask that includes at least one first layer and one second layer. An etching step is patterned using the hard mask, and a removal step is performed using an etchant in order to at least partially remove the first layer. The first layer and the second layer are configured in such a way that the first layer is etched by the etchant with a higher etch rate than the second layer.

Abstract: A process kit for a semiconductor processing chamber is provided. In one embodiment, a process kit includes a notched deposition ring. In another embodiment, a process kit includes a cover ring configured to engage the notched deposition ring. In another embodiment, a process kit includes an annular deposition ring body having inner, outer, upper and bottom walls. A trough is recessed into an upper surface of the body between the upper and inner walls. A recessed surface is formed on a lower surface of the body between the bottom and inner walls. A notch extends inward from the body to catch deposition material passing through a notch of the substrate being processed.

Abstract: The present invention discloses a method and apparatus for the directed formation of a re-entrant micro-jet formed upon the collapse of a cavitation bubble formed proximate to a work surface placed in a fluid. A mask containing an orifice, placed between the work surface and the cavitation bubble, is utilized to direct the re-entrant micro-jet to the work surface. The cavitation bubble may be formed in the desired location by focusing an energy flow proximate to the mask. The energy flow may be obtained by radiation from laser, x-ray, or electrical discharge sources.

Abstract: Methods and systems for modifying a surface of a polymer with a shielded plasma are provided. The surface may be modified to create a surface with increased crosslinking and/or a particular mechanical property, such as a coefficient of friction. A shielding arrangement is used to modify the plasma to which the polymer surface is exposed, thereby providing a surface with the desired mechanical properties. In one aspect, a single source that provides multiple species of plasma particles is advantageously used instead of having to switch or move in multiple sources. The extent of crosslinking is evaluated using a surface force microscope to determine a frictional property that is correlated to the crosslinking, e.g., via calibrated values determined from reference surfaces.

Abstract: A lower electrode assembly includes an insulator and a lower electrode material. The lower electrode material includes a peripheral portion having three level surfaces. The first level surface supports a substrate having a predetermined width and length. The second level surface has a width that corresponds to the predetermined width of the substrate plus a first increment and a length that correspond to the predetermined length of the substrate plus a second increment. The third level surface has a lower height than the second level surface. The insulator is provided horizontally on the second level surface and third level surface.

Abstract: A plasma processing apparatus includes a chamber having a support for a substrate, and at least one gas inlet into the chamber. The apparatus is configured to alternately introduce an etch gas and a deposition gas into the chamber through the at least on gas inlet, and to strike a plasma into the etch gas and the deposition gas alternately introduced into the chamber. The apparatus is further equipped with an attenuation device for reducing and/or homogenizing the ion flux from the plasma substantially without affecting the neutral radical number density.

Abstract: The imprint mold structure of the present invention is an imprint mold structure including at least a disc-shaped substrate having a concavo-convex pattern having a plurality of convex portions, wherein the imprint mold structure is used for transferring the concavo-convex pattern onto an imprint resist layer formed on magnetic recording medium substrate, with the concavo-convex pattern of the imprint mold structure being pressed against the imprint resist layer, wherein the shape of a vertical cross-section of the concavo-convex pattern taken on a line having a direction perpendicular to the direction in which the convex portion extends satisfies the following three Mathematical Expressions: (Mathematical Expression 1) 40°??<90°, (Mathematical Expression 2) SRas>SRab, (Mathematical Expression 3) LRah>LRav.

Abstract: A plasma processing system includes a source of plasma, a substrate and a shutter positioned in close proximity to the substrate. The substrate/shutter relative disposition is changed for precise control of substrate/plasma interaction. This way, the substrate interacts only with a fully established, stable plasma for short times required for nanoscale processing of materials. The shutter includes an opening of a predetermined width, and preferably is patterned to form an array of slits with dimensions that are smaller than the Debye screening length. This enables control of the substrate/plasma interaction time while avoiding the ion bombardment of the substrate in an undesirable fashion. The relative disposition between the shutter and the substrate can be made either by moving the shutter or by moving the substrate.