With Workpiece Support Patents (Class 156/345.51)
  • Patent number: 11075087
    Abstract: A method includes mounting a wafer on a chuck disposed within a chamber of an etching system, the wafer being encircled by a focus ring. While etching portions of the wafer, an etch direction is adjusted to a first desired etch direction by adjusting a vertical position of the focus ring relative to the wafer to a first desired vertical position. While etching portions of the wafer, the etch direction is adjusted to a second desired etch direction by adjusting the vertical position of the focus ring relative to the wafer to a second desired vertical position. The second desired vertical position is different from the first desired vertical position. The second desired etch direction is different from the first desired etch direction.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: July 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chi Lin, Chin-Hsing Lin, Hung Jui Chang, Yi-Wei Chiu, Yu-Wei Kuo, Yu Lun Ke
  • Patent number: 11056379
    Abstract: A clamp assembly is for clamping an outer peripheral portion of a substrate to a support in a plasma processing chamber. An RF bias power is applied to the support during the plasma processing of the substrate. The clamp assembly includes an outer clamp member, and an inner clamp member which is received by the outer clamp member, the inner clamp member defining an aperture which exposes the substrate to the plasma processing. The outer clamp member has an inner portion terminating in an inner edge, wherein the inner portion is spaced apart from the inner clamp member.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: July 6, 2021
    Inventors: Anthony Barker, Huma Ashraf, Brian Kiernan
  • Patent number: 11056320
    Abstract: An apparatus comprises a housing having a process space, a support unit supporting the substrate in the process space, a process gas supply unit supplying a process gas into the process space, and a plasma source generating plasma from the process gas. The support unit comprises a support member on which the substrate is placed, a heating member that heats the substrate supported on the support member, and a heat transfer gas supply member that supplies a heat transfer gas to a backside of the substrate. The heating member comprises heaters that heat regions on the substrate on the support member viewed from above. The support member comprises a protrusion that partitions a space between the support member and the backside of the substrate placed on the support member into gas regions, and at least one of heating regions is divided into regions by the protrusion viewed from above.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: July 6, 2021
    Assignee: SEMES CO., LTD.
    Inventors: Sang-Kee Lee, Kang Rae Ha
  • Patent number: 11004715
    Abstract: A substrate supporting device having a feeder structure that enables a large number of electrodes to be successfully supplied with power. A ceramic heater 100 includes a base 10 having an upper surface as a support surface on which a substrate is supported, electrodes 20 embedded in the base 10, a base-supporting member 30 that is mounted on a lower surface of the base 10 and that is formed of a heat insulating material, and feeder rods 40 that extend through respective through-holes 35 formed in a circumferential wall 34 of the base-supporting member 30 and extending in the vertical direction and that are electrically connected to the electrodes 20.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: May 11, 2021
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Noriaki Tokusho, Shunichi Sasaki, Tomohiro Ishino, Hisanori Aoyama, Makoto Hino, Kenichi Fukazawa, Atsushi Tsuchida, Toshiya Umeki
  • Patent number: 10916442
    Abstract: Disclosed is a method for etching an etching target layer which contains silicon and is provided with a metal-containing mask thereon. The method includes: generating plasma of a first processing gas containing a fluorocarbon gas in a processing container that accommodates the etching target layer and the mask to form a fluorocarbon-containing deposit on the mask and the etching target layer; and generating plasma of a second processing gas containing an inert gas in the processing container to etch the etching target layer by radicals of the fluorocarbon contained in the deposit. A plurality of sequences, each including the generating the plasma of the first processing gas and the generating the plasma of the second processing gas, are performed.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: February 9, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Takayuki Katsunuma
  • Patent number: 10910238
    Abstract: Implementations of the disclosure generally relate to a semiconductor processing chamber and, more specifically, a heated support pedestal for a semiconductor processing chamber. In one implementation, a pedestal assembly is disclosed and includes a substrate support comprising a dielectric material and having a support surface for receiving a substrate, a resistive heater encapsulated within the substrate support, a hollow shaft coupled to a support member of the substrate support at a first end of the shaft, and a thermally conductive material disposed at an interface between the support member and the first end of the shaft.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: February 2, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kaushik Alayavalli, Ajit Balakrishna, Sanjeev Baluja, Amit Kumar Bansal, Matthew James Busche, Juan Carlos Rocha-Alvarez, Swaminathan T. Srinivasan, Tejas Ulavi, Jianhua Zhou
  • Patent number: 10876218
    Abstract: A substrate supporting plate that may prevent deposition on a rear surface of a substrate and may easily unload the substrate. The substrate supporting plate may include a substrate mounting portion and a peripheral portion surrounding the substrate mounting portion. An edge portion of a top surface of the substrate mounting portion may be anodized. A central portion of the top surface of the substrate mounting portion may not be anodized.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: December 29, 2020
    Assignee: ASM IP HOLDING B.V.
    Inventors: Yong Min Yoo, Jong Won Shon, Seung Woo Choi, Dong Seok Kang
  • Patent number: 10854485
    Abstract: An electrostatic chuck, a substrate processing apparatus, and a method of manufacturing a semiconductor device are provided. The electrostatic chuck comprises a chuck base, an insulation plate on the chuck base, a first heater comprising a cell heater in the insulation plate, and a heater controller configured to control the cell heater. The heater controller obtains a resistance of the cell heater and compares the resistance with a threshold value to control a heating power provided to the cell heater.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: December 1, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Minsung Kim, Myoung Soo Park, Dongyun Yeo, Dougyong Sung, Suho Lee, Yun-Kwang Jeon
  • Patent number: 10825708
    Abstract: Process kit components for use with a substrate support of a process chamber are provided herein. In some embodiments, a process kit ring may include a ring shaped body having an outer edge, an inner edge, a top surface and a bottom, wherein the outer edge has a diameter of about 12.473 inches to about 12.479 inches and the inner edge has a diameter of about 11.726 inches to about 11.728 inches, and wherein the ring shaped body has a height of about 0.116 to about 0.118 inches; and a plurality of protrusions disposed on the top surface of the ring shaped body, each of the plurality of protrusions disposed symmetrically about the ring shaped body.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: November 3, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Valentin Todorow, Samer Banna, Imad Yousif, Albert Wang, Gary Leray
  • Patent number: 10790111
    Abstract: The objective of the present invention is to provide a charged-particle beam device wherein suppressing the effects of static build-up is compatible with executing high-throughput measurements and examination. In order to achieve this objective, proposed is the charged-particle beam device equipped with an electrostatic chuck (803), comprising an electrometer (11) for measuring the electric potential of the electrostatic chuck, a charge removing device (805) for removing charge from the electrostatic chuck, and a control device (806) for controlling the charge removing device in such a manner that the charge removal by the charge removing device is executed after reaching a certain number of processed samples irradiated by the charged particle beam, or after a predetermined processing time.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: September 29, 2020
    Assignee: Hitachi High-Tech Corporation
    Inventors: Seiichiro Kanno, Hiroyuki Andou
  • Patent number: 10777392
    Abstract: There is provided a focus ring that is capable of preventing deposits from adhering to a member having a lower temperature in a gap between two members having different temperatures. A focus ring 25 is disposed to surround a peripheral portion of a wafer W in a chamber 11 of a substrate processing apparatus 10. The focus ring 25 includes an inner focus ring 25a and an outer focus ring 25b. Here, the inner focus ring 25a is placed adjacent to the wafer W and configured to be cooled; and the outer focus ring 25b is placed so as to surround the inner focus ring 25a and configured not to be cooled. Further, a block member 25c is provided in a gap between the inner focus ring 25a and the outer focus ring 25b.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: September 15, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Jun Yamawaku, Chishio Koshimizu
  • Patent number: 10770337
    Abstract: A lift pin assembly includes a lift pin having a first longitudinal axis substantially parallel with a first direction, a pin connection block combined with a lower end portion of the lift pin and including a first guide recess in a lower end portion of the pin connection block, the first guide recess extending in a second direction substantially perpendicular to the first direction, and a lift pin holder having a second longitudinal axis substantially parallel with the first direction and including a first sliding portion to be received movably in the second direction within the first guide recess by an eccentricity distance of the second longitudinal axis from the first longitudinal axis when the lift pin holder is connected to the lower end portion of the pin connection block.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: September 8, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ja-Woo Lee, Seung-Won Shin, Su-Ho Lee
  • Patent number: 10770283
    Abstract: A substrate aligning method includes receiving a substrate by moving a substrate support from an outside of an outer periphery toward a central portion of the substrate along the substrate; and aligning the substrate such that the substrate support moves from a position different from a position partially upwardly warped along an outer peripheral edge of the substrate and a position partially downwardly warped along the outer peripheral edge of the substrate toward the central portion of the substrate so as to receive the substrate.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: September 8, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Keiji Onzuka, Hirozumi Hoshino
  • Patent number: 10739671
    Abstract: In a method of manufacturing a photo mask, a resist layer is formed over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer. A resist pattern is formed by using a lithographic operation. The light blocking layer is patterned by using the resist pattern as an etching mask. The phase shift layer is patterned by using the patterned light blocking layer as an etching mask. A border region of the mask substrate is covered with an etching hard cover, while a pattern region of the mask substrate is opened. The patterned light blocking layer in the pattern region is patterned through the opening of the etching hard cover. A photo-etching operation is performed on the pattern region to remove residues of the light blocking layer.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: August 11, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chieh Tien, Cheng-Hsuen Chiang, Chih-Ming Chen, Cheng-Ming Lin, Yen-Wei Huang, Hao-Ming Chang, Kuo Chin Lin, Kuan-Shien Lee
  • Patent number: 10714318
    Abstract: In a plasma processing method, a position in height direction of an upper surface of a focus ring surrounding an edge of a substrate mounted on a supporting table in a chamber of a plasma processing apparatus is set such that the position in height direction of the upper surface of the focus ring mounted on a mounting region of the supporting table is lower than a reference position that is a position in a height direction of an upper surface of the substrate. Plasma is generated in the chamber to perform plasma processing on the substrate in a state where the position in the height direction of the upper surface of the focus ring is maintained. A negative DC voltage is applied to the focus ring in a state where the position in height direction of the upper surface of the focus ring is maintained during the plasma generation.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: July 14, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Toshifumi Nagaiwa
  • Patent number: 10692745
    Abstract: The present disclosure relates to a substrate processing apparatus, and more particularly, to a substrate processing apparatus capable of blocking particles falling from a lower portion of a substrate to a surface of a lower substrate. The substrate processing apparatus in accordance with an exemplary embodiment may include a substrate boat including a plurality of hollow plates coupled to a plurality of rods in a multistage manner, wherein a plurality of substrates are respectively loaded on the plurality of hollow plates, a reaction tube having an accommodation space in which the substrate boat is accommodated, a gas supply part configured to supply a process gas into the reaction tube from one side of the reaction tube, and an exhaust part configured to exhaust a process residue in the reaction tube from the other side of the reaction tube. Each of the hollow plates may include an edge portion defining a hollow portion vertically passing therethrough.
    Type: Grant
    Filed: December 23, 2017
    Date of Patent: June 23, 2020
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventor: Sung Ha Choi
  • Patent number: 10607818
    Abstract: An embodiment includes a support unit, substrate treating apparatus and substrate treating method. The substrate treating apparatus comprises: a process chamber having a treatment space inside thereof; a support unit for supporting a substrate inside of the process chamber; and a gas supply unit for supplying the treatment gas into the treatment space, wherein the support unit comprises: an electrode layer of a metal material to which a high frequency electric power can be applied; a ground line having one end connected to the electrode layer and the other end grounded; and a switch provided on the ground line.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: March 31, 2020
    Assignee: SEMES CO., LTD.
    Inventors: Doo Ho Lim, Chang-Seung Ha, Seungbae Lee
  • Patent number: 10512125
    Abstract: Provided is a mounting table according to one aspect of the present disclosure includes: a ceramic body; a heater provided in the ceramic body; a base including a support surface that supports the ceramic body and provides a space for accommodating a temperature sensor as a space that is opened at least at the support surface side; and a heat transfer body extending between a first end provided in the ceramic body and a second end that is positioned above the space and provided closer to the space than the first end, the heat transfer body having a heat conductivity that is higher than that of the ceramic body around the heat transfer body.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: December 17, 2019
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Dai Kitagawa
  • Patent number: 10465290
    Abstract: Disclosed is a substrate processing apparatus. The substrate processing apparatus comprises a process chamber providing an inner space where a substrate is treated, a support unit disposed in the inner space and supporting the substrate, and a gas supply unit providing the inner space with a process gas required for generating plasma. The support unit comprises a base having a top surface on which the substrate is placed, a heater disposed in the base, and a coating layer formed on the top surface of the base.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: November 5, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Minjong Kim, Seonggil Park, Jaebeom Park, Jung-soo Yoon, Keeyoung Jun, Choongrae Cho, Jongwon Hong
  • Patent number: 10438833
    Abstract: A substrate support includes an inner portion arranged to support a substrate, a lift ring surrounding the inner portion, the lift ring arranged to support an outer edge of the substrate, and a controller configured to control an actuator to adjust a height of the lift ring relative to the inner portion by selectively raising and lowering at least one of the lift ring and the inner portion of the substrate support. To adjust the height of the lift ring, the controller selectively adjusts the height of the lift ring to a transfer height for transfer of the substrate to the lift ring and retrieval of the substrate from the lift ring, and adjusts the height of the lift ring to a processing height for processing of the substrate.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: October 8, 2019
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Brian Severson, Ivelin Angelov, James Eugene Caron
  • Patent number: 10347475
    Abstract: A holding assembly for retaining a deposition ring about a periphery of a substrate support in a substrate processing chamber, the deposition ring comprising a peripheral recessed pocket with a holding post. The holding assembly comprises a restraint beam capable of being attached to the substrate support, the restraint beam comprising two ends, and an anti-lift bracket. The anti-lift bracket comprises a block comprising a through-channel to receive an end of a restraint beam, and a retaining hoop attached to the block, the retaining hoop sized to slide over and encircle the holding post in the peripheral recessed pocket of the deposition ring.
    Type: Grant
    Filed: September 7, 2015
    Date of Patent: July 9, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kathleen Scheible, Michael Allen Flanigan, Goichi Yoshidome, Adolph Miller Allen, Christopher Pavloff
  • Patent number: 10157764
    Abstract: A thermal shield is disclosed that may be disposed between a heated electrostatic chuck and a base. The thermal shield comprises a thermal insulator, such as a polyimide film, having a thickness of between 1 and 5 mils. The polyimide film is coated on one side with a layer of reflective material, such as aluminum. The layer of reflective material may be between 30 and 100 nanometers. The thermal shield is disposed such that the layer of reflective material is closer to the chuck. Because of the thinness of the layer of reflective material, the thermal shield does not retain a significant amount of heat. Further, the temperature of the thermal shield remains far below the glass transition temperature of the polyimide film.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: December 18, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Dale K. Stone, David J. Chipman
  • Patent number: 10157768
    Abstract: An apparatus of an embodiment includes: a processing-chamber; a susceptor capable of supporting a substrate, the susceptor including a first member having an opening in a central portion, and a second member covering the opening; a support configured to support and rotate the susceptor in the processing-chamber; and a lift disposed in the support, and capable of moving up and down at least one of the first member and the second member, wherein the support is capable of rotating the susceptor to have predefined phases with respect to the lift, and when the lift moves up, the lift is brought into contact with the first member if the susceptor is in a first phase, and the lift is brought into contact with the second member if the susceptor is in a second phase that is different from the first phase.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: December 18, 2018
    Assignee: NuFlare Technology, Inc.
    Inventors: Yoshikazu Moriyama, Naohisa Ikeya, Kunihiko Suzuki
  • Patent number: 10056284
    Abstract: A method of manufacturing an electrostatic chuck includes bonding an electrostatic puck to a metal base plate, wherein the electrostatic puck has an electrode embedded in the electrostatic puck. The method further includes subsequently polishing a surface of the electrostatic puck to a flatness of below 10 microns and an average surface roughness of approximately 2-6 micro-inches. The method further includes subsequently forming surface features on a surface of the electrostatic puck, the surface features comprising mesas and a sealing band around a perimeter of the electrostatic puck.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: August 21, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Vijay D. Parkhe, Kadthala Ramaya Narendrnath
  • Patent number: 10020218
    Abstract: A method of manufacturing an electrostatic chuck includes polishing a surface of a ceramic body of the electrostatic chuck to produce a polished surface and depositing a ceramic coating onto the polished surface of the ceramic body to produce a coated ceramic body. The method further includes disposing a mask over the coated ceramic coating, the mask comprising a plurality of elliptical holes and depositing a ceramic material through the plurality of elliptical holes of the mask to form a plurality of elliptical mesas on the coated ceramic body, wherein the plurality of elliptical mesas have rounded edges. The mask is then removed from the coated ceramic body and the plurality of elliptical mesas are polished.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: July 10, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Wendell Glenn Boyd, Jr., Vijay D. Parkhe, Teng-Fang Kuo, Zhenwen Ding
  • Patent number: 9881772
    Abstract: Circuits, methods, chambers, systems, and computer programs are presented for processing wafers. A wafer processing apparatus includes top and bottom electrodes inside a processing chamber; a first, second, third, and fourth radio frequency (RF) power sources; and one or more resonant circuits. The first, second, and third RF power sources are coupled to the bottom electrode. The top electrode may be coupled to the fourth RF power source, to electrical ground, or to the one or more resonant circuits. Each of the one or more resonant circuits, which are coupled between the top electrode and electrical ground, include a tune-in element operable to vary a frequency-dependent impedance presented by the resonant circuit. The wafer processing apparatus is configurable to select the RF power sources for wafer processing operations, as well as the connections to the top electrode in order to provide plasma and etching uniformity for the wafer.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: January 30, 2018
    Assignee: Lam Research Corporation
    Inventors: Alexei Marakhatanov, Rajinder Dhindsa
  • Patent number: 9787222
    Abstract: Provided is an electrostatic attraction apparatus in which a first insulating layer is formed on a base in an electrostatic chuck. A first portion of the first insulating layer extends on a first face of the base and a second portion of the first insulating layer extends on at least a portion of a second face of the base. An attraction electrode is formed on the first portion of the first insulating layer. A second insulating layer is formed on the first portion of the first insulating layer and the attraction electrode. A conductor pattern extends from the attraction electrode and provides a power supply terminal on the second portion of the first insulating layer. A contact part of a terminal member urged by an urging unit is in contact with the power supply terminal. The terminal member is connected with a wiring line connected to a supply power.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: October 10, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Kaoru Yamamoto, Shinji Orimoto, Naoyuki Suzuki
  • Patent number: 9779196
    Abstract: Systems and methods for segmenting an impedance matching model are described. One of the methods includes receiving the impedance matching model. The impedance matching model represents an impedance matching circuit, which is coupled to an RF generator via an RF cable and to a plasma chamber via an RF transmission line. The method further includes segmenting the impedance matching model into two or more modules of a first set. Each module includes a series circuit and a shunt circuit. The shunt circuit is coupled to the series circuit. The series circuit of the first module is coupled to a cable model and the series circuit of the second module is coupled to an RF transmission model. The series circuit and the shunt circuit of the first module are coupled to the series circuit of the second module. The shunt circuit of the second module is coupled to the RF transmission model.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: October 3, 2017
    Assignee: Lam Research Corporation
    Inventors: John C. Valcore, Jr., Arthur M. Howald
  • Patent number: 9725824
    Abstract: A graphite wafer carrier for LED epitaxial wafer processes, having a plurality of wafer pocket profiles above the carrier for carrying the epitaxial wafer substrate. The inner edge of the wafer pocket profile is a concave step with a plurality of inward-extended support portions; and also has a graphite wafer carrier edge and an axle hole at the center of the graphite wafer carrier. The pocket profiles of different quantities and sizes can be arranged on the basis of different process parameters. The disclosed structure can reduce or eliminate airflow interference and improve the wafer edge yield.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: August 8, 2017
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Hsiang-Pin Hsieh, Qi Nan, Lei Pan
  • Patent number: 9678445
    Abstract: A substrate holder for a lithographic apparatus has a planarization layer provided on a surface thereof. The planarization layer provides a smooth surface for the formation of an electronic component such as a thin film electronic component. The planarization layer may be provided in multiple sub layers. The planarization layer may smooth over roughness caused by removal of material from a blank to form burls on the substrate holder.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: June 13, 2017
    Assignee: ASML Netherlands B.V.
    Inventors: Raymond Wilhelmus Louis Lafarre, Nicolaas Ten Kate, Nina Vladimirovna Dziomkina, Yogesh Pramod Karade
  • Patent number: 9666414
    Abstract: Methods and process chambers for etching of low-k and other dielectric films are described. For example, a method includes modifying portions of the low-k dielectric layer with a plasma process. The modified portions of the low-k dielectric layer are etched selectively over a mask layer and unmodified portions of the low-k dielectric layer. Etch chambers having multiple chamber regions for alternately generating distinct plasmas are described. In embodiments, a first charge coupled plasma source is provided to generate an ion flux to a workpiece in one operational mode, while a secondary plasma source is provided to provide reactive species flux without significant ion flux to the workpiece in another operational mode. A controller operates to cycle the operational modes repeatedly over time to remove a desired cumulative amount of the dielectric material.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: May 30, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Dmitry Lubomirsky, Srinivas Nemani, Ellie Yieh, Sergey G. Belostotskiy
  • Patent number: 9557656
    Abstract: A stage apparatus includes a first movable stage that moves while holding an article, an electrical contact that is provided on the first movable stage, and a grounding device that comes into contact with the electrical contact and grounds the first movable stage when the article is not processed.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: January 31, 2017
    Assignee: NIKON CORPORATION
    Inventor: Yuichi Shibazaki
  • Patent number: 9478447
    Abstract: Embodiments of substrate supports having a wire mesh plasma containment are provided herein. In some embodiments, a substrate support may include a plate comprising a first surface, an opposing second surface, a thickness bounded by the first and second surfaces, and a first perimetrical surface; a first heater element disposed between the first and second surfaces; a wire mesh disposed between the first and second surfaces; a ground connector mounted to a surface of the plate; at least one electrical connection between the wire mesh and the ground connector; and an elongate shaft comprising a first end and an opposite second end, wherein the plate second surface is mounted to the first end of the shaft.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: October 25, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Olkan Cuvalci, Gwo-Chuan Tzu
  • Patent number: 9410753
    Abstract: A method which changes the temperature control range of a heater of a substrate processing apparatus. The temperature control range of a heater is changed or extended by changing the flow rate of the coolant flowing through a coolant channel from a first flow rate to a second flow rate which is smaller than the first flow rate, to change a first thermal conductivity of a mounting table to a second thermal conductivity which is smaller than the first thermal conductivity. The upper limit of the temperature control range is lower than the heat resistant temperature of a material of an adhesive of the mounting table.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: August 9, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Toshiyuki Makabe, Taketoshi Okajo
  • Patent number: 9329497
    Abstract: A substrate table comprising a base and a plurality of burls that project from the base, wherein an upper surface of the burls is provided with a multilayer coating.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: May 3, 2016
    Assignee: ASML Netherlands B.V.
    Inventors: Bensely Albert, Rene Theodorus Petrus Compen
  • Patent number: 9318349
    Abstract: A plasma processing system for processing a substrate is described. The plasma processing system includes a bottom piece including a chuck configured for holding the substrate. The plasma processing system also includes an induction coil configured to generate an electromagnetic field in order to create a plasma for processing the substrate; and an optimized top piece coupled to the bottom piece, the top piece further configured for a heating and cooling system. Wherein, the heating and cooling system is substantially shielded from the electromagnetic field by the optimized top piece, and the optimized top piece can substantially be handled by a single person.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: April 19, 2016
    Assignee: Lam Research Corporation
    Inventors: Leonard J. Sharpless, Keith Comendant
  • Patent number: 9177846
    Abstract: Provided is a holding stage structure which holds a substrate and disposed in a process chamber that is vacuum-evacuatable and allows a predetermined process to be performed on the substrate therein. The holding stage structure includes: a holding stage body on which the substrate is placed; an elevation pin mechanism lowering the substrate on the holding stage body or raising the substrate from the holding stage body; and a stepped portion formed on the holding stage body so that a peripheral portion of a rear surface of the substrate placed on the holding stage body is exposed to a processing gas supplied into the process chamber.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: November 3, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kohei Kawamura, Yasuo Kobayashi, Toshihisa Nozawa, Kiyotaka Ishibashi
  • Patent number: 9153465
    Abstract: A substrate stage for mounting a substrate thereon includes a peripheral stage member on which a peripheral substrate portion of the substrate may be mounted, the peripheral substrate portion controlling a temperature of the peripheral substrate portion, a central stage member on which a central substrate portion of the substrate may be mounted, the central substrate portion controlling a temperature of the central substrate portion, and a support base that supports the peripheral stage member and the central stage member. A gap is formed between the peripheral stage member and the central stage member to keep the peripheral stage member and the central stage member from coming in contact with each other.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: October 6, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masaya Odagiri, Yusuke Muraki, Jin Fujihara
  • Patent number: 9133546
    Abstract: A system for forming a thin film on a substrate uses a plasma to activate at least one gaseous precursor in a plasma generator fluidly coupled with a reaction space. The plasma generator is operative to generate a plasma from at least a portion of the precursor gas with at least one pair of plasma electrodes, one plasma electrode having a non-native electrically conductive adlayer exhibiting property characteristics that cause the adlayer to be substantially conserved and chemically active with at least one of the gases present within the plasma generation region.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: September 15, 2015
    Assignee: LOTUS APPLIED TECHNOLOGY, LLC
    Inventors: Eric R. Dickey, Bryan Larson Danforth, Masato Kon
  • Patent number: 9116097
    Abstract: An ultrasound inspection system includes a part fixture at least partially submerged in a liquid bath. The part fixture includes at least one surface with a plurality of elongated protrusions extending from the surface and a fluid flow ingress aperture in the surface. A part to be inspected is secured on the fixture by circulating the liquid through a channel in the fixture such that the liquid flows around the part and into the ingress aperture. The part engages and is supported by the elongated protrusions, wherein the elongated protrusions are configured such that they do not interfere with the ultrasonic testing performed on the part.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: August 25, 2015
    Assignee: Spirit AeroSystems, Inc.
    Inventors: David Michael Gayle, Adam Joseph Donar
  • Patent number: 9108322
    Abstract: A system and method for monitoring forces on a substrate lifting apparatus. The system includes a platen cartridge with a platen and a movable lifting portion. The movable lifting portion includes a plurality of lifting arms coupled to a plurality of lift pins. A plurality of force sensing elements are associated with respective ones of the plurality of lifting arms and the plurality of lift pins. A controller receives signals from the plurality of force sensing elements, correlates the signals to respective forces applied to said plurality of lift pins. The correlated forces may indicate to the controller that an error condition exists, such as a stuck wafer, a broken wafer, a mis-positioned wafer, or a mechanical malfunction.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: August 18, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Richard V. Chisholm, Scott E. Peitzsch, Michael Esposito, Robert A. Poitras, Steven M. Anella, Daniel A. Hall, Scott C. Holden, Roger B. Fish
  • Patent number: 9096926
    Abstract: Embodiments of the invention generally provide a process kit for use in a physical deposition chamber (PVD) chamber. In one embodiment, the process kit provides adjustable process spacing, centering between the cover ring and the shield, and controlled gas flow between the cover ring and the shield contributing to uniform gas distribution, which promotes greater process uniformity and repeatability along with longer chamber component service life.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: August 4, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Lara Hawrylchak, Kirankumar Savandaiah
  • Patent number: 9093261
    Abstract: A method of manufacturing a semiconductor device includes processing a semiconductor substrate using a plasma etching apparatus provided with a processing chamber. The semiconductor substrate has an uneasily-etched material formed thereabove and at least an upper layer film formed above the uneasily-etched material. The method includes etching the upper layer film after loading the semiconductor substrate into the processing chamber; forming a lift-off layer along an inner wall of the processing chamber with the semiconductor substrate loaded in the processing chamber; etching the uneasily-etched material and causing deposition of a reactive product of the uneasily-etched material along the lift-off layer; and cleaning, by removing the reactive product by removing the lift-off layer, the inner wall of the processing chamber after the semiconductor substrate is unloaded from the plasma etching apparatus.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: July 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiyuki Sasaki, Mitsuhiro Omura, Kazuhito Furumoto
  • Patent number: 9090046
    Abstract: To manufacture a ceramic article, a ceramic body comprising Al2O3 is roughened to a roughness of approximately 140 micro-inches (?in) to 240 ?in. The ceramic body is subsequently cleaned and then coated with a ceramic coating. The ceramic coating comprises a compound of Y4Al2O9 (YAM) and a solid solution of Y2-xZrxO3. The ceramic coating is then polished.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: July 28, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Jennifer Y. Sun, Biraja P. Kanungo, Ren-Guan Duan, Sumit Agarwal, Dmitry Lubomirsky
  • Publication number: 20150147869
    Abstract: Method and Apparatus so configured for the fabrication of three-dimensional integrated devices. A crystalline substrate within an area of a donor semiconductor wafer is etched. The substrate side is located opposite a device layer and has a buried insulating layer and a substrate thickness. The etching removes at least a substantial portion of the crystalline substrate within the area such that the device layer and the buried insulating layer in the area is to conform to a pattern specific topology on an acceptor surface. The donor semiconductor wafer is supported with a supporting structure that allows the donor semiconductor wafer to flexibly conform to the pattern specific topology within at least a portion of the area after the etching to enable conformality and reliable bonding to the device surfaces of an acceptor wafer to form a three dimensional integrated device.
    Type: Application
    Filed: January 15, 2015
    Publication date: May 28, 2015
    Applicant: International Business Machines Corporation
    Inventors: Douglas C. LA TULIPE, JR., Sampath PURUSHOTHAMAN, James VICHICONTI
  • Patent number: 9039866
    Abstract: The present invention relates to a method of manufacturing a web of a plurality of conductive structures which may be used for example to produce an antenna, electronic circuit, photovoltaic module or the like. The method involved simultaneously patterning at least one pattern in a conductive layer using a plurality of registration marks. The registration marks serve to align and guide the creation of the plurality of conductive structures. Optical brighteners may also be utilized within the adhesive layer and the registration marks of the present invention in order to detect the location where conductive structures are to be placed.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: May 26, 2015
    Assignee: Avery Dennison Corporation
    Inventors: Ian J. Forster, Christian K. Oelsner, Robert Revels, Benjamin Kingston, Peter Cockerell, Norman Howard
  • Publication number: 20150140757
    Abstract: Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming preliminary trenches adjacent opposing sides of an active region. The method includes forming etching selection regions in portions of the active region that are exposed after forming the preliminary trenches. The method includes forming trenches by removing the etching selection regions. Moreover, the method includes forming a stressor in the trenches. Related apparatuses are also provided.
    Type: Application
    Filed: July 3, 2014
    Publication date: May 21, 2015
    Inventors: Jun-Suk Kim, Kee-Moon Chun
  • Patent number: 9028613
    Abstract: A rotating type thin film deposition apparatus having an improved structure that allows continuous deposition, and a thin film deposition method used by the rotating type thin film deposition apparatus are provided. The rotating type thin film deposition apparatus includes a deposition device; a circulation running unit that runs a deposition target on a circulation track via a deposition region of the deposition device; and a support unit that supports the deposition target and moves along the circulation track. Thin layers can be precisely and uniformly formed on the entire surface of a deposition target, and since deposition is performed while a plurality of deposition targets move along a caterpillar track, a working speed is faster compared to a method involving a general reciprocating motion, and the size of the thin film deposition apparatus can be reduced.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: May 12, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin-Kwang Kim, Sang-Joon Seo, Seung-Hun Kim
  • Patent number: 9028765
    Abstract: Porogen accumulation in a UV-cure chamber may be reduced by removing outgassed porogen by flowing a purge gas across a window through which a wafer is exposed to UV light. Porogens in the purge gas stream may, as they flow through the chamber and into an exhaust baffle, deposit on surfaces within the chamber, including on the exhaust baffle. The exhaust baffle may have particular features that cause such porogen deposition to be more uniformly distributed across the exhaust baffle, thus reducing the amount of time that may be required to fully clean the baffle of accumulated porogens during a cleaning process.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: May 12, 2015
    Assignee: Lam Research Corporation
    Inventors: Lisa Marie Gytri, Stephen Yu-Hong Lau, James Forest Lee
  • Patent number: 9028646
    Abstract: A bonded assembly to reduce particle contamination in a semiconductor vacuum chamber such as a plasma processing apparatus is provided, including an elastomeric sheet adhesive bond between mating surfaces of a component and a support member to accommodate thermal stresses. The elastomeric sheet comprises a silicone adhesive to withstand a high shear strain of ?800% at a temperature range between room temperature and 300° C. such as heat curable high molecular weight dimethyl silicone with optional fillers. The sheet form has bond thickness control for parallelism of bonded surfaces. The sheet adhesive may be cut into pre-form shapes to conform to regularly or irregularly shaped features, maximize surface contact area with mating parts, and can be installed into cavities. Installation can be manually, manually with installation tooling, or with automated machinery. Composite layers of sheet adhesive having different physical properties can be laminated or coplanar.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: May 12, 2015
    Assignee: Lam Research Corporation
    Inventors: Dean J. Larson, Tom Stevenson, Victor Wang