Nitride Compound Containing Patents (Class 156/89.15)
  • Patent number: 11943845
    Abstract: A heater includes an aluminum nitride (AlN) substrate and a heating layer. The heating layer is made from a molybdenum material and is bonded to the AlN substrate via transient liquid phase bonding. The heater can also include a routing layer and a plurality of first conductive vias connecting the heating layer to the routing layer. The routing layer and the plurality of first conductive vias can be made from the molybdenum material and at least one of the routing layer and the plurality of first conductive vias are bonded to the AlN substrate via a transient liquid phase bond. A plurality of second conductive vias connecting the routing layer to a surface of the AlN substrate can be included and the plurality of second conductive vias are made of the molybdenum material and can be bonded to the AlN substrate via a transient liquid phase bond.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: March 26, 2024
    Assignee: WATLOW ELECTRIC MANUFACTURING COMPANY
    Inventors: Patrick Margavio, Todd Brooke, Kurt English
  • Patent number: 11802087
    Abstract: The present invention discloses a dielectric ceramic formula enabling one to obtain a multilayer ceramic capacitor by alternatively stacking the ceramic dielectric layers and base metal internal electrodes. The dielectric ceramic composition comprises a primary ingredient: [(Na1-xKx)sA1-s]m[(Nb1-yTay)uB1vB2w)]O3 wherein: A, B1, B2, x, y, s, u, v, w and m are defined.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: October 31, 2023
    Assignee: KEMET Electronics Corporation
    Inventors: Hanzheng Guo, Abhijit Gurav
  • Patent number: 11462430
    Abstract: The present invention provides a ceramic-circuit composite structure, comprising: a ceramic plate with a supporting surface that has a recessed supporting portion; a curved-surface circuit buried in the ceramic plate; and a power supply module electrically connected to the curved-surface circuit. Moreover, the present invention provides a method for making the ceramic-circuit composite structure. The ceramic-circuit composite structure of the present invention makes use of the curved-surface circuit to improve the prior art problem that a planar circuit has less static electricity or lower temperature at the center than in the peripheral region.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: October 4, 2022
    Assignee: HONG CHUANG APPLIED TECHNOLOGY CO., LTD
    Inventors: Yan-Kai Zeng, Bai-Xuan Jiang
  • Patent number: 11262524
    Abstract: A lens structure includes a lens cone, at least one lens and an acrylate adhesive. The lens cone includes at least one contacting structure. The lens is disposed within the lens cone and abuts against the contacting structure. The acrylate adhesive covers an interface between the lens cone and the lens, wherein a coverage area of the acrylate adhesive accounts for more than 70% of a surface area of a side surface of the lens.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: March 1, 2022
    Assignee: Rays Optics Inc.
    Inventors: Chen-Cheng Lee, Yu-Hua Huang, Chih-Wei Chang, Tzu-Lun Wang
  • Patent number: 10754205
    Abstract: An electronic device is disclosed. The electronic device may include an enclosure that includes a metal band and a wall. The electronic device may further include a filler compound positioned in an opening of the metal band, where a split between two sidewall components defines the opening. The filler compound provides an RF communication path through the enclosure. In order to reduce or prevent liquid ingress into the enclosure, the electronic device may include a sealing compound that infused into the opening between the filler compound and the sidewall components, thereby providing a seal. The infusion process including placing the metal band (with the filler compound) in a chamber, providing a vacuum to remove air between the metal band and the filler compound, and subsequently providing a positive pressure to force the sealing compound between the metal band and the filler compound. The sealing compound may include an adhesive.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: August 25, 2020
    Assignee: Apple Inc.
    Inventors: Burak Metin, Logan M. Ames, HaiLong Wang, Ricky C. Lee, Duy P. Le
  • Patent number: 10485091
    Abstract: High thermal performance microelectronic modules containing sinter-bonded heat dissipation structures are provided, as are methods for the fabrication thereof. In various embodiments, the method includes the steps or processes of providing a module substrate, such as a circuit board, including a cavity having metallized sidewalls. A sinter-bonded heat dissipation structure is formed within the cavity. The sintered-bonded heat dissipation structure is formed, at least in part, by inserting a prefabricated thermally-conductive body, such as a metallic (e.g., copper) coin into the cavity. A sinter precursor material (e.g., a metal particle-containing paste) is dispensed or otherwise applied into the cavity and onto surfaces of the prefabricated thermally-conductive body before, after, or concurrent with insertion of the prefabricated thermally-conductive body.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: November 19, 2019
    Assignee: NXP USA, Inc.
    Inventors: Jaynal A. Molla, Lakshminarayan Viswanathan, Elie A. Maalouf, Geoffrey Tucker
  • Patent number: 10104759
    Abstract: Methods for producing high thermal performance microelectronic modules containing sinter-bonded heat dissipation structures. In one embodiment, the method includes embedding a sinter-bonded heat dissipation structure in a module substrate. The step of embedding may entail applying a sinter precursor material containing metal particles into a cavity provided in the module substrate, and subsequently sintering the sinter precursor material at a maximum processing temperature less than a melt point of the metal particles to produce a sintered metal body bonded to the module substrate. A microelectronic device and a heatsink are then attached to the module substrate before, after, or concurrent with sintering such that the heatsink is thermally coupled to the microelectronic device through the sinter-bonded heat dissipation structure. In certain embodiments, the microelectronic device may be bonded to the module substrate at a location overlying the thermally-conductive structure.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: October 16, 2018
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Elie A. Maalouf, Geoffrey Tucker
  • Patent number: 9897772
    Abstract: Disclosed is a fixing module for fixing an optical system to an optical apparatus, including a coupling unit having a plate to couple to the apparatus, the coupling unit having a first penetrating space at a central portion thereof and a protruding portion protruded downwards from the plate; a first fixing unit combinable with the coupling unit and having a receiving space including a thermosetting resin such that the protruding portion is fixed into the thermosetting resin; and a second fixing unit combinable with the first fixing unit and having a second penetrating space communicating with the first penetrating space, such that the optical system can penetrate through the first and the second penetrating spaces and be fixed by the second fixing unit.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: February 20, 2018
    Assignees: SAMSUNG ELECTRONICS CO., LTD., SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang-Joon Hong, Hi-Kuk Lee, Sang-Don Jang
  • Patent number: 9722105
    Abstract: Approaches for forming solar cells with a converted seed layer as a buffer material and the resulting solar cells are described. In an example, a method of fabricating a solar cell includes converting regions of a seed layer disposed on a plurality of p-n junctions of the solar cell to form a pattern of interdigitated converted regions. The converted regions are configured to electrically insulate non-converted regions of the seed layer from each other and provide a barrier to a laser that is, in fabricating the solar cell, directed towards the seed layer such that the barrier substantially avoids degradation of at least the plurality of p-n junctions from the laser.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: August 1, 2017
    Assignees: SunPower Corporation, Total Marketing Services
    Inventors: Matthieu Moors, Thomas Pass
  • Patent number: 9693466
    Abstract: The present invention is to provide a wiring board which can prevent whitening. The wiring board is made of a fiber reinforced resin plate, and has a through hole and a whitening prevention portion. The whitening prevention portion is made only with matrix resin forming the fiber reinforced resin plate, and is integrally formed in the fiber reinforced resin plate. Furthermore, the whitening prevention portion is arranged around the through hole.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: June 27, 2017
    Assignee: Yazaki Corporation
    Inventors: Akira Harao, Mototatsu Matsunaga, Yusuke Takagi, Akinori Saneto
  • Patent number: 9176399
    Abstract: To improve the bonding of two parts (401, 403) of a component (400) of an EUV or UV lithography apparatus such that the probability of occurrence of additional stress over time in the bonded parts (401, 403) is lessened, a component (400) of an EUV or UV lithography apparatus comprising two parts (401, 403) bonded to each other by adhesive material (405) is proposed, wherein the adhesive material (405) is coated with a protective layer (407) insulating the adhesive material (405) from the surrounding gas environment.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: November 3, 2015
    Assignee: Carl Zeiss SMT GmbH
    Inventor: Hin Yiu Anthony Chung
  • Patent number: 9090042
    Abstract: In one particular embodiment, a method for making a fiber-reinforced, composite article having an internal passageway includes providing a layup tool, fiber placing a base layup onto the layup tool, and generating a groove in the base layup. The method further includes placing a mandrel in the groove, fiber placing a top layup onto the base layup and the mandrel, curing the base layup and the top layup, and removing the mandrel from the base layup and the top layup. In another particular embodiment, the mandrel is replaced with a non-removable tube.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: July 28, 2015
    Assignee: Textron Innovations Inc.
    Inventors: David A. Elliott, Charles J. Kilmain, Sherman S. Lin, Ron Measom, Walter Riley
  • Patent number: 7269897
    Abstract: A manufacturing process of a stacked semiconductor device, comprising the following steps: integrating a plurality of electronic devices in a plurality of active areas realized in a semiconductor wafer; distributing an adhesive layer on active areas, splitting the semiconductor wafer into a plurality of first dies, each one comprising at least one of the active areas; mounting the plurality of first dies, which are already equipped with the adhesive layer, on a support; and mounting a plurality of second dies on the adhesive layer.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: September 18, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giovanni Frezza
  • Patent number: 7185421
    Abstract: The present invention has an object to provide a producing method and producing apparatus of multilayered printed-circuit board that has eliminated the resin flow and resolved the problems of board thickness discrepancy and misregistration. A producing method of multilayered printed-circuit board, comprising steps of stacking up a laminated sheet covered with conductive foil or conductor for outer layer, a prepreg and a laminated sheet covered with conductor for inner layer and, thereafter, setting the prepreg by pressurizing/heating, wherein, before conducting the pressurizing/heating, gas is sprayed to the surface of the laminated shoot covered with conductive foil or conductor for outer layer, a prepreg and a laminated sheet covered with conductor for inner layer to eliminate impurities from the surface.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: March 6, 2007
    Assignees: Kabushiki Kaisha Daishodenshi
    Inventors: Tadahiro Ohmi, Hidetoshi Murakami
  • Patent number: 7140085
    Abstract: A capacitive vacuum measuring cell includes first and second ceramic housing bodies (1, 4) joined by an edge seal (3). A thin ceramic membrane (2) is supported between first and second housing bodies (1, 4) by the edge seal (3) at a small distance from the first housing body (1) creating a reference vacuum chamber (25) therebetween. An electrically conductive material (7) coats opposing surfaces of the first housing body (1) and the membrane (2) to form a capacitor. A measurement vacuum chamber (26) is provided between the membrane (2) and the second housing body (4). A port (5) communicates with the second housing body (4) to connect the measurement vacuum chamber (26) of the measuring cell to the medium to be measured. The membrane (2) is made from an Al2O3 slurry that is sintered in a first heating step, cooled, and then reheated to smooth the membrane.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: November 28, 2006
    Assignee: Inficon GmbH
    Inventors: Per Bjoerkman, Ray Olsson
  • Patent number: 6949156
    Abstract: A monolithic self-constrained green body tape for use in low temperature ceramic co-firing is provided. The tape contains at least two layers: one low temperature ceramic layer containing particles of a glass, a ceramic, and an organic binder, and a self-constraining layer containing a refractory ceramic and a wetting agent for the glass in the first layer. When the tape is fired at a sintering temperature of the low temperature ceramic layer, densification occurs in the z (thickness) direction, but essentially no shrinkage (less than about 1%) occurs in the x-y planes. A method for forming a multilayer green body tape using simultaneous wet on wet ceramic slurry deposition is also provided. A dense, monolithic, low temperature, co-fired, self-constrained, multicomponent structure is also provided. The structure contains at least two multilayer ceramic substrates having electronic circuit components mounted thereon or therein.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: September 27, 2005
    Assignee: Heraeus Incorporated
    Inventors: Frans P. Lautzenhiser, Edmar M. Amaya, J. Thomas Hochheimer
  • Patent number: 6900073
    Abstract: An apparatus for flattening sintered ceramic electronic packaging substrates having opposing faces with undesired camber interleaves the substrates with spacers. At least one heating zone includes a heat transfer medium movable toward and away from the stack of interleaved ceramic substrates and spacers to apply a desired rate of heat by direct contact with or close proximity to sides of the stack. A plunger applies pressure to the stack in a direction normal to the faces of the substrates. At least one cooling zone includes a heat transfer medium movable toward and away from the stack to remove heat introduced in the heating zone by direct contact with or close proximity to sides of the stack. A reducing gas supply is operatively connected to the at least one heating zone and at least one cooling zone to supply gas to maintain a controlled reducing atmosphere within the apparatus.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: May 31, 2005
    Assignee: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Renee L. Weisman
  • Publication number: 20040159390
    Abstract: A monolithic self-constrained green body tape for use in low temperature ceramic co-firing is provided. The tape contains at least two layers: one low temperature ceramic layer containing particles of a glass, a ceramic, and an organic binder, and a self-constraining layer containing a refractory ceramic and a wetting agent for the glass in the first layer. When the tape is fired at a sintering temperature of the low temperature ceramic layer, densification occurs in the z (thickness) direction, but essentially no shrinkage (less than about 1%) occurs in the x-y planes. A method for forming a multilayer green body tape using simultaneous wet on wet ceramic slurry deposition is also provided. A dense, monolithic, low temperature, co-fired, self-constrained, multicomponent structure is also provided. The structure contains at least two multilayer ceramic substrates having electronic circuit components mounted thereon or therein.
    Type: Application
    Filed: February 13, 2004
    Publication date: August 19, 2004
    Applicant: Heraeus Incorporated
    Inventors: Frans P. Lautzenhiser, Edmar M. Amaya, J. Thomas Hochheimer
  • Patent number: 6723192
    Abstract: A composite substrate in which the surface of the insulating layer is not influenced by the electrode layer and which requires neither a grinding process nor a sol-gel process, is easy to produce and can provide a thin-film EL device having a high display quality when used therein; a thin-film EL device using the substrate; and a production process for the device. The thin-film EL device is produced by forming a luminescent layer, other insulating layer and other electrode layer successively on a composite substrate comprising a substrate; an electrode layer embedded in the substrate in such a manner that the electrode layer and the substrate are in one plane; and an insulating layer formed on the surface of a composite comprising the substrate and the electrode layer.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: April 20, 2004
    Assignee: TDK Corporation
    Inventors: Katsuto Nagano, Taku Takeishi, Suguru Takayama, Takeshi Nomura, Yukie Nakano, Daisuke Iwanaga
  • Patent number: 6660116
    Abstract: A capacitive filtered feedthrough assembly is formed in a solid state manner to employ highly miniaturized conductive paths each filtered by a discoid capacitive filter embedded in a capacitive filter array. A non-conductive, co-fired metal-ceramic substrate is formed from multiple layers that supports one or a plurality of substrate conductive paths and it is brazed to a conductive ferrule, adapted to be welded to a case, using a conductive, corrosion resistant braze material. The metal-ceramic substrate is attached to an internally disposed capacitive filter array that encloses one or a plurality of capacitive filter capacitor active electrodes each coupled to a filter array conductive path and at least one capacitor ground electrode. Each capacitive filter array conductive path is joined with a metal-ceramic conductive path to form a feedthrough conductive path.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: December 9, 2003
    Assignee: Medtronic, Inc.
    Inventors: William D. Wolf, James Strom, Craig L. Wiklund, Mary A. Fraley, Lynn M. Seifried, James E. Volmering, Patrick F. Malone, Samuel F. Haq
  • Patent number: 6627020
    Abstract: A method to control the post sinter distortion of free sintered multilayer ceramic substrates by placing a discrete non-densifying structure in the green ceramic laminate prior to sintering. One or several discrete non-densifying structures are placed on one or more ceramic greensheets which are then stacked and laminated to form a green ceramic laminate. The laminate is then sintered and the discrete non-densifying structure will locally control the dimensions of the free sintered multilayer ceramic substrate. The method can be used to control post sinter dimensions in MLC substrates manufactured as either single or multi-up substrates by placing the discrete non-densifying structure in the active area or in the kerf area between the individual product ups prior to sintering.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, Raschid Jose Bezama
  • Publication number: 20030066587
    Abstract: A susceptor for semiconductor manufacturing equipment obtained by laminating plural aluminum nitride (AlN) ceramic substrates with a high melting point metallic layer and an adhesive layer, and in particular, the aluminum nitride (AlN) ceramic substrate contains a compound of a Group 3a element in an amount of from 0.01 to 1% by weight in terms of the element, and the balance consisting essentially of aluminum nitride (AlN), in which the average particle size of an AlN crystal is from 2 to 5 &mgr;m. The susceptor is prepared by obtaining substrates from a mixture of the material powders through the steps of molding, sintering in a non-oxidizing atmosphere at 1,600 to 2,000° C. and forming into a desired substrate shape, and then laminating a plurality of the thus obtained substrate with a high melting point metallic layer and an adhesive layer inserted between the substrates, firing the laminate in a non-oxidizing atmosphere at 1,500 to 1,700° and finishing the fired laminate.
    Type: Application
    Filed: June 12, 2002
    Publication date: April 10, 2003
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yasuhisa Yushio, Hirohiko Nakata, Masuhiro Natsuhara
  • Patent number: 6506691
    Abstract: A method for high rate silicon nitride deposition at low pressures, including a method of operating a CVD reactor providing a novel combination of wafer temperature, gas flow and chamber pressure resulting in both rapid deposition and a uniform, smooth film surface. According to the method, a wafer is placed in a vacuum chamber wherein a reactant gas flow of silane and ammonia is directed in parallel with the wafer surface via a plurality of temperature controlled gas injectors, the gas being confined to a narrow region above the wafer. The gas is injected at a high velocity, causing the deposition rate to be limited only by the rate of delivery of unreacted gas to the wafer surface and the rate of removal of reaction byproducts. The high velocity gas stream passing across the wafer has the effect of thinning the layer adjacent the wafer surface containing reaction by-products, known as the “boundary layer,” resulting in faster delivery of the desired reactant gas to the wafer surface.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: January 14, 2003
    Assignee: Torrex Equipment Corporation
    Inventors: Robert C. Cook, Daniel L. Brors
  • Patent number: 6495959
    Abstract: An improved cermet for hermetically sealing a discharge vessel in a ceramic discharge lamp where the cermet includes a material having a coefficient of linear expansion which is at least equal to a coefficient of linear expansion of a translucent ceramic, and a material having a coefficient of linear expansion which is smaller than the coefficient of linear expansion of the translucent ceramic, where the cermet has an average coefficient of linear expansion in a range of E±1.0×10−6 (K−1) at a temperature range of 25 to 300° C., where E (K−1) is an average coefficient of linear expansion of said translucent ceramic at a temperature range of 25 to 300° C. In addition, a ceramic discharge lamp utilizing such a cermet.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: December 17, 2002
    Assignee: Ushiodenki Kabushiki Kaisha
    Inventors: Mituru Ikeuchi, Yukiharu Tagawa, Masaki Yoshioka
  • Publication number: 20020066519
    Abstract: A suspension adhesive comprised of a matrix material and a particulate filler material is useful for bonding, sealing, repairing, and modifying ceramic, glass, and powdered metal components. A method for making the suspension adhesive includes the selection of a filler material and a volume percentage of the filler material. Additionally, a matrix material is selected and the filler material is dispersed throughout the matrix material. The suspension adhesive is used to bond and seal components to form, for example, an arc tube for a light source.
    Type: Application
    Filed: December 1, 2000
    Publication date: June 6, 2002
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Daniel Polis, Vishal Gauri
  • Publication number: 20010055703
    Abstract: Electronic packages made with a high area percent coverage of blanket metal may be prone to certain kinds of ceramic defects. In aluminum nitride, these defects may be related to decomposition of the liquid sintering aid. In this experiment, unique additions to the metallization prevented the formation of certain ceramic defects. Our approach involves a unique composition used in an existing process.
    Type: Application
    Filed: May 13, 1999
    Publication date: December 27, 2001
    Inventors: RICHARD A. BATES, CARLA N. CORDERO, BENJAMIN V. FASANO, DAVID B. GOLAND, ROBERT HANNON, LESTER W. HERRON, GREGORY M. JOHNSON, ANDREW REITTER, SUBHASH L. SHINDE, LISA STUDZINSKI
  • Patent number: 6316116
    Abstract: The present invention provides a ceramic circuit board comprising: a ceramic substrate comprising ceramic crystal grains and liquid phase component grains; and a conductive layer to be formed as a circuit integrally formed to the ceramic substrate, wherein the ceramic substrate has a thermal conductivity of 180 W/m·K or more and the ceramic crystal grains have an average grain size of 10 &mgr;m or less. According to the structure described above, there can be provided a ceramic circuit board which has a high thermal conductivity of 180 W/m·K or more, an excellent heat radiating property and a high strength which is capable of reducing crack formation during the assembling and operation of the circuit board, and is capable of reducing short-circuit accident to be occurred in the conductive layer.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: November 13, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Miho Nakamura, Hideki Sato, Keiichi Yano, Nobuyuki Mizunoya, Tadashi Ishii, Seiko Nagano
  • Publication number: 20010023735
    Abstract: A resistance element comprising at least a resistance element body comprised of a ceramic including &bgr;-SIALON of a composition expressed by Si6-zAlzOzN8-z (where, in the formula, z=0.3 to 1.0) and an internal conductor embedded inside the resistance element body, wherein the internal conductor includes a conductor material containing tungsten and carbon and having an atomic ratio of carbon to tungsten of 0.4 to 1.1 and an insulator material and the volume ratio of the insulator material to the conductor material is 0.25 to 1.5. Such a resistance element can be used over a long time under a high temperature environment, has little fluctuation in resistance even with repeated rises and falls between room temperature and a high temperature, can withstand oxidation at a high temperature, and is otherwise superior in durability.
    Type: Application
    Filed: February 20, 2001
    Publication date: September 27, 2001
    Applicant: TDK CORPORATION
    Inventor: Kentaro Sawamura
  • Patent number: 6258192
    Abstract: The present invention relates generally to using at least one green sheet that is originally very thin with the help of at least one thicker green sheet. At least one organic adhesion barrier is used to build the multi-layer ceramic laminates. Basically, the present invention relates to a structure and method for forming laminated structures and more particularly to a structure and method for fabricating multi-density, multi-layer ceramic products using at least one very thin green sheet and/or at least one green sheet with very dense electrically conductive patterns secured to at least one thicker green sheet using at least one organic adhesion barrier.
    Type: Grant
    Filed: February 10, 1999
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventor: Govindarajan Natarajan
  • Patent number: 6245185
    Abstract: Disclosed is a method of making a multilayer ceramic product with thin layers, the method including the steps of: (a) providing a thick ceramic greensheet and a plurality of thin ceramic greensheets; (b) aligning and stacking the thin ceramic greensheet on the thick ceramic greensheet; (c) bonding the thin ceramic greensheet to the thick ceramic greensheet; (d) aligning and stacking one thin ceramic greensheet on the previous thin ceramic greensheet; (e) bonding the thin ceramic greensheet in step (d) to the previous thin ceramic greensheet; and (f) simultaneously forming at least one unfilled via in the stack of thick and thin ceramic greensheets.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: June 12, 2001
    Assignee: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Dinesh Gupta, Govindarajan Natarajan