Micropanel Patents (Class 174/253)
  • Patent number: 10928963
    Abstract: A conductive component includes a first electrode pattern made of metal thin wires, and includes a plurality of first conductive patterns that extend in a first direction alternating with first non-conductive patterns. Each first conductive pattern includes break parts in portions other than intersection parts of the thin metal wires. The conductive component further includes a second electrode pattern made of thin metal wires, and includes a plurality of second conductive patterns that extend in a second direction orthogonal to the first direction and alternating with second non-conductive patterns. Each second conductive pattern includes break parts in portions other than intersection parts of thin metal wires.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: February 23, 2021
    Assignee: FUJIFILM Corporation
    Inventors: Hiroshige Nakamura, Tadashi Kuriki
  • Patent number: 10928959
    Abstract: A touch screen and a manufacturing method thereof, and a touch display device are provided. The touch screen includes a plurality of touch electrodes and a plurality of first touch lines, the plurality of touch electrodes extending in a same direction, each of the plurality of touch electrodes including a mesh structure formed by a plurality of metal lines, and the touch electrode including a first end and extending from the first end, each of the plurality of first touch lines being located between two adjacent touch electrodes and electrically connected with one of the two adjacent touch electrodes, and the first touch line being electrically connected with the first end of the touch electrode.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: February 23, 2021
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Jiawei Xu, Zhi Zhang, Qin Zeng, Xiao Han, Lei Zhang, Tsung Chieh Kuo
  • Patent number: 10910145
    Abstract: There is provided a chip electronic component including: a magnetic body in which an internal coil part is embedded, wherein the internal coil part includes: a first coil pattern part; and a second coil pattern part formed on the first coil pattern part, when a minimum interval between adjacent coil pattern portions in the first coil pattern part is defined as a, and a maximum thickness of each coil pattern portion in the first coil pattern part is defined as b, a?15 ?m and b/a?7 are satisfied.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: February 2, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Dong Jin Jeong
  • Patent number: 10903152
    Abstract: A substrate includes: (1) a first patterned conductive layer, the first patterned conductive layer including a pair of first transmission lines adjacent to each other; and (2) a first reference layer above the pair of first transmission lines, the first reference layer defining an opening, wherein the pair of first transmission lines are exposed to the opening.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: January 26, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yuan-Hsi Chou, Tsun-Lung Hsieh, Chen-Chao Wang
  • Patent number: 10897810
    Abstract: The present invention provides a high speed signal fan-out method for BGA and a PCB using the same. The method comprises: providing a printed circuit board (PCB), providing a plurality of vias and signal traces of the vias on the PCB; and providing back-drilled holes for routing of other signal traces at positions corresponding to the vias. The vias are arranged into a plurality of straight lines from an edge to the center of the PCB. The plurality of straight lines each is horizontal or vertical. The signal traces of the vias in a straight line are arranged from high to low or from low to high with respect to routing positions of the vias, and the back-drilled holes of the plurality of vias are arranged in descending or ascending order corresponding to the depths of the back-drilled holes.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: January 19, 2021
    Assignee: CELESTICA TECHNOLOGY CONSULTANCY (SHANGHAI) CO. LTD
    Inventors: Jiwei Wen, Chenxia Feng, Liang Chen, Lijuan Qu
  • Patent number: 10852880
    Abstract: A touch panel is disclosed herein. In an embodiment, the touch panel includes a substrate with first and second surfaces, a drive electrode facing the first surface, a plurality of touch detection electrodes facing the second surface, and a dummy electrode between adjacent touch detection electrodes. Each touch detection electrode includes a first conductive thin wire extending parallel to the first and second surfaces. The dummy electrode includes a second conductive thin wire extending along the first conductive thin wire. The first conductive thin wire includes a first bent portion and a second bent portion alternately arranged with the first conductive thin wire having a zigzag pattern. The second conductive thin wire includes a third bent portion and a slit that are alternately arranged. The third bent portion is arranged on a virtual straight line formed by virtually connecting the first bent portions of one first conductive thin wire.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: December 1, 2020
    Assignee: Japan Display Inc.
    Inventors: Koji Ishizaki, Hayato Kurasawa, Takeo Koito
  • Patent number: 10653008
    Abstract: A conductive component includes a first electrode pattern made of metal thin wires, and includes a plurality of first conductive patterns that extend in a first direction alternating with first non-conductive patterns. Each first conductive pattern includes break parts in portions other than intersection parts of the thin metal wires. The conductive component further includes a second electrode pattern made of thin metal wires, and includes a plurality of second conductive patterns that extend in a second direction orthogonal to the first direction and alternating with second non-conductive patterns. Each second conductive pattern includes break parts in portions other than intersection parts of thin metal wires.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: May 12, 2020
    Assignee: FUJIFILM Corporation
    Inventors: Hiroshige Nakamura, Tadashi Kuriki
  • Patent number: 10637008
    Abstract: A display device includes a substrate having flexibility, a display region including a plurality of pixels above the substrate, a periphery region on an outer side of the display region above the substrate, a first wiring arranged in the periphery region and extending in a first direction, a first insulation layer above the first wiring, and a second wiring extending in a second direction intersecting the first direction above the first insulation layer, wherein the first wiring includes a first bent part, the second wiring includes a second bent part, and the first bent part overlaps the second wiring and the second bent part overlaps the first wiring in a region where the first wiring and the second wiring intersect.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: April 28, 2020
    Assignee: Japan Display Inc.
    Inventors: Keisuke Harada, Kenta Kajiyama
  • Patent number: 10586764
    Abstract: Semiconductor packages with programmable routing pathways are disclosed. The semiconductor package may have a source trace that may be electrically coupled to two or more different electrical pathways, where any of the electrical pathways may be activated to provide an electrical connection between the source trace and one or more destination nodes. Each of the electrical pathways may have a corresponding metal well with a correspond airgap overlying the metal well, as well as corresponding heating elements. If a particular heating element is energized, the heating element may melt metal in a corresponding metal well and the molten metal may migrate by capillary action into the overlying airgap to complete an electrical connection between the source trace and a destination node.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: March 10, 2020
    Assignee: Intel Corporation
    Inventors: Russell S. Aoki, Dimitrios Ziakas
  • Patent number: 10541083
    Abstract: The present invention relates to a coil unit for a power inductor, a manufacturing method of a coil unit for a power inductor, a power inductor and a manufacturing method of a power inductor. The coil unit includes an insulating substrate and a coil pattern, wherein the coil pattern has a first plating part formed at least one surface among top and bottom surfaces of the insulating substrate, wherein a top side thereof has the shape of a taper and a second plating part formed to encompass the first plating part and to correspond to a shape of the first plating part.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: January 21, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Moon Seok Heo, Chang Ho Lee, Young Woong Song
  • Patent number: 10492295
    Abstract: A conductive component includes: a first electrode pattern which is made of metal thin wires, the first electrode pattern including a plurality of first conductive patterns that extend in a first direction. Each first conductive pattern includes, at least, inside thereof, a sub-nonconduction pattern that is electrically separated from the first conductive pattern. An area A of each first conductive pattern and an area B of each sub-nonconduction patterns satisfy a relation of 5%<B/(A+B)<97%. The conductive component may be included in a conductive sheet and a touch panel to provide a high detection accuracy.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: November 26, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Hiroshige Nakamura, Tadashi Kuriki
  • Patent number: 10475681
    Abstract: A chip accommodation tray for accommodating a plurality of chips includes a holding sheet for holding the chips on a face side thereof, the holding sheet having a tack force and a plurality of first pores formed therethrough, and a frame including a bottom wall supporting a reverse side of the holding sheet, the bottom wall having a plurality of second pores formed therethrough, and side walls erected from the bottom wall in surrounding relation to the holding sheet. Air is supplied from below the bottom wall of the frame through the second pores and the first pores and ejected toward lower surfaces of the chips held on the holding sheet, thereby peeling the chips off the holding sheet.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: November 12, 2019
    Assignee: DISCO CORPORATION
    Inventor: Kazuma Sekiya
  • Patent number: 10452217
    Abstract: According to the invention, there are provided a conductive film which has a mesh-like metal layer composed of metal thin wires and in which visual recognition of the metal thin wires is suppressed and the metal layer has excellent conductive characteristics, a touch panel sensor, and a touch panel. A conductive film according to the invention includes a substrate; a patterned to-be-plated layer which is disposed on the substrate in a mesh pattern and has a functional group interacting with a plating catalyst or a precursor thereof; and a mesh-like metal layer which is disposed on the patterned to-be-plated layer and has a plurality of metal thin wires intersecting each other, an average thickness of the patterned to-be-plated layer is 0.05 to 100 ?m, an average thickness of the metal layer is 0.05 to 0.5 ?m, and an average intersection growing rate at an intersection of metal thin wires of the mesh of the metal layer is 1.6 or less.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 22, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Kohei Higashi, Naoki Tsukamoto, Masataka Satou
  • Patent number: 10442945
    Abstract: A conductive ink includes a conductive nano-metal and a graphene dispersion liquid. The graphene dispersion liquid includes a graphene. A lateral size of the graphene is between approximately 0.1 micron and approximately 1 micron. The graphene has a weight percentage with respect to the conductive ink ranging from approximately 0.2 wt % to approximately 0.5 wt %.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: October 15, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Xujie Zhang, Ming Hu, Ming Zhang, Xiaodong Xie, Kongshuo Zhu, Yu Zhu
  • Patent number: 10433419
    Abstract: A conductive component includes a first electrode pattern made of metal thin wires, and includes a plurality of first conductive patterns that extend in a first direction alternating with first non-conductive patterns. Each first conductive pattern includes break parts in portions other than intersection parts of the thin metal wires. The conductive component further includes a second electrode pattern made of thin metal wires, and includes a plurality of second conductive patterns that extend in a second direction orthogonal to the first direction and alternating with second non-conductive patterns. Each second conductive pattern includes break parts in portions other than intersection parts of thin metal wires.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: October 1, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Hiroshige Nakamura, Tadashi Kuriki
  • Patent number: 10429978
    Abstract: The present disclosure provides a touch panel structure, which includes a conductive channel region and a second dummy metal pattern. The conductive channel region includes a metal mesh and a first dummy metal pattern. The metal mesh is a conductive channel. The first dummy metal pattern is intersecting the metal mesh and has at least one breakpoint at every point of intersection with the metal mesh. The metal mesh is separated from the first dummy metal pattern to be insulated from the first dummy metal pattern at the at least one breakpoint. The second dummy metal pattern is disposed on the both sides of the conductive channel region.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: October 1, 2019
    Assignees: Interface Technology (Chengdu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: Jhe-Wei Zeng, Yue-Feng Yang, Po-Lin Chen, Ju-Xiang Liu, Yen-Heng Huang
  • Patent number: 10303288
    Abstract: A touch panel is disclosed herein. In an embodiment, the touch panel includes a substrate with first and second surfaces, a drive electrode facing the first surface, a plurality of touch detection electrodes facing the second surface, and a dummy electrode between adjacent touch detection electrodes. Each touch detection electrode includes a first conductive thin wire extending parallel to the first and second surfaces. The dummy electrode includes a second conductive thin wire extending along the first conductive thin wire. The first conductive thin wire includes a first bent portion and a second bent portion alternately arranged with the first conductive thin wire having a zigzag pattern. The second conductive thin wire includes a third bent portion and a slit that are alternately arranged. The third bent portion is arranged on a virtual straight line formed by virtually connecting the first bent portions of one first conductive thin wire.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: May 28, 2019
    Assignee: Japan Display Inc.
    Inventors: Koji Ishizaki, Hayato Kurasawa, Takeo Koito
  • Patent number: 10299377
    Abstract: A conductive component includes a first electrode pattern made of metal thin wires, and includes a plurality of first conductive patterns that extend in a first direction alternating with first non-conductive patterns. Each first conductive pattern includes break parts in portions other than intersection parts of the thin metal wires. The conductive component further includes a second electrode pattern made of thin metal wires, and includes a plurality of second conductive patterns that extend in a second direction orthogonal to the first direction and alternating with second non-conductive patterns. Each second conductive pattern includes break parts in portions other than intersection parts of thin metal wires.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: May 21, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Hiroshige Nakamura, Tadashi Kuriki
  • Patent number: 10232591
    Abstract: Provided is a heat insulating window film including a flexible support, and a fibrous metal particles-containing layer containing fibrous metal particles, in which the fibrous metal particles contain silver or an alloy of silver, an average short diameter of the fibrous metal particles is equal to or smaller than 35 nm and an average long diameter is equal to or greater than 5 ?m, and a content per unit area of fibrous metal particles of the fibrous metal particles-containing layer is equal to or greater than 10 mg/m2.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: March 19, 2019
    Assignee: FUJIFILM Corporation
    Inventors: Kentaro Okazaki, Naoharu Kiyoto
  • Patent number: 10203789
    Abstract: The present disclosure provides a touch display panel including a a display substrate, a touch electrode layer, and an insulating layer located between the display substrate and the touch electrode layer. The touch electrode layer includes a touch graph with grooves. The touch display panel further includes a transparent conducting film layer insulated from the touch electrode layer by the insulating layer.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: February 12, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jinyu Li, Yingming Liu, Peizhi Cai, Xue Cao
  • Patent number: 10117330
    Abstract: A conductive component includes: a first electrode pattern which is made of metal thin wires, the first electrode pattern including a plurality of first conductive patterns that extend in a first direction. Each first conductive pattern includes, at least, inside thereof, a sub-nonconduction pattern that is electrically separated from the first conductive pattern. An area A of each first conductive pattern and an area B of each sub-nonconduction patterns satisfy a relation of 5%<B/(A+B)<97%. The conductive component may be included in a conductive sheet and a touch panel to provide a high detection accuracy.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: October 30, 2018
    Assignee: FUJIFILM Corporation
    Inventors: Hiroshige Nakamura, Tadashi Kuriki
  • Patent number: 10018211
    Abstract: Adhesive bonds may be formed between components (e.g., automotive) by sliding components into position without wiping or removing the uncured adhesive. Here, a first bonding region has an uncured adhesive and a plurality of bond standoffs that is positioned adjacent to a second bonding region. Bond standoffs promote sliding between the first and second components, while substantially retaining the uncured adhesive during the sliding. Bond standoffs can be formed on the surface, for example, by molding or stamping. The first and second bonding regions slide into engagement, followed by applying pressure, heat, and/or energy as needed, to form a solid adhesive bond. Methods of repairing manufactured components (e.g., automotive) are also provided with such techniques, including the ability to slide parts into place without removing the uncured adhesive, using bond standoffs formed as strips of adhesive cured on the substrate component or tacks pinned into a composite substrate component.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: July 10, 2018
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Elisabeth J. Berger, Hamid G. Kia
  • Patent number: 9917066
    Abstract: A lamination structure includes a first semiconductor chip and a second semiconductor chip stacked via a bonding section so that a rear surface of the first semiconductor chip faces the main surface of the second semiconductor chip. At least a part of a side surface of the first semiconductor chip are covered with a first resin, a distribution layer is formed on the plane formed of the main surface of the first semiconductor chip and a surface of the first resin. At least part of electrodes existing in the main surface of the second semiconductor chip is electrically connected to at least part of first external electrodes formed on the distribution layer via the penetration electrodes that penetrate the first semiconductor chip.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: March 13, 2018
    Assignee: Panasonic Corporation
    Inventors: Nobuo Aoi, Masaru Sasago, Yoshihiro Mori, Takeshi Kawabata, Takashi Yui, Toshio Fujii
  • Patent number: 9877385
    Abstract: A conductive sheet includes: a substrate having a first main surface and a second main surface; and a first electrode pattern placed on the first main surface of the substrate. The first electrode pattern is made of metal thin wires, and includes a plurality of first conductive patterns that extend in a first direction. Each first conductive pattern includes, at least, inside thereof, a sub-nonconduction pattern that is electrically separated from the first conductive pattern. An area A of each first conductive pattern and an area B of each sub-nonconduction patterns satisfy a relation of 5%<B/(A+B)<97%. Accordingly, a conductive sheet and a touch panel having a high detection accuracy can be provided.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: January 23, 2018
    Assignee: FUJIFILM Corporation
    Inventors: Hiroshige Nakamura, Tadashi Kuriki
  • Patent number: 9831207
    Abstract: A method of forming a package on a package structure includes applying a no-reflow underfill (NUF) layer over a substrate, wherein the substrate has at least one first bump and a plurality of second bumps surrounding the at least one first bump. The method further includes bonding a semiconductor die to the at least one first bump. The method further includes bonding an interposer frame to the plurality of second bumps, wherein the interposer frame surrounds the semiconductor die, wherein the semiconductor die is disposed in an opening of the interposer frame.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: November 28, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Jiun Yi Wu
  • Patent number: 9782955
    Abstract: Touch sensor layer constructions and methods of making such constructions are described. More particularly, touch sensor constructions that utilize patterned conductive layers that may be applied by a sacrificial release liner, eliminating one or more glass and/or film substrate from touch sensor stacks, and methods of making such constructions are described.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: October 10, 2017
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Michael W. Dolezal, Robert R. Kieschke, Ta-Hua Yu, Mark A. Roehrig, Pradnya V. Nagarkar, Matthew S. Stay, Shawn C. Dodds, Bernard O. Geaghan
  • Patent number: 9773725
    Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: September 26, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin Bills, Mahesh Bohra, Jinwoo Choi, Tae Hong Kim, Rohan Mandrekar
  • Patent number: 9773752
    Abstract: A printed circuit board (PCB) for reducing a size of a semiconductor package and a semiconductor package including the same are provided. The PCB includes a substrate base including a chip attach area disposed on a top thereof, a top pad and a bottom pad respectively disposed on the top and a bottom of the substrate base, a first top solder resist layer formed on the top of the substrate base and including a first pad opening corresponding to the top pad and covering the chip attach area, a second top solder resist layer formed on the first top solder resist layer and including a second pad opening corresponding to the top pad and a chip attach opening corresponding to the chip attach area, and a bottom solder resist layer formed on the bottom of the substrate base and including a third pad opening corresponding to the bottom pad.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: September 26, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-hyun Baik, Cheol-woo Lee, Wan-ho Park
  • Patent number: 9754893
    Abstract: Semiconductor structure and fabrication methods are provided. The semiconductor structure includes a first wafer having a first metal layer therein and having a first material layer thereon, and a second wafer having a second metal layer therein and having a second material layer thereon. An alignment process and a bonding process are preformed between the first wafer and the second wafer, such that the first material layer and the second material layer are aligned and in contact with one another to provide a first alignment accuracy between the first metal layer and second metal layer. A heating process is performed on the first material layer and the second material layer to melt the first material layer and the second material layer to provide a second alignment accuracy between the first metal layer and second metal layer. The second alignment accuracy is greater than the first alignment accuracy.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: September 5, 2017
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Jingxiu Ding, Zuopeng He
  • Patent number: 9750131
    Abstract: Provided are a transparent conductive laminate, a transparent electrode including the transparent conductive laminate, and a manufacturing method for the transparent conductive laminate.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: August 29, 2017
    Assignee: LG CHEM, LTD.
    Inventors: Jiehyun Seong, Jinmi Jung, Yong Goo Son, Seung Heon Lee, Song Ho Jang, Bu Gon Shin, Ji Young Hwang
  • Patent number: 9750134
    Abstract: A method for producing a printed circuit board (13, 15, 16) with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (1, 1?) and application of a dielectric insulating foil (3, 3?) to at least one subarea of the conducting foil; b) applying a structure of conducting paths (4, 4?) to the insulating layer (3, 3?); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (1, 1?) plus insulating layer (3, 3?) and conducting paths (4, 4?) by interposing a prepreg layer (5, 85; 18, 18?), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: August 29, 2017
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Alexander Kasper, Dietmar Drofenik, Ravi Hanyal Shivarudrappa, Michael Gössler
  • Patent number: 9706649
    Abstract: The present invention provides a plastic substrate, including: a polyimide film; a hard coating layer formed on one side of the polyimide film; and a transparent electrode layer formed on the other side of the polyimide film. The plastic substrate has excellent light transmittance high hardness characteristics, superior ITO processability and flexibility. Further, the plastic substrate can function as both a window film and an electrode film when it is applied to a touch screen panel. Thus, the present invention provides a touch screen panel which can be slimmed by reducing the number of laminated films including the plastic substrate.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: July 11, 2017
    Assignee: KOLON INDUSTRIES, INC.
    Inventors: Hak Gee Jung, Hyo Jun Park, Chul Ha Ju
  • Patent number: 9577358
    Abstract: A fluid pressure actuated device for establishing electrical contact includes a substrate defining a chamber, a flexible membrane having a first side facing a first direction away from the substrate and a second side facing into the chamber in a second direction opposite the first direction, and an electrically conducting contactor mounted on the first side of the flexible membrane. The flexible membrane extends and withdraws moving the electrically conducting contactor in the first direction and second direction respectively when fluid pressure is increased and decreased in the chamber. The flexible membrane includes at least two concentric frustum portions that narrow in opposite directions, including a central frustum portion and a second frustum portion that encircles the central frustum portion. Multiple chambers may be maintained in pressure equilibrium by at least one channel for the concurrent extension of multiple membranes and contactors.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: February 21, 2017
    Inventor: Masud Beroz
  • Patent number: 9453774
    Abstract: Various aspects of the instant disclosure relate to pressure sensing methods and apparatuses. As may be implemented in accordance with one or more embodiments, an apparatus includes a plurality of structures having respective surface areas that are implemented to contact at least one of an electrode and other ones of the structures. The structures operate with the electrode to provide an electrical indication of pressure by effecting a change in the respective surface areas in response to an elastic compression or expansion of the structures, and providing a change in electrical impedance between the structures and the electrode based on the change in the respective surface areas.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: September 27, 2016
    Assignees: The Board of Trustees of the Leland Stanford Junior University, Nanjing University
    Inventors: Zhenan Bao, Alex Chortos, Lijia Pan
  • Patent number: 9446944
    Abstract: In various embodiments, a sensor apparatus is provided. The sensor apparatus includes a sensor device having a plurality of electrical contacts; a housing having a plurality of sidewalls; and a metal carrier structure, which extends into the housing in a manner passing through two mutually opposite sidewalls from the plurality of sidewalls. The metal carrier structure is embodied in a resilient fashion at least in the direction of a sidewall through which the metal carrier structure extends. The sensor device having the plurality of electrical contacts is mounted in a resilient fashion on the metal carrier structure and is electrically conductively connected to the metal carrier structure by the plurality of contacts.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: September 20, 2016
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Georg Ernst, Horst Theuss
  • Patent number: 9324614
    Abstract: A method includes applying a backside passivation layer to an inactive surface of an electronic component and to enclose a through via nub protruding from the inactive surface. The method further includes laser ablating the backside passivation layer to reveal a portion of the through via nub. The backside passivation layer is formed of a low cost organic material. Further, by using a laser ablation process, the backside passivation layer is removed in a controlled manner to reveal the portion of the through via nub. Further, by using a laser ablation process, the resulting thickness of the backside passivation layer is set to a desired value in a controlled manner. Further, by using a laser ablation process, the fabrication cost is reduced as compared to the use of chemical mechanical polish.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: April 26, 2016
    Inventors: Ronald Patrick Huemoeller, Frederick Evans Reed, David Jon Hiner, Kiwook Lee
  • Patent number: 9275966
    Abstract: An electronic apparatus includes a base substrate, the base substrate including an interconnect. The electronic apparatus further includes a first die including a first semiconductor device, the first semiconductor device being coupled to the interconnect, and further includes a second die including a second semiconductor device, the second semiconductor device being coupled to the interconnect. The first and second die are attached to the base substrate in opposite orientations.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: March 1, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Josef C. Drobnik
  • Patent number: 9261533
    Abstract: An automatic test equipment (ATE) unit, which incorporates a mass interconnect system. The mass interconnect system is provided with a universal mounting table for use with receiver and test interface modules for electronically mounting and testing a variety of different types of electronic components or unit under test thereon. The mounting table test interface module incorporates MEMS based spring contacts to provide high-speed micro test-channels in order to establish signal connectivity between the components or unit under test and the tester, and which maintain the signal integrity up to 50 GHz without significant signal loss distortion.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: February 16, 2016
    Assignee: UNIVERSITY OF WINDSOR
    Inventors: Rashid Rashidzadeh, Majid Ahmadi, Nabeeh Kandalaft
  • Patent number: 9078360
    Abstract: An imprinted micro-structure includes a substrate having a first layer in relation thereto. First, second, and third micro-channels are imprinted in the first layer and have first, second, and third micro-wires respectively located therein. A second layer is adjacent to and in contact with the first layer. Imprinted first and second connecting micro-channels including first and second connecting micro-wires are in contact with the first and second micro-wires respectively and are isolated from the third micro-wire. A third layer is adjacent to and in contact with the second layer and has an imprinted bridge micro-channel with a bridge micro-wire contacting the first and second connecting micro-wires and separate from the third micro-wire so that the first and second micro-wires are electrically connected and electrically isolated from the third micro-wire.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: July 7, 2015
    Assignee: EASTMAN KODAK COMPANY
    Inventor: Ronald Steven Cok
  • Patent number: 9067777
    Abstract: A MEMS device includes: a base substrate; a first wiring disposed on the base substrate using a first structure; a second wiring disposed on the base substrate using the first structure and a second structure connected to the first structure; and a MEMS element connected with the first wiring and the second wiring and arranged on the base substrate, wherein the first wiring and the second wiring include a crossing portion where the first wiring and the second wiring cross each other, and at the crossing portion, the first structure of the first wiring and the second structure of the second wiring cross each other.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: June 30, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Makoto Furuhata, Satoru Tanaka
  • Publication number: 20150144380
    Abstract: Polymer binders, e.g., crosslinked polymer binders, have been found to be an effective film component in creating high quality transparent electrically conductive coatings or films comprising metal nanostructured networks. The metal nanowire films can be effectively patterned and the patterning can be performed with a high degree of optical similarity between the distinct patterned regions. Metal nanostructured networks are formed through the fusing of the metal nanowires to form conductive networks. Methods for patterning include, for example, using crosslinking radiation to pattern crosslinking of the polymer binder. The application of a fusing solution to the patterned film can result in low resistance areas and electrically resistive areas. After fusing the network can provide desirable low sheet resistances while maintaining good optical transparency and low haze. A polymer overcoat can further stabilize conductive films and provide desirable optical effects.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Inventors: Xiqiang Yang, Ying-Syi Li, Yungyu Huang, Chris Scully, Clifford M. Morris, Ajay Virkar
  • Patent number: 9040834
    Abstract: The present invention provides an electroconductive sheet and a touch panel which do not impair visibility in a vicinity of an electrode terminal in a sensing region. In an electroconductive sheet which has an electrode pattern constructed of a metal thin wire and an electrode terminal that is electrically connected to an end of the electrode pattern, a transmittance of the electrode pattern is 83% or more, and when the transmittance of the electrode pattern is represented by a %, a transmittance of the electrode terminal is controlled to be (a-20)% or more and (a-3)% or less.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: May 26, 2015
    Assignee: FUJIFILM Corporation
    Inventor: Hiroshige Nakamura
  • Patent number: 9040833
    Abstract: A capacitive transparent conductive film comprises: a transparent substrate, comprises a first surface and a second surface which is opposite to the first surface; a light-shield layer, formed at the edge of the first surface of the transparent substrate, the light-shield layer forms a non-visible region on the first surface of the transparent substrate; and a polymer layer, formed on the first surface of the transparent substrate, and covering the light-shield layer, the surface of the polymer layer is patterned to form a meshed trench, the trench is filled with conductive material to form a sensing region on the surface of the polymer layer. The capacitive transparent conductive film can effectively protect the conductive material and has low cost and good conductivity. A preparation method of the capacitive transparent conductive film is also provided.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: May 26, 2015
    Assignee: NANCHANG O-FILM TECH. CO., LTD.
    Inventors: Yulong Gao, Ying Gu, Yunhua Zhao, Guanglong Xie
  • Publication number: 20150129286
    Abstract: A patterned transparent conductor includes: (1) a substrate; (2) first additives at least partially embedded into a surface of the substrate within a first area of the surface corresponding to a lower sheet resistance portion; and (3) second additives at least partially embedded into the surface of the substrate within a second area of the surface corresponding to a higher sheet resistance portion. A sheet resistance of the higher sheet resistance portion is at least 100 times a sheet resistance of the lower sheet resistance portion.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 14, 2015
    Applicant: INNOVA DYNAMICS, INC.
    Inventors: Arjun Daniel Srinivas, Matthew R. Robinson, Alexander Chow Mittal, Michael Eugene Young, David Buchanan, Joseph George, Yuka Yoshioka
  • Publication number: 20150122531
    Abstract: An article comprising a conductive film comprising conductive structures, and a first resistive element patterned into a first portion of the conductive film. In at least some cases, the conductive structures may comprise nanostructures, such as, for example, nanowires. Silver nanowires are exemplary conductive structures. In some useful applications, the first resistive element may be part of a circuit, such as, for example, a Wheatstone bridge.
    Type: Application
    Filed: October 1, 2014
    Publication date: May 7, 2015
    Inventors: Robert J. Monson, Andrew T. Fried
  • Publication number: 20150118508
    Abstract: A transparent conductor, a method for preparing the same, and an optical display including the same, the transparent conductor including a base layer; and a conductive layer on the base layer, the conductive layer including metal nanowires and a matrix, wherein the transparent conductor has a transmissive b* value of about 1.5 or less, and the matrix is prepared from a matrix composition including a tri-functional monomer and one of a penta-functional monomer or a hexa-functional monomer a base layer; and a conductive layer formed on the base layer and including metal nanowires and a matrix, wherein the transparent conductor has a transmissive b* value of about 1.5 or less, and the matrix is formed of a composition including a penta- or hexa-functional monomer and a tri-functional monomer.
    Type: Application
    Filed: October 24, 2014
    Publication date: April 30, 2015
    Inventors: Dong Myeong SHIN, Young Kwon KOO, Oh Hyeon HWANG, Kyoung Ku KANG, Do Young KIM, Dae Seob SHIM
  • Publication number: 20150107878
    Abstract: Electrically conductive films and methods for making them. The films include at least two patterns, the first of which, alone, would be visible, but with the addition of one or more other patterns, becomes invisible to the unaided human eye. These films are useful in applications where invisible patterning is desirable, such as, for example, devices employing touch screens.
    Type: Application
    Filed: September 30, 2014
    Publication date: April 23, 2015
    Inventors: Andrew T. Fried, Robert S. Loushin, Robert J. Monson
  • Publication number: 20150107877
    Abstract: The invention relates to an electrically conductive system comprising a substrate and at least one conductive track adhered onto the substrate, wherein the substrate is composed of at least a polyamide and the conductive track is made out of an electrically conductive material and wherein the conductive track is adhered to the substrate by an jet printing technique followed by sintering. The invention further relates to a process for the production of an electrically conductive system and to its uses.
    Type: Application
    Filed: April 26, 2013
    Publication date: April 23, 2015
    Inventors: Frank Peter Theodorus Johannes Van Der Burgt, Christian Schröder
  • Patent number: 9005744
    Abstract: A conductive micro-wire structure includes a substrate. A plurality of spaced-apart electrically connected micro-wires is formed on or in the substrate forming the conductive micro-wire structure. The conductive micro-wire structure has a transparency of less than 75% and greater than 0%.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: April 14, 2015
    Assignee: Eastman Kodak Company
    Inventors: John Andrew Lebens, David Paul Trauernicht, Yongcai Wang, Ronald Steven Cok
  • Publication number: 20150090479
    Abstract: An method for preparing a flexible transparent electrode film that has a high transmittance and low sheet resistance without having to go through a separate heating process by using cesium, and a flexible transparent electrode film prepared thereby, the method including: applying a nanowire transparent conductive film on a high molecular base material film; coating the nanowire transparent conductive film with a sol-gel solution wherein titanium dioxide and cesium are mixed; and welding the nanowire.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 2, 2015
    Applicant: Research & Business Foundation SUNGKYUNKWAN UNIVERSITY
    Inventors: Hoojeong LEE, Sunho KIM, Sekwon NA, Jun Gu KANG