Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.

Abstract: A substrate processing system for selectively etching a layer on a substrate includes an upper chamber region, an inductive coil arranged around the upper chamber region and a lower chamber region including a substrate support to support a substrate. A gas distribution device is arranged between the upper chamber region and the lower chamber region and includes a plate with a plurality of holes. A cooling plenum cools the gas distribution device and a purge gas plenum directs purge gas into the lower chamber. A surface to volume ratio of the holes is greater than or equal to 4. A controller selectively supplies an etch gas mixture to the upper chamber and a purge gas to the purge gas plenum and strikes plasma in the upper chamber to selectively etch a layer of the substrate relative to at least one other exposed layer of the substrate.

Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by providing a substrate having a plurality of protruding tin oxide features (mandrels) residing on an exposed etch stop layer. Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrel (e.g., leaving at least 50%, such as at least 90% of initial height at the sidewall). Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning the etch stop layer and underlying layers.

Abstract: A method includes etching a semiconductor substrate to form a first trench and a second trench. A remaining portion of the semiconductor substrate is left between the first trench and the second trench as a semiconductor region. A doped dielectric layer is formed on sidewalls of the semiconductor region and over a top surface of the semiconductor region. The doped dielectric layer includes a dopant. The first trench and the second trench are filled with a dielectric material. An anneal is then performed, and a p-type dopant or an n-type dopant in the doped dielectric layer is diffused into the semiconductor region to form a diffused semiconductor region.

Abstract: An embodiment method includes patterning a tin oxide layer to define a plurality of mandrels over a target layer; depositing a spacer layer over and along sidewalls of the plurality of mandrels; and patterning the spacer layer to provide a plurality of spacers on the sidewalls of the plurality of mandrels. The method further includes after patterning the spacer layer, removing the plurality of mandrels. The method further includes after removing the plurality of mandrels, patterning the target layer using the plurality of spacers.

Abstract: Methods and apparatuses for the production of HF in an electron-beam generated plasma. A gas containing fluorine, hydrogen, and an inert gas such as argon, e.g., Ar/SF6/H2O or Ar/SF6/NH3 flows into a plasma treatment chamber to produce a low pressure gas in the chamber. An electron beam directed into the gas forms a plasma from the gas, with energy from the electron beam dissociating the F-containing molecules, which react with H-containing gas to produce HF in the plasma. Although the concentration of the gas phase HF in the plasma is a very small fraction of the total gas in the chamber, due to its highly reactive nature, the low concentration of HF produced by the method of the present invention is enough to modify the surfaces of materials, performing the same function as aqueous HF solutions to remove oxygen from an exposed material.

Abstract: A superconducting structure includes a first superconducting device having a plurality of first superconducting contact pads disposed on a top side of a first superconducting device, a second superconducting device having a plurality of second superconducting contact pads disposed on a bottom side of a second superconducting device, and a plurality of superconducting bump structures with a given bump structure coupling respective superconducting contact pads of the plurality of first superconducting contact pads and the second plurality of superconducting pads to one another to bond the first superconducting device to the second superconducting device. Each superconducting bump structure includes a first under bump metallization (UBM) layer disposed on the top surface of a given superconducting contact pad, a second UBM layer disposed on the top surface of a given superconducting contact pads, and a superconducting metal layer coupling the first UBM layer to the second UBM layer.

Abstract: The present invention relates to a manufacturing method for a camera window and a camera window manufactured thereby. A conventional camera window is configured such that an etching pattern is provided on a back surface of a glass sheet, and a deposition layer is provided on the etching pattern, thereby improving reflectivity, whereby indirect external recognition of the etching pattern is performed, but in the present invention, a distinctive pattern is provided on a front surface of a glass sheet such that direct external recognition of the pattern is possible, whereby it is possible to recognize a distinctive pattern line.

Abstract: A method comprises forming a first conductive line and a second conductive line in a first dielectric layer over a substrate, each having a planar top surface, applying an etch-back process to the first dielectric layer until a dielectric portion between the first conductive line and the second conductive line has been removed, and the first conductive line and the second conductive line have respective cross sectional shapes including a rounded surface and two rounded corners and depositing a second dielectric layer over the substrate, while leaving a first air gap between the first conductive line and the second conductive line.

Abstract: A process for filling one or more etched holes defined in a frontside surface of a wafer substrate. The process includes the steps of: (i) depositing a layer of a photoimageable thermoplastic polymer onto the frontside surface and into each hole; (ii) reflowing the polymer; (iii) selectively removing the polymer from regions outside a periphery of each hole, the selective removing comprising exposure and development of the polymer; (iv) optionally repeating steps (i) to (iii) until each hole is overfilled with the polymer; and (v) planarizing the frontside surface to provide one or more holes filled with a plug of the polymer. Each plug has a respective upper surface coplanar with the frontside surface.

Abstract: A method of etching is described. The method includes providing a substrate having a first material containing silicon nitride and a second material that is different from the first material, forming a first chemical mixture by plasma-excitation of a first process gas containing H and optionally a noble gas, and exposing the first material on the substrate to the first chemical mixture. Thereafter, the method includes forming a second chemical mixture by plasma-excitation of a second process gas containing N, F, O, and optionally a noble element, and exposing the first material on the substrate to the second plasma-excited process gas to selectively etch the first material relative to the second material.

Abstract: A method of etching is described. The method includes providing a substrate having a first material containing silicon nitride and a second material that is different from the first material, forming a first chemical mixture by plasma-excitation of a first process gas containing H and optionally a noble gas, and exposing the first material on the substrate to the first chemical mixture. Thereafter, the method includes forming a second chemical mixture by plasma-excitation of a second process gas containing N and F, and optionally a noble element, and exposing the first material on the substrate to the second plasma-excited process gas to selectively etch the first material relative to the second material.

Abstract: A plasma etching method for etching a film containing a tungsten element using plasma, wherein the film containing a tungsten element is etched by using a gas containing a silicon element, a gas containing a halogen element, and a gas containing a carbon element and an oxygen element.

Abstract: Methods of selectively etching silicon nitride on a semiconductor substrate by providing silicon to the plasma to achieve high etch selectivity of silicon nitride to silicon-containing materials are provided. Methods involve providing silicon from a solid or fluidic silicon source or both. A solid silicon source may be upstream of a substrate, such as at or near a showerhead of a process chamber, or in a remote plasma generator. A silicon gas source may be flowed to the plasma during etch.

Abstract: A method of selectively etching silicon nitride from a substrate comprising a silicon nitride layer and a silicon oxide layer includes flowing a fluorine-containing gas into a plasma generation region of a substrate processing chamber and applying energy to the fluorine-containing gas to generate a plasma in the plasma generation region. The plasma comprises fluorine radicals and fluorine ions. The method also includes filtering the plasma to provide a reactive gas having a higher concentration of fluorine radicals than fluorine ions and flowing the reactive gas into a gas reaction region of the substrate processing chamber. The method also includes exposing the substrate to the reactive gas in the gas reaction region of the substrate processing chamber. The reactive gas etches the silicon nitride layer at a higher etch rate than the reactive gas etches the silicon oxide layer.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming a first flowable-material (FM) layer over a substrate. A top surface of the first FM layer in a first region is higher than a top surface of the first FM layer in a second region. The method also includes forming a sacrificial plug to cover the first FM layer in the first region, forming a second FM layer over the sacrificial plug in the first region and over the first FM layer in the second region, performing a first recessing process such that the second FM layer is removed in the first region and performing a second recessing process on the second FM layer in the second region while the first FM layer is protected by the sacrificial plug in the first region.

Abstract: Self-aligned metal cut and via for Back-End-Of-Line (BEOL) processes for semiconductor integrated circuit (IC) fabrication, and related processes and devices, is disclosed. In this manner, mask placement overlay requirements can be relaxed. This relaxation can be multiples of that allowed by conventional BEOL techniques. This is enabled through application of different fill materials for alternating lines in which a conductor will later be placed. With these different fill materials in place, a print cut and via mask is used, with the mask allowed to overlap other adjacent fill lines to that of the desired line. Etching is then applied that is selective to the desired line but not adjacent lines.

Abstract: A sidewall image transfer (SIT) process is provided. First, a substrate is provided. A sacrificial layer having a pattern is formed on the substrate. A first measuring step is performed to measure a width of the pattern of the sacrificial layer. A material layer is formed conformally on the sacrificial layer, wherein a thickness of the material layer is adjusted according to the result of the first measuring step. Then, the material layer is removed anisotropically, so the material layer becomes a spacer on a sidewall of the sacrificial layer. Lastly, the sacrificial layer is removed.

Abstract: A method for manufacturing a silicon carbide semiconductor device includes steps of preparing a silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, forming a groove portion in the first main surface of the silicon carbide substrate, and cutting the silicon carbide substrate at the groove portion. The step of forming the groove portion includes a step of thermally etching the silicon carbide substrate using chlorine. Thereby, a method for manufacturing a silicon carbide semiconductor device capable of suppressing damage to a chip is provided.

Abstract: A stack that includes, from bottom to top, a nitrogen-containing dielectric layer, an interconnect level dielectric material layer, and a hard mask layer is formed on a substrate. The hard mask layer and the interconnect level dielectric material layer are patterned by an etch. Employing the patterned hard mask layer as an etch mask, the nitrogen-containing dielectric layer is patterned by a break-through anisotropic etch, which employs a fluorohydrocarbon-containing plasma to break through the nitrogen-containing dielectric layer. Fluorohydrocarbon gases used to generate the fluorohydrocarbon-containing plasma generate a carbon-rich polymer residue, which interact with the nitrogen-containing dielectric layer to form volatile compounds. Plasma energy can be decreased below 100 eV to reduce damage to physically exposed surfaces of the interconnect level dielectric material layer.

Abstract: A method of etching silicon nitride on patterned heterogeneous structures is described and includes a gas phase etch using anhydrous vapor-phase HF. The HF may be combined with one or more of several precursors in the substrate processing region and near the substrate to increase the silicon nitride etch rate and/or the silicon nitride selectivity. The silicon nitride etch selectivity is increased most notably when compared with silicon of various forms. No precursors are excited in any plasma either outside or inside the substrate processing region according to embodiments. The HF may be flowed through one set of channels in a dual-channel showerhead while the other precursor is flowed through a second set of channels in the dual-channel showerhead.

Abstract: An LPCVD apparatus is provided with a processing chamber and a reaction cooling apparatus. The reaction cooling apparatus is placed outside the processing chamber and is configured to generate hydrogen fluoride gas by reaction of hydrogen gas and fluorine gas and to cool the hydrogen fluoride gas. The hydrogen fluoride gas cooled by the reaction cooling apparatus is supplied into the processing chamber as a cleaning gas.

Abstract: Methods of selectively etching aluminum and aluminum layers from the surface of a substrate are described. The etch selectively removes aluminum materials relative to silicon-containing films such as silicon, polysilicon, silicon oxide, silicon carbon nitride, silicon oxycarbide and/or silicon nitride. The methods include exposing aluminum materials (e.g. aluminum) to remotely-excited chlorine (Cl2) in a substrate processing region. A remote plasma is used to excite the chlorine and a low electron temperature is maintained in the substrate processing region to achieve high etch selectivity. Aluminum oxidation may be broken through using a chlorine-containing precursor or a bromine-containing precursor excited in a plasma or using no plasma-excitation, respectively.

Abstract: A semiconductor arrangement and methods of formation are provided. The semiconductor arrangement includes conductive lines having sidewalls angled between about 45° to about 90° relative to a plane in which bottom surfaces of the conductive lines lie. A dielectric layer is formed over the conductive lines. The angled sidewalls of the conductive lines cause the dielectric layer to pinch off before an area between adjacent conductive lines is filled, thus establishing an air gap between adjacent conductive lines, where the air gap has a lower dielectric constant than the dielectric material.

Abstract: A display substrate includes a base substrate, a common line on the base substrate, a first insulation layer covering the common line and having a first insulating material, a conductive pattern on the first insulation layer and including a source electrode and a drain electrode, a second insulation layer covering the drain electrode and the common line, and including a lower second insulation layer having a second insulating material and an upper second insulation layer having the first insulating material, a first electrode electrically connected to the drain electrode through a first contact hole in the second insulation layer, and a second electrode electrically connected to the common line through a second contact hole in the first and second insulation layers. The upper and lower second insulation layers on the drain electrode have a first hole and a second hole respectively that form the first contact hole.

Abstract: Methods and transistors for circuit structures are provided. The methods include, for instance: defining a channel region in a substrate, the channel region having at least one channel region sidewall adjoining an isolation material; recessing the isolation material to expose an upper portion of the at least one channel region sidewall; and providing a gate structure over a gate interface area with the channel region. The gate interface area includes at least the upper portion of the at least one channel region sidewall and an upper surface of the channel region so that a threshold voltage of the gate structure may be reduced. The methods may also include etching an elongate notch in the upper portion of the at least one channel region sidewall to increase a size of the gate interface area and further reduce the threshold voltage of the gate structure.

Abstract: A method for fabricating a finFET integrated circuit includes providing a finFET integrated circuit structure including a fin structure, a replacement metal gate structure having a silicon nitride cap disposed over and in contact with the fin structure, a contact structure including a tungsten material also disposed over and in contact with the fin structure, and an insulating layer disposed over the replacement metal gate structure and the contact structure. The method further includes forming a first opening in the insulating layer over the replacement gate structure and a second opening in the insulating layer over the contact structure. Forming the first and second openings includes exposing the FinFET integrated circuit structure to a single extreme ultraviolet lithography patterning. Still further, the method includes removing a portion of the silicon nitride material of the replacement metal gate structure and forming a metal fill material in the first and second openings.

Abstract: Embodiments of methods of forming silicon nitride spacers are provided herein. In some embodiments, a method of forming silicon nitride spacers atop a substrate includes: depositing a silicon nitride layer atop an exposed silicon containing layer and an at least partially formed gate stack disposed atop a substrate; modifying a portion of the silicon nitride layer by exposing the silicon nitride layer to a hydrogen or helium containing plasma that is substantially free of fluorine; and removing the modified portion of the silicon nitride layer by performing a wet cleaning process to form the silicon nitride spacers, wherein the wet cleaning process removes the modified portion of the silicon nitride layer selectively to the silicon containing layer.

Abstract: The disclosed techniques relate to methods and apparatus for etching a substrate. A plate assembly divides a reaction chamber into a lower and upper sub-chamber. The plate assembly includes an upper and lower plate having apertures therethrough. When the apertures in the upper and lower plates are aligned, ions and neutral species may travel through the plate assembly into the lower sub-chamber. When the apertures are not aligned, ions are prevented from passing through the assembly while neutral species are much less affected. Thus, the ratio of ion flux:neutral flux may be tuned by controlling the amount of area over which the apertures are aligned. In certain embodiments, one plate of the plate assembly is implemented as a series of concentric, independently movable injection control rings. Further, in some embodiments, the upper sub-chamber is implemented as a series of concentric plasma zones separated by walls of insulating material.

Abstract: Etch assisting agents for focused ion beam (FIB) etching of copper for circuit editing of integrated circuits both prevent loss of adjacent dielectric due to sputtering by the ion beam, and render sputtered re-deposited copper on adjacent surfaces non-conductive to avoid electrical short circuits. The agents are characterized by having an N—N (N being Nitrogen) bonding in their molecules and boiling points between about 70° C. and about 220° C., and include hydrazine and water solutions, hydrazine derivatives, NitrosAmine derivatives saturated with two hydrocarbon groups selected from Methyl, Ethyl, Propyl and Butyl, NitrosAmine related compounds, and Nitrogen Tetroxide. Preferred agents are Hydrazine monohydrate (HMH), HydroxyEthylHydrazine (HEH), CEH, BocMH, BocMEH, NDMA, NDEA, NMEA, NMPA, NEPA, NDPA, NMBA, NEBA, NPYR, NPIP, NMOR and Carmustine, alone or in combination with Nitrogen Tetroxide. The agents are effective for etching copper in high aspect ratio (deep) holes.

Abstract: The invention relates to a new technology which uses a surface modification method for ultra-precision machining, and in particular relates to a particle beam-assisted ultraprecision machining method for single-crystal brittle materials. The invention, the particle beam-assisted ultra-precision machining method for single-crystal brittle materials, can significantly improve machining accuracy, reduce surface finish and greatly reduce tool wear during ultra-precision machining of brittle materials.

Abstract: In a method of irradiating a gas cluster ion beam on a solid surface and smoothing the solid surface, the angle formed between the solid surface and the gas cluster ion beam is chosen to be between 1° and an angle less than 30°. In case the solid surface is relatively rough, the processing efficiency is raised by first irradiating a beam at an irradiation angle ? chosen to be something like 90° as a first step, and subsequently at an irradiation angle ? chosen to be 1° to less than 30° as a second step. Alternatively, the set of the aforementioned first step and second step is repeated several times.

Abstract: Conductive or barrier material is deposited on a semiconductor substrate having recessed features by a method that has at least two operations. The first operation involves depositing a layer of the material on at least a portion of the field regions of the wafer. The second operation involves resputtering at least the layer residing on the field region of the wafer under high pressure. If the pressure is sufficiently high, momentum transfer reflection of the resputtered material will take place, such that at least some of the resputtered material is placed in the recessed features of the wafer. This approach can, among other advantages, offer improved step coverage and better utilization of the material.

Abstract: Disclosed is a surface planarization method capable of planarizing the surface of a substrate while maintaining the film thickness of a polysilicon layer. A wafer formed with a polysilicon layer on the surface thereof is loaded on a susceptor of a chamber of a substrate processing apparatus, the pressure in the chamber is set to any one of 100 mTorr or more and 800 mTorr or less, and the flow ratio of argon gas in a mixed gas of oxygen gas and argon gas is set to any one of 50% or more and 95% or less, plasma is generated by exciting the mixed gas with a high-frequency power having a frequency set to any one of 13 MHz or more and 100 MHz or less, and the surface of the wafer is sputtered by positive ions of oxygen or argon in the generated plasma.

Abstract: According to one embodiment, a method of manufacturing a discrete track recording medium includes forming protruded magnetic patterns on a substrate, and repeating processes of depositing a nonmagnetic material so as to be filled in recesses between the magnetic patterns and etching back the nonmagnetic material two or more times with rotating the substrate in a plane thereof by an angle less than one revolution.

Abstract: The method for generating radicals comprises: feeding F2 gas or a mixed gas of F2 gas and an inert gas into a chamber of which the inside is provided with a carbon material, supplying a carbon atom from the carbon material by applying a target bias voltage to the carbon material, and thereby generating high density radicals, wherein the ratio of CF3 radical, CF2 radical and CF radical is arbitrarily regulated by controlling the target bias voltage applied to the carbon material while measuring the infrared absorption spectrum of radicals generated inside the chamber.

Abstract: Methods of resputtering material from the wafer surface include at least one operation of resputtering material under a pressure of at least 10 mTorr. The methods can be used in conjunction with an iPVD apparatus, such as hollow cathode magnetron (HCM) or planar magnetron. The resputtered material may be a diffusion barrier material or a conductive layer material. The methods provide process conditions which minimize the damage to the dielectric layer during resputtering. The methods allow considerable etching of the diffusion barrier material at the via bottom, while not damaging exposed dielectric elsewhere on the wafer. Specifically, they provide a solution for the dielectric microtrenching problem occurring during conventional resputter process. Furthermore, the methods increase the etch rate to deposition rate ratio (E/D) and improve the etch back nonuniformity (EBNU) of resputter process. In general, the methods provide IC devices with higher reliability and decrease wafer manufacturing costs.

Abstract: A process for polishing a glass substrate, which enables to polish a glass substrate having a large waviness formed by mechanical polishing, to have a surface excellent in flatness, is provided. A process for polishing a glass substrate, comprising a step of measuring the surface profile of a mechanically polished glass substrate to identify the width of waviness present in the glass substrate, and a step of applying dry etching using a beam having a beam size in FWHM (full width of half maximum) value of at most the above size of waviness, to polish the surface of the glass substrate.

Abstract: The invention relates to a hybrid optical switch, which is composed of a silicon micro-mirror-array and a mini-actuator array mainly. The invention which combines microelectromechanical systems technology and traditional precision machining technology, possesses the advantages of low cost, high accuracy, high fabrication yield, low actuation voltage, low power consumption, self-aligned micro-mirrors, and easy fiber alignment.

Abstract: A film is deposited on a substrate disposed in a substrate processing chamber. The substrate has a trench formed between adjacent raised surfaces. A first portion of the film is deposited over the substrate from a first gaseous mixture flowed into the process chamber by chemical-vapor deposition. Thereafter, the first portion is etched by flowing an etchant gas having a halogen precursor, a hydrogen precursor, and an oxygen precursor into the process chamber. Thereafter, a second portion of the film is deposited over the substrate from a second gaseous mixture flowed into the processing chamber by chemical-vapor deposition.

Abstract: A method of depositing a silica glass insulating film over a substrate. In one embodiment the method comprises exposing the substrate to a silicon-containing reactant introduced into a chamber in which the substrate is disposed such that one or more layers of the silicon-containing reactant are adsorbed onto the substrate; purging or evacuating the chamber of the silicon-containing reactant; converting the silicon-containing reactant into a silica glass insulating compound by exposing the substrate to oxygen radicals formed from a second reactant while biasing the substrate to promote a sputtering effect, wherein an average atomic mass of all atomic constituents in the second reactant is less than or equal to an average atomic mass of oxygen; and repeating the exposing, purging/evacuating and exposing sequence a plurality of times until a desired film thickness is reached.

Abstract: First and second electrodes and magnets between the electrodes define an enclosure. The first electrode is biased at a high voltage to produce a high intensity electrical field. The second electrode is biased at a low negative voltage by a low alternating voltage to produce a low intensity electrical field. Electrons movable in a helical path in the enclosure near the first electrode ionize inert gas molecules in the enclosure. A wafer having a floating potential and an insulating layer is closely spaced from the second electrode. The second electrode and the wafer define plates of a first capacitor having a high impedance. The wafer and the inert gas ions in the enclosure define opposite plates of a second capacitor. The first capacitor accordingly controls and limits the speed at which the gas ions move to the insulating layer surface to etch this surface. The resultant etch, only a relatively few angstroms, of the insulating layer is smooth, uniform and accurate.

Abstract: A charged particle beam apparatus and method for locally removing material from a predetermined location on a workpiece, such as the removal of a metallization layer covering an alignment mark on a wafer. The invention is particularly suited for high-volume mass production of semiconductor chips or electromechanical devices. According to one embodiment of the invention, a layer of material covering an alignment mark on a wafer is removed by ion beam sputtering using a non-LMIS beam directed at an oblique angle to the sample surface.

Abstract: A three-dimensional periodical structure whose period is about 1 ?m or smaller is provided. At least two kinds of films which have two-dimensionally substantially periodical projections are successively formed in layers substantially periodical to construct structure which is substantially three-dimensionally periodical. For instance, the films are made of materials different in refractive index. The three-dimensional periodical structure whose period is about 1 ?m or smaller can be obtained by a simple fabricating method. By this structure, the propagation of a wave with a specific wavelength in many solid angular directions including several axial directions parallel to the plane and the thickness direction of the layers can be cut off.

Abstract: A process for filling high aspect ratio gaps on substrates uses conventional high density plasma deposition processes to deposit fluorine-doped films, with an efficient sputtering inert gas, such as Ar, replaced or reduced with an inefficient sputtering inert gas such as He and/or hydrogen. By reducing the sputtering component, sidewall deposition from the sputtered material is reduced. Consequently, gaps with aspect ratios greater than 3.0:1 and spacings between lines less than 0.13 microns can be filled with low dielectric constant films without the formation of voids and without damaging circuit elements.

Abstract: A micro-machining process that includes etching a substrate having copper overlying a dielectric layer to a charged particle beam in the presence of an etch assisting agent. The etch assisting agent is selected from the group consisting of ammonia, acetic acid, thiolacetic acid, and combinations thereof.

Abstract: A method of depositing a film on a substrate. In one embodiment, the method includes depositing a first portion of the film using a high density plasma to partially fill a gap formed between adjacent features formed on the substrate. The film deposition process is then stopped before or shortly after the entry of the gap pinches off and the film is etched to widen entry to the gap using a two step etching process that includes a first physical etch step that forms a plasma from a sputtering agent introduced into the processing chamber and biases the plasma towards the substrate and a subsequent chemical etch step that forms a plasma from a reactive etchant gas introduced into the processing chamber. After the etching sequence is complete, a second portion of the film is deposited over the first portion using a high density plasma to further fill the gap.

Abstract: Techniques are used to detect and identify analytes. Techniques are used to fabricate and manufacture sensors to detect analytes. An analyte (1810) is sensed by sensors (1820) that output electrical signals in response to the analyte. The electrical signals are preprocessed (1830) by filtering and amplification. In an embodiment, this preprocessing includes adapting the sensor and electronics to the environment in which the analyte exists. The electrical signals are further processed (1840) to classify and identify the analyte, which may be by a neural network.

Abstract: A method of depositing a film on a substrate disposed in a substrate processing chamber. In one embodiment the method includes depositing a first portion of the film to at partially fill a gap formed between to adjacent features formed on the substrate. The first portion of film is deposited using a high density plasma formed from a first gaseous mixture flown into the process chamber. The film deposition process is then stopped before or shortly after the entry of the gap pinches off and the film is etched to widen entry to the gap using a two step etching process that includes a first physical etch step and a subsequent chemical etch step. The physical etch step sputter etches the first portion of film by forming a plasma from a sputtering agent introduced into the processing chamber and biasing the plasma towards the substrate. After the physical etching step, the film is chemically etched by forming a plasma from a reactive etchant gas introduced into the processing chamber.

Abstract: A method for fabricating a wafer-pair having at least one recess in one wafer and the recess formed into a chamber with the attaching of the other wafer which has a port plugged with a deposited layer on its external surface. The deposition of the layer may be performed in a very low pressure environment, thus assuring the same kind of environment in the sealed chamber. The chamber may enclose at least one device such as a thermoelectric sensor, bolometer, emitter or other kind of device. The wafer-pair typically will have numerous chambers, with devices, respectively, and may be divided into a multiplicity of chips.