Abstract: A plated component and a plating process are disclosed. The plating process includes applying a material to a region of a component, the material being selected from the group consisting of nickel, cobalt, chromium, iron, aluminum, or a combination thereof. The region includes a single crystal microstructure, includes a directionally solidified microstructure, is substantially devoid of equiaxed microstructure, or a combination thereof. The applying includes electroplating, electroless plating, or the electroplating and the electroless plating. The plated component includes an electroplated region, an intermediate layer on the electroplated region, and an overlay coating on the intermediate layer.

Abstract: A method and composition for metallizing a via feature in a semiconductor integrated circuit device substrate, using a leveler compound which is a dipyridyl compound.

Abstract: Disclosed is a method of treating the surface of an electrically conducting substrate surface wherein a tool comprising an ion-conducting solid material is brought into contact at least in some areas with the substrate surface. The tool conducts the metal ions of the substrate and an electric potential is applied so that an electrical potential gradient is applied between the substrate surface and the tool in such a manner that metal ions are drawn from the substrate surface or deposited onto the substrate surface by means of the tool.

Abstract: An apparatus and a method suited for metal plating aircraft engine components that allows the creation a local environment for plating by covering a localized area to be plated so that the localized area to be plated is sealed from remaining parts of the component, thereby eliminating the need for masking remaining parts of the component prior to plating.

Abstract: Some implementations provide a substrate that includes a first dielectric layer, a second dielectric layer, a core layer, and a composite conductive trace. The first and second dielectric layers have a first coefficient of thermal expansion (CTE). The core layer is between the first dielectric layer and the second dielectric layer. The composite conductive trace is between the first dielectric layer and the second dielectric layer. The composite conductive trace includes copper and another material. The composite conductive trace has a second CTE that is less than a third CTE for copper to more closely match the first CTE for the first and second dielectric layers.

Abstract: A manufacturing method of an interposed substrate is provided. A metal-stacked layer comprising a first metal layer, an etching stop layer and a second metal layer is formed. A patterned conductor layer is formed on the first metal layer, wherein the patterned conductor layer exposes a portion of the first metal layer. A plurality of conductive pillars is formed on the patterned conductor layer, wherein the conductive pillars are separated from each other and stacked on a portion of the patterned conductor layer. An insulating material layer is formed on the metal-stacked layer, wherein the insulating material layer covers the portion of the first metal layer and encapsulates the conductive pillars and the other portion of the patterned conductor layer. The metal-stacked layer is removed to expose a lower surface opposite to an upper surface of the insulating material layer and a bottom surface of the patterned conductor layer.

Abstract: A single-crystal substrate is placed on a supporting table while maintaining crystalline orientation of the single-crystal substrate. The single-crystal substrate has contacting regions on a periphery of an upper surface of the single-crystal substrate. Linear contacting surfaces of contacting pins are placed in contact with the contacting regions of the single-crystal substrate placed on the supporting table. Longitudinal directions on the contacting surfaces of all the contacting pins are not parallel to intersecting lines of the upper surface of the single-crystal substrate and cleaved surfaces of the single-crystal substrate.

Abstract: A metal covered polyimide composite comprising a tie-coat layer and a metal seed layer formed on a surface of a polyimide film by electroless plating or a drying method is provided. A copper layer or a copper alloy layer is formed thereon by electroplating. The copper plated layer or copper alloy plated layer includes three layers to one layer of the copper layer or copper alloy layer. The metal covered polyimide composite effectively prevents peeling in a non-adhesive flexible laminate (especially a two-layer flexible laminate), and more particularly, effectively inhibits peeling from the interface of a copper layer and tin plating. A method of producing the composite and apparatus for producing the composite are also provided.

Abstract: An object of the present invention is to provide an electrodeposition paint composition and a method of forming an electrodeposited coating, which exhibit quality of coating deposition even in the interior of narrow spaces of objects subjected to painting. A solution of the object is cationic electrodeposition paint composition in which in an aqueous medium contained are a cationic epoxy resin, a blocked isocyanate curing agent, a hydrophobic agent wherein an SP value of the hydrophobic agent (C) is 10.2 or more and less than 10.6 and is lower by 0.6 to 1.0 than an SP value of the cationic epoxy resin, a viscosity modifier, and a neutralizing acid, and in which coulombic efficiency of the cationic electrodeposition paint composition is 2.0 to 2.5 mg/(?m·C). A voltage boost rate of the voltage in painting is 30 to 70V/10 seconds.

Abstract: Embodiments are directed to methods for forming multi-layer three-dimensional structures involving the joining of at least two structural elements, at least one of which is formed as a multi-layer three-dimensional structure, wherein the joining occurs via one of: (1) elastic deformation and elastic recovery and subsequent retention of elements relative to each other, (2) relative deformation of an initial portion of at least one element relative to another portion of the at least one element until the at least two elements are in a desired retention position after which the deformation is reduced or eliminated and a portion of at least one element is brought into position which in turn locks the at least two elements together via contact with one another including contact with the initial portion of at least one element, or (3) moving a retention region of one element into the retention region of the other element, without deformation of either element, along a path including a loading region of the other el

Abstract: A thermal interface material (1) comprises a bulk polymer (2) within which is embedded sub-micron (c. 200 to 220 nm) composite material wires (3) having Ag and carbon nanotubes (“CNTs”) 4. The CNTs are embedded in the axial direction and have diameters in the range of 9.5 to 10 nm and have a length of about 0.7 ?m. In general the pore diameter can be in the range of 40 to 1200 nm. The material (1) has particularly good thermal conductivity because the wires (3) give excellent directionality to the nanotubes (4)—providing very low resistance heat transfer paths. The TIM is best suited for use between semiconductor devices (e.g. power semiconductor chip) and any type of thermal management systems for efficient removal of heat from the device.

Abstract: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.

Abstract: One embodiment is a method for void-free metallic electrofilling inside openings, said method includes: providing a substrate with at least one opening, the substrate includes an electrically conductive surface, including inside the at least one opening; immersing the substrate in an electrolyte contained in an ECD cell, the ECD cell includes at least one anode and a cathode, the cathode includes at least a portion of the conductive surface, the electrolyte includes plating metallic ions and at least one inhibitor additive, said metallic ions and at least one inhibitor additive having concentrations; providing electrolyte agitation across the substrate surface; and applying electroplating current density to the substrate; wherein the agitation, the concentrations, and the electroplating current density are such to produce void-free metallic electrofilling of the at least one opening, and wherein a height of electrodeposited surface bumps, or transition steps or humps, or transition spikes, is less than 140 nm

Abstract: A method for forming a tool marking structure contains: a first plating means used on a surface of a tool so as to form a first plating layer; a coloring means applied to print a marking area with a first color layer on the first plating layer and to have the first plating layer on a bottom end of the marking area; a carving means served to eliminate a part of the first color layer of the marking area so that the marking area has a marking portion and a contrast portion formed therein; a second plating means provided to form a second plating layer on the surface of the tool and the contrast portion of the marking area.

Abstract: An aqueous, acid bath for the electrolytic deposition of copper contains at least one copper ion source, at least one acid ion source, at least one brightener compound, and at least one leveler compound, and generates a very uniform copper deposit in particular in blind micro vias (BMVs) and trenches. The leveler compound is selected from among synthetically produced non-functionalized peptides, synthetically produced functionalized peptides, and synthetically produced functionalized amino acids.

Abstract: A method for manufacturing a compound part comprises preparing a cavity in a receiving part, selecting a resin for application in the receiving part, applying the resin into the cavity, curing the applied resin, and simultaneously finishing the receiving part and the cured resin.

Abstract: The present invention relates to an electroplatable plastics film having a light transmission greater than 50%, particularly preferably greater than 80%, for the production of metallised components, in particular partially metallised components.

Abstract: A pattern forming device includes a plurality of tanks, and a power supply device. Each of the tanks has an open end having the same shape as a profile shape of a corresponding one of regions of a surface of a workpiece, in which different types of films are to be formed, and stores a corresponding one of electrodeposition solutions used to form the different types of films in a state where the open end is in contact with the surface. The power supply device applies a predetermined voltage to between the workpiece that serves as a first electrode, and each one of second electrodes in the tanks.

Abstract: The present invention relates to a method of preparing inorganic and/or organic surfaces comprising organized micro- or nanostructures using colloidal particles in an electric field, to the micro- or nanostructured surfaces obtained by application of this method, as well as to the various applications of these structured surfaces, notably in the field of photonics, catalysis, magnetic storage or biosensors.

Abstract: There is provided an electroplating method for a through-hole. The method includes: a first plating process, a second plating process, and a third plating process. The first plating process is a plating process of forming a metal film with a uniform thickness in the through-hole to reduce a diameter of the through-hole, the second plating process is a plating process of blocking up a central portion of the through-hole with the metal film using a PR pulsed current, and the third plating process is a plating process of completely filling the through-hole with the metal film using the plating current whose value is equal to or larger than a forward-current value of the PR pulsed current used in the second plating process.

Abstract: Generally stated, provided is a sealed laminated metal structure. This laminated metal structure has a metal layer, where the metal layer has a first surface and an opposite second surface. A material is laminated on each of the first and second surfaces of the metal layer. Typically, the laminated metal structure is removed from a larger laminated sheet of metal. The laminated metal structure is subjected to alternating current electrolytic deburring and cleaning to remove any burrs along the perimeter edge. After deburring and cleaning, a sealer, which is a phosphate compound, is deposited on the perimeter edge of the laminated metal structure where the metal is exposed using alternating current.

Abstract: A method of forming three-dimensional structures includes forming a conductive layer on a substrate and patterning a resist layer over the conductive layer, the resist layer having contained therein a plurality of vias. An electrically conductive polymer is then electro-deposited in the vias. The electro-deposition operation is then stopped to form one or more of posts, posts having bulbous termini (i.e., mushrooms), or a layer atop the resist layer. The resist may be removed to yield the structure which may be further processed. For example, the structure may be pyrolyzed. In addition, biomolecules may also be adhered or otherwise affixed to the structure.

Abstract: This present invention provides a masking method for locally treating surface of a workpiece by masking the workpiece. The workpiece has a targeting treatment area and a non-targeting treatment area. The masking method includes: covering a fixture on the non-targeting treatment area of the workpiece to expose the targeting treatment area of the workpiece; by using an adsorbing force existing between the fixture and the workpiece, getting the fixture to closely contact with the non-targeting treatment area of the workpiece and to make an end edge of the fixture correspond to the edge of the targeting treatment area of the workpiece, wherein the adsorbing force is a vacuum adsorbing force or a static electric adsorbing force. Thereby the surface treatment only effects in an area within the range of the targeting treatment area of the workpiece so as to reduce the treatment defect.

Abstract: Provided is a metal member including a metal substrate and a covering layer disposed on a surface of the metal substrate, where the covering layer includes a region containing an insulating layer made of an insulating material, and a region containing an electrodeposited layer having a different texture from the insulating layer and formed by electrodeposition coating or electroplating. The metal member is manufactured by an insulating-layer-forming step of forming an insulating layer made of an insulating material on the entire surface of a region of the metal substrate in which the covering layer is to be formed, a removing step of removing a portion of the insulating layer to form an exposed portion of the metal substrate, and an electrodeposited-layer-forming step of applying a paint having a different texture from the insulating layer to the exposed portion by electrodeposition coating or electroplating to form an electrodeposited layer.

Abstract: A method of electroplating and depositing metal includes: providing an insulation substrate formed with conductive through holes; forming a first conductive layer on a first surface of the insulation substrate and forming a resist layer on a first portion of the first conductive layer, leaving a second portion of the first conductive layer uncovered by the resist layer as a to-be-plated area; disposing the insulation substrate in a first electroplating solution and depositing a first metal layer on the to-be-plated area; removing the resist layer and the portion of the first conductive layer; forming a second conductive layer on a second surface of the insulation substrate; forming a mask layer on the second conductive layer; disposing the insulation substrate in a second electroplating solution and depositing a second metal layer on the first metal layer of the to-be-plated area; and removing the mask layer and the second conductive layer.

Abstract: An electrode for forming an electrochemical cell with a substrate and a method of forming said electrode. The electrode comprises a carrier provided with an insulating layer which is patterned at a front side. Conducting material in an electrode layer is applied in the cavities of the patterned insulating layer and in contact with the carrier. A connection layer is applied at the backside of the carrier and in contact with the carrier. The periphery of the electrode is covered by the insulating material.

Abstract: Focused Electric Field Imprinting (FEFI) provides a focused electric field to guide an unplating operation and/or a plating operation to form very fine-pitched metal patterns on a substrate. The process is a variation of the electrochemical unplating process, wherein the process is modified for imprinting range of patterns of around 2000 microns to 20 microns or less in width, and from about 0.1 microns or less to 10 microns or more in depth. Some embodiments curve a proton-exchange membrane whose shape is varied using suction on a backing fluid through a support mask. Other embodiments use a curved electrode. Mask-membrane interaction parameters and process settings vary the feature size, which can generate sub-100-nm features. The feature-generation process is parallelized, and a stepped sequence of such FEFI operations, can generate sub-100-nm lines with sub-100-nm spacing. The described FEFI process is implemented on copper substrate, and also works well on other conductors.

Abstract: Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions.

Abstract: This instant disclosure provides a manufacturing method of circuit pattern. The method comprising, forming a substrate; forming a protection layer on the substrate for making the protection layer to be a curved surface along the surface of the substrate; executing a pattern processing for the protection layer to make the protection layer to form a first pattern on the substrate, wherein a slot region is obtained according to the inner side of the first pattern; coating a macromolecule coating to the slot region for forming an activated metal layer on the substrate, wherein the activated metal layer forms a circuit pattern respective to the slot region, the macromolecule coating includes at least a kind of metal material; removing the protection layer for exposing the activated metal layer with the circuit pattern. The manufacturing quality of the circuit pattern can be improved and the associated cost can be saved.

Abstract: A manufacturing method of a package carrier is provided. A supporting plate is provided, wherein a metal layer is already disposed on the supporting plate. A patterned dry film layer is formed on the metal layer. A portion of the metal layer is exposed by the patterned dry film layer. The patterned dry film layer is used as an electroplating mask to electroplate a surface treatment layer on the portion of the metal layer exposed by the patterned dry film layer. The patterned dry film layer is removed so as to expose the portion of the metal layer. The surface treatment layer is used as an etching mask to etch the portion of the metal layer not covered by the surface treatment layer so as to form a patterned metal layer.

Abstract: An electroplating method that includes: a) contacting a first substrate with a first article, which includes a substrate and a conformable mask disposed in a pattern on the substrate; b) electroplating a first metal from a source of metal ions onto the first substrate in a first pattern, the first pattern corresponding to the complement of the conformable mask pattern; and c) removing the first article from the first substrate, is disclosed. Electroplating articles and electroplating apparatus are also disclosed.

Abstract: A housing having a coating is disclosed. The housing comprises a base substrate made of metallic material; a micro-arc oxide layer formed on the base substrate; and a protection outer film formed on the micro-arc oxide layer and comprising a coating layer and a metallic layer, wherein the metallic layer is formed on the micro-arc oxide layer and covers a portion of the micro-arc oxide layer; and the coating layer is formed on a remaining portion of the micro-arc oxide layer so that the micro-arc oxide layer is covered by the metallic layer and the coating layer.

Abstract: The present invention relates to an electrodeposition composition intended particularly for coating a semiconductor substrate in order to fabricate structures of the “through via” type for the production of interconnects in integrated circuits. According to the invention, the said solution comprises copper ions in a concentration of between 14 and 120 mM and ethylenediamine, the molar ratio between ethylenediamine and copper being between 1.80 and 2.03 and the pH of the electrodeposition solution being between 6.6 and 7.5. The present invention also relates to the use of the said electrodeposition solution for the deposition of a copper seed layer, and to the method for depositing a copper a seed layer with the aid of the electrodeposition solution according to the invention.

Abstract: Methods of forming a conductive metal layers on substrates are disclosed which employ a seed layer to enhance bonding, especially to smooth, low-roughness or hydrophobic substrates. In one aspect of the invention, the seed layer can be formed by applying nanoparticles onto a surface of the substrate; and the metallization is achieved by electroplating an electrically conducting metal onto the seed layer, whereby the nanoparticles serve as nucleation sites for metal deposition. In another approach, the seed layer can be formed by a self-assembling linker material, such as a sulfur-containing silane material.

Abstract: A nanoscale lithographic method in which a reusable conductive mask, having a pattern of conductive surfaces and insulating surfaces, is positioned upon a substrate whose surface contains an electrically responsive resist layer over a buried conductive layer. When an electric field is applied between the conductive mask and buried conductive layer, the resist layer is altered in portions adjacent the conductive areas of the mask. Selective processing is performed on the surface of the substrate, after mask removal, to remove portions of the resist layer according to the pattern transferred from the mask. The substrate may be a target substrate, or the substrate may be utilized for a lithographic masking step of another substrate. In one aspect of the invention the electrodes to which the charge is applied are divided, such as into a plurality of rows and columns wherein any desired pattern may be created without the need to fabricate specific masks.

Abstract: An electrically conductive protective coating or film is provided over the surface of a reflective coating of a solar mirror by flowing or directing a cation containing liquid and an anion containing liquid onto the conductive surface. The cation and the anion containing liquids are spaced from, and preferably out of contact with one another on the surface of the reflective coating as an electric current is moved through the anion containing liquid, the conductive surface between the liquids and the cation containing liquid to coat the conductive surface with the electrically conductive coating.

Abstract: Disclosed is a composition comprising a source of metal ions, one or more suppressing agents and at least one additive comprising a linear or branched, polymeric biguanide compound comprising the structural unit of formula L1 or the corresponding salt thereof, wherein R1 is independently selected from H or an organic radical having 1-20 carbon atoms; R2 is an divalent organic radical having 1-20 carbon atoms, optionally comprising 20 polymeric biguanide side branches; and n is an integer of 2 or more.

Abstract: An electroplating apparatus and method for depositing a metallic layer on the surface of a wafer is provided wherein said apparatus and method do not require physical attachment of an electrode to the wafer. The surface of the wafer to be plated is positioned to face the anode and a plating fluid is provided between the wafer and the electrodes to create localized metallic plating. The wafer may be positioned to physically separate and lie between the anode and cathode so that one side of the wafer facing the anode contains a catholyte solution and the other side of the wafer facing the cathode contains an anolyte solution. Alternatively, the anode and cathode may exist on the same side of the wafer in the same plating fluid. In one example, the anode and cathode are separated by a semi permeable membrane.

Abstract: Various embodiments of the invention are directed to formation of mesoscale or microscale devices using electrochemical fabrication techniques where structures are formed from a plurality of layers as opened structures which can be folded over or other otherwise combined to form structures of desired configuration. Each layer is formed from at least one structural material and at least one sacrificial material. The initial formation of open structures may facilitate release of the sacrificial material, ability to form fewer layers to complete a structure, ability to locate additional materials into the structure, ability to perform additional processing operations on regions exposed while the structure is open, and/or the ability to form completely encapsulated and possibly hollow structures.

Abstract: An electroplating method that includes: a) contacting a first substrate with a first article, which includes a substrate and a conformable mask disposed in a pattern on the substrate; b) electroplating a first metal from a source of metal ions onto the first substrate in a first pattern, the first pattern corresponding to the complement of the conformable mask pattern; and c) removing the first article from the first substrate, is disclosed. Electroplating articles and electroplating apparatus are also disclosed.

Abstract: Improved termination features for multilayer electronic components are disclosed. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed internal electrode tabs and additional anchor tab portions which may optionally extend to the cover layers of a multilayer component. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. External anchor tabs positioned on top and bottom sides of a monolithic structure can facilitate the formation of wrap-around plated terminations.

Abstract: Methods and systems for masking interior surfaces of a part from exposure to a subsequent process. In some embodiments the interior surfaces are threaded. Methods include forming a plugged insert by overmolding a masking plug material into an opening in the insert, the plug being substantially impervious to exposure to a subsequent process. The plugged insert can then be assembled in the part and the part is exposed to the process. Processes can include anodizing, cleaning, machining and laser etch processes. After the process is complete, the plug is removed from the insert, leaving the insert in the part without the plug. The described embodiments describe methods for optimizing masking methods in a production setting. More specifically, embodiments describe methods for automatic insertion and removal of plugs in a part before and after exposure of the part to a process such as anodization.

Abstract: An electroplating jig for processing electroplating at a certain location, an electroplating method incorporating with the electroplating jig, and an electro product free of a plating proof layer produced by the electroplating method are provided. The electroplating jig includes a base and a flexible electric conductive pad. An accommodation slot and an opening are respectively installed on two opposite surfaces of the base in which an electro can be disposed in the accommodation slot and the accommodation slot is larger than the opening and communicated with the opening, the opening exposes a first metal pattern of the electro therefrom. The flexible electric conductive pad is blanketed on a second metal pattern formed on another surface of the electro to electrically connect the first metal pattern and the second metal pattern.

Abstract: The surface of cutters for dentistry is rendered passive to electroplating by immersion in a concentrated aqueous solution of nitric acid for a certain period of time. This is followed by painting a length including the surface marked out by the slots, the surface inside the slots and the surface at the tip, using an electrically insulating paint resistant to acids. Each cutter is then ground using a grinding wheel with rotating disk having an abrasive edge shaped like the continuous profile of the painted surface. Grinding removes the paint together with a micrometric layer of metal from the surface except for that inside the slots. The shank is ground and painted for a length adjacent to the slots.

Abstract: The invention relates to a method (3) of fabricating a mould (39, 39?, 39?) that includes the following steps: a) providing (10) a substrate (9, 9?) that has a top layer (21, 21?) and a bottom layer (23, 23?) made of electrically conductive, micromachinable material, and secured to each other by an electrically insulating, intermediate layer (22, 22?); b) etching (11, 12, 14, 2, 4) at least one pattern (26, 26?, 27) in the top layer (21, 21?) as far as the intermediate layer (22, 22?) to form at least one cavity (25, 25?) in said mould; c) coating (6, 16) the top part of said substrate with an electrically insulating coating (30, 30?); d) directionally etching (8, 18) said coating and said intermediate layer to limit the presence thereof exclusively at each vertical wall (31, 31?, 33) formed in said top layer. The invention concerns the field of micromechanical parts, in particular, for timepiece movements.

Abstract: Multi-layer structures are electrochemically fabricated from at least one structural material (e.g. nickel), that is configured to define a desired structure and which may be attached to a substrate, and from at least one sacrificial material (e.g. copper) that surrounds the desired structure. After structure formation, the sacrificial material is removed by a multi-stage etching operation. In some embodiments sacrificial material to be removed may be located within passages or the like on a substrate or within an add-on component. The multi-stage etching operations may be separated by intermediate post processing activities, they may be separated by cleaning operations, or barrier material removal operations, or the like. Barriers may be fixed in position by contact with structural material or with a substrate or they may be solely fixed in position by sacrificial material and are thus free to be removed after all retaining sacrificial material is etched.

Abstract: A method for modifying a surface by generating nanotubes at one or more selected sites on the surface, the surface including a first metal. The method includes the steps of positioning at least one cathode and at least one anode relative to the surface in an electrolyte solution including a fluoride salt of a second metal, and applying a voltage between the at least one anode and the at least one cathode sufficient to generate nanotubes at one or more selected sites on the surface and to inhibit nanotube formation at one or more of the other selected sites, wherein the nanotubes include the first metal and the second metal.

Abstract: Nano-scale structures are provided wherein nano-structures are formed on a substrate surface and a base material is applied between the nano-structures.

Abstract: Methods of treating a target surface of an article having one or more passageways includes fluidly connecting a pressure masker including pressurized masking fluid to a first side of at least one passageway, passing the pressurized masking fluid through the at least one passageway from the first side to a second side having the target surface, and treating the target surface of the article using a surface treatment system that disposes a surface treating material on the target surface, wherein the pressurized masking fluid passing through the at least one passageway prevents the surface treating material from permanently altering a cross sectional area of the at least one passageway.

Abstract: A method of forming a nano-structure (100?) involves forming a multi-layered structure (10) including an oxidizable material layer (14) established on a substrate (12), and another oxidizable material layer (16) established on the oxidizable material layer (14). The oxidizable material layer (14) is an oxidizable material having an expansion coefficient, during oxidation, that is more than 1. Anodizing the other oxidizable material layer (16) forms a porous anodic structure (16?), and anodizing the oxidizable material layer (14) forms a dense oxidized layer (14?) and nano-pillars (20) which grow through the porous anodic structure (16?) into pores (18) thereof. The porous structure (16?) is selectively removed to expose the nano-pillars (20). A surface (I) between the dense oxidized layer (14?) and a remaining portion of the oxidizable material layer (14) is anodized to consume a substantially cone-shaped portion (32) of the nano-pillars (20) to form cylindrical nano-pillars (20?).