Abstract: Disclosed are embodiments of a method that both monitors patterning integrity of etched openings (i.e., ensures that lithographically patterned and etched openings are complete) and forms on-chip conductive structures (e.g., contacts, interconnects, fuses, anti-fuses, capacitors, etc.) within such openings. The method embodiments incorporate an electro-deposition process to provide both the means by which pattern integrity of etched openings can be monitored and also the metallization required for the formation of conductive structures within the openings. Specifically, during the electro-deposition process, electron flow is established by applying a current to the back side of the semiconductor wafer, thus, eliminating the need for a seed layer. Electron flow through the wafer and into the electroplating solution is then monitored and used as an indicator of electroplating in the etched openings and, thereby, as an indicator that the openings are completely etched.

Abstract: Methods of inhibiting background plating on semiconductor substrates using oxidizing agents are disclosed.

Abstract: The invention relates to a method and to a device for electrochemical micro- and/or nano-structuring, which are reliable, fast, simple, easy to implement, and reproducible. For this purpose, the invention provides a method of electrochemically structuring a sample (12) of conductive or semiconductor material that has opposite front and rear faces (11 and 13).

Abstract: This invention provides a pattern reversal process for self aligned imprint lithography (SAIL). The method includes providing a substrate and depositing at least one layer of material upon the substrate. A pattern is then established upon the layer of material, the pattern providing at least one exposed area and at least one covered area of the layer of material. The exposed areas are treated to toughen the material and reverse the pattern. Subsequent etching removes the un-toughened material. A thin-film transistor device provided by the pattern reversal process is also provided.

Abstract: A method of fabricating three-dimensional structures from a plurality of adhered layers of at least a first and a second material wherein the first material is a conductive material and wherein each of a plurality of layers includes treating a surface of a first material prior to deposition of the second material. The treatment of the surface of the first material either (1) decreases the susceptibility of deposition of the second material onto the surface of the first material or (2) eases or quickens the removal of any second material deposited on the treated surface of the first material. In some embodiments the treatment of the first surface includes forming a dielectric coating over the surface and the second material is electrodeposited (e.g. using an electroplating or electrophoretic process). In other embodiments the first material is coated with a conductive material that doesn't readily accept deposits of electroplated or electroless deposited materials.

Abstract: A method in which a SOI substrate structure is fabricated by oxidation of graded porous Si is provided. The graded porous Si is formed by first implanting a dopant (p- or n-type) into a Si-containing substrate, activating the dopant using an activation anneal step and then anodizing the implanted and activated dopant region in a HF-containing solution. The graded porous Si has a relatively coarse top layer and a fine porous layer that is buried beneath the top layer. Upon a subsequent oxidation step, the fine buried porous layer is converted into a buried oxide, while the coarse top layer coalesces into a solid Si-containing over-layer by surface migration of Si atoms.

Abstract: To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in said first non-plating region. Then, an accelerator film is applied globally on the workpiece. A portion of the accelerator film is selectively removed from the field region, and another portion of the accelerator film remains in the recessed acceleration region. Then, metal is deposited onto the workpiece, and the metal deposits at an accelerated rate in the acceleration region, resulting in a greater thickness of metal in the acceleration region compared to metal in the non-activated field region. Then, metal is completely removed from the field region, thereby forming the metal feature.

Abstract: A method and apparatus for establishing more uniform deposition across one or more faces of a workpiece in an electroplating process. The apparatus employs eductors in conjunction with a flow dampener member and other measures to provide a more uniform current distribution and a more uniform metal deposit distribution as reflected in a coefficient of variability that is lower than conventional processes.

Abstract: An electrochemical plating apparatus and method for facilitating uniform current distribution across a wafer during loading into an ECP (electrochemical plating) apparatus is disclosed. The apparatus includes a bath container for containing a bath solution, an anode provided in the bath container, a cathode ring for supporting a wafer in the bath container and a current source electrically connected to the anode and the cathode ring. According to the method, a voltage potential is applied to the cathode ring as it is immersed into the solution and prior to immersion of the wafer in the solution, thereby facilitating a substantially uniform plating current across the wafer upon immersion of the wafer.

Abstract: A metallic film 43 that becomes the matrix of pad 32 is formed on semiconductor substrate 41. Next, through hole 31 is formed in the semiconductor substrate 41 facing the metallic film 43 at the portion corresponding to an area where the pad 32 is formed. Thereafter, penetration electrode 17 is formed in through hole 31. Next, penetration portion 49 to expose the side of the penetration electrode 17 is formed in the semiconductor substrate 41. Next, an insulative member 16 is formed to be filled up in at least the penetration portion 49. After that, the pad 32 is formed by patterning the metallic film 43.

Abstract: The present invention improves the wetting between electrolyte and the wafer surface when they are put into contact by pre-implementing an adsorbed liquid layer on the entire front surface of the wafer just prior to the plating process. The pre-implementing adsorbed liquid layer is realized by transporting vaporized liquid molecules from vapor phase at elevated temperature (relative to wafer) and condensing them onto wafer surface.

Abstract: A semiconductor substrate is anodized to be shaped into an optical lens. Prior to being anodized, the substrate is finished with an anode pattern on its bottom surface so as to be consolidated into a unitary structure in which the anode pattern is precisely reproduced on the substrate. The anodization utilizes an electrolytic solution which etches out oxidized portion as soon as it is formed as a result of the anodization, to thereby develop a porous layer in a pattern in match with the anode pattern. The anode pattern brings about an in-plane distribution of varying electric field intensity by which the porous layer develops into a shape complementary to a desired lens profile. Upon completion of the anodization, the semiconductor substrate is shaped into the lens by etching out the porous layer and the anode pattern from the substrate.

Abstract: A nanoelectronic device includes a nanostructure, such as a nanotube or network of nanotube, disposed on a substrate. Nanoparticles are disposed on or adjacent to the nanostructure so as to operatively effect the electrical properties of the nanostructure. The nanoparticles may be composed of metals, metal oxides or salts and nanoparticles composed of different materials may be present. The amount of nanoparticles may be controlled to preserve semiconductive properties of the nanostructure, and the substrate immediately adjacent to the nanostructure may remain substantially free of nanoparticles. A method for fabricating the device includes electrodeposition of the nanoparticles using one of more solutions of dissolved ions while providing an electric current to the nanostructures but not to the surrounding substrate.

Abstract: The present invention relates to methods and apparatus for plating a conductive material on a workpiece surface in a highly desirable manner. Using a workpiece-surface-influencing device, such as a mask or sweeper, that preferentially contacts the top surface of the workpiece, relative movement between the workpiece and the workpiece-surface-influencing device is established so that an additive in the electrolyte solution disposed on the workpiece and which is adsorbed onto the top surface is removed or otherwise its amount or concentration changed with respect to the additive on the cavity surface of the workpiece. Plating of the conductive material can place prior to, during and after usage of the workpiece-surface-influencing device, particularly after the workpiece surface influencing device no longer contacts any portion of the top surface of the workpiece, to achieve desirable semiconductor structures.

Abstract: A method of electrodepositing germanium compound materials on an exposed region of a substrate structure, which includes forming a plating solution by dissolving at least one germanium salt and at least one salt containing an element other than germanium in water; obtaining a substrate with a clean surface; immersing the substrate in the solution; and electroplating germanium compound materials on the substrate by applying an electrical potential between the substrate and an anode in the plating solution, in which the substrate is included in a semiconductor or phase change device.

Abstract: A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.

Abstract: A hybrid method of fabricating magnetic core elements of an on-chip inductor structure addresses issues associated with conventional bottom up and damascene magnetic core plating techniques. The process uses two seed layers: a low resistance seed layer that solves the IR drop problem associated with the damascene plating techniques and a high resistance seed layer that is local to magnetic core features thus avoiding eddy current related performance degradation associated with the bottom up techniques.

Abstract: A bipolar photo-electrochemical process is disclosed for electroless deposition (referred to as photo Bi-OCD) of a metallic compound onto the top surface of a semiconducting substrate whereby differential illumination of the front side of the substrate versus the back side of the substrate provides a driving force to separate the cathodic and anodic partial reactions leading to high yield deposition of the metallic compound. A selective photo Bi-OCD process is further disclosed whereby the top surface of the substrate is at least partly covered with an insulating pattern such that the deposition of the metallic compound takes place selectively into the openings of the pattern.

Abstract: To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in said first non-plating region. Then, an accelerator film is applied globally on the workpiece. A portion of the accelerator film is selectively removed from the field region, and another portion of the accelerator film remains in the recessed acceleration region. Then, metal is deposited onto the workpiece, and the metal deposits at an accelerated rate in the acceleration region, resulting in a greater thickness of metal in the acceleration region compared to metal in the non-activated field region. Then, metal is completely removed from the field region, thereby forming the metal feature.

Abstract: A disclosed form of mechanically assisted electroplating leads to a flat, thin, overburden. In one example, an accelerator is deposited on a copper surface and mechanically removed in a simplified CMP-like apparatus. The wafer is then plated in an electrolyte containing little or no accelerating additives.

Abstract: A copper electroplating bath composition and a method of copper electroplating to improve gapfill are provided. The method of electroplating includes providing an aqueous electroplating composition, comprising copper, at least one acid, at least one halogen ion, an additive including an accelerating agent, a suppressing agent, and a suppressing-accelerating agent, and the solution and mixture products thereof; contacting a substrate with the plating composition; and impressing a multi-step waveform potential upon the substrate, wherein the multi-step waveform potential includes an entry step, wherein the entry step includes a first sub-step applying a first current and a second sub-step applying second current, the second current being greater than the first current. The accelerating agent is provided in concentration of greater than 1.

Abstract: An apparatus which can control thickness uniformity during deposition of conductive material from an electrolyte onto a surface of a semiconductor substrate is provided. The apparatus has an anode which can be contacted by the electrolyte during deposition of the conductive material, a cathode assembly including a carrier adapted to carry the substrate for movement during deposition, and a conductive element permitting electrolyte flow therethrough. A mask lies over the conductive element and has openings permitting electrolyte flow. The openings define active regions of the conductive element by which a rate of conductive material deposition onto the surface can be varied. A power source can provide a potential between the anode and the cathode assembly so as to produce the deposition. A deposition process is also disclosed, and uniform electroetching of conductive material on the semiconductor substrate surface can additionally be performed.

Abstract: The invention relates to an electrolyte used in connection with the deposition of a gold-tin alloy on an electroplatable substrate. This solution generally includes water; stannous and/or stannic tin ions, a complexing agent to render the stannous and/or stannic tin ions soluble, complexed gold ions, and an alloy stabilizing agent that includes ethoxylated compounds with phosphate ester functional group, brightening additives based on ethoxylated phosphate esters and alkali metal fatty acids dipropionates. The brighteners may be used alone or in conjunction with each other to achieve beneficial synergistic effect. The alloy stabilizing agent is present in an amount sufficient to stabilize the composition of the gold-tin deposit over a usable current density range. The solution has a pH of between 2 and 10 and the gold ions and tin ions are present in relative amounts sufficient to provide a deposit having a gold content less than 90% by weight and a tin content greater than 10% by weight.

Abstract: A photosensitive film, which has a transparent support and a silver salt emulsion layer containing a silver salt formed thereon, is exposed and developed to form a metallic silver portion. The base material to be plated is electrified in an electrolytic solution free of plating substances, using the metallic silver portion as a cathode. Then, the electrified base material is subjected to an electroless plating treatment to form a first plated layer only on the metallic silver portion. The base material is subjected to an electroplating treatment to form a second plated layer on the first plated layer, further form a third plated layer on the second plated layer.

Abstract: A system for electrochemical mechanical polishing of a conductive surface of a wafer is provided. The system includes a wafer holder to hold the wafer and a belt pad disposed proximate to the wafer to polish the conductive surface. Application of a potential difference between conductive surface and an electrode and establishing relative motion between the belt pad and the conductive surface result in material removal from the conductive surface. Electrical contact to the surface is provided through either contacts embedded in the belt pad or contacts placed adjacent the belt pad.

Abstract: In one embodiment, the present invention includes a method for electroplating a plurality of metal bumps on a device side of a semiconductor wafer and planarizing the metal bumps by electropolishing to obtain a substantially uniform thickness for the plurality of metal bumps. Other embodiments are described and claimed.

Abstract: An accelerator solution is globally applied to a workpiece to form an accelerator film, and then a portion of the accelerator film is selectively removed from the workpiece to form an acceleration region having a higher concentration of accelerator. The higher concentration of accelerator causes metal to deposit at a faster rate in the acceleration region than in a non-accelerated region for the duration of metal deposition. To make a metal feature, a resist layer is applied to a workpiece surface and patterned to form a recessed region and a field region. Then, a metal seed layer is deposited on the workpiece surface. An accelerator solution is applied so that an accelerator film forms on the metal seed layer. A portion of the accelerator film is selectively removed from the field region, leaving another portion of the accelerator film in the recessed region.

Abstract: Disclosed herein is a method for manufacturing a semiconductor device, the method including the steps of: forming a recess in an insulating film provided over a substrate; forming a plating seed layer in such a way that an inner wall of the recess is covered, the plating seed layer arising from sequential deposition of an alloy layer composed of copper and a metal other than copper and a conductive layer composed mainly of copper; burying a conductive layer composed mainly of copper by plating in the recess on which the plating seed layer is provided; and carrying out heat treatment to cause the metal in the alloy layer to react with a constituent in the insulating film, to thereby form a barrier film composed of a metal compound having a copper diffusion barrier function at an interface between the alloy layer and the insulating film.

Abstract: A method, structure and system for forming a through-hole conductor in a semiconductor substrate includes forming a hole having an inner surface from a first side of the semiconductor substrate to a second side of the semiconductor substrate and plating the inner surface of the semiconductor substrate to form a conductive element when a plating solution is forced from the first side of the semiconductor substrate to the second side of the semiconductor substrate through the hole. The hole is plated in a generally planar plating topology from the first side to the second side of the semiconductor substrate. The through-hole conductor may be formed in a plating system where the semiconductor substrate forms at least a partial partition between a higher pressure bath and a lower pressure bath with the plating solution passing through the hole causing plating within the inner surface of the hole.

Abstract: Defects on the edge of copper interconnects for back end of the line semiconductor devices are alleviated by an interconnect that comprises an impure copper seed layer. The impure copper seed layer covers a barrier layer, which covers an insulating layer that has an opening. Electroplated copper fills the opening in the insulating layer. Through a chemical mechanical polish, the barrier layer, the impure an impure copper seed layer derived from an electroplated copper bath copper seed layer, and the electroplated copper are planarized to the insulating layer.

Abstract: A via plating system and method are provided. A preprocessing procedure is performed such that a pre-wetting solution is absorbed into a via hole, forming a wetting layer thereon. A plating process is then performed to form a plating layer inside the via hole. The preprocessing procedure to form the wetting layer improves the absorbing characteristics inside the via hole, allowing the plating layer to be more effectively formed.

Abstract: In a solar cell having p doped regions and n doped regions alternately formed in a surface of a semiconductor wafer in offset levels through use of masking and etching techniques, metal contacts are made to the p regions and n regions by first forming a base layer contacting the p doped regions and n doped regions which functions as an antireflection layer, and then forming a barrier layer, such as titanium tungsten or chromium, and a conductive layer such as copper over the barrier layer. Preferably the conductive layer is a plating layer and the thickness thereof can be increased by plating.

Abstract: A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion 36 horizontally holding and rotating a substrate with its surface to be plated facing upward. A seal material 90 contacts a peripheral edge portion of the surface, sealing the portion in a watertight manner. A cathode electrode 88 passes an electric current upon contact with the substrate. A cathode portion 38 rotates integrally with the substrate holding portion 36. An electrode arm portion 30 is above the cathode portion 38 and movable horizontally and vertically and has an anode 98 face-down. Plating liquid is poured into a space between the surface to be plated and the anode 98 brought close to the surface to be plated. Thus, plating treatment and treatments incidental thereto can be performed by a single unit.

Abstract: A multi step process, which forms a Group VIA material layer, such as a selenium (Se) layer, having a thickness greater than 500 nanometers. The process includes electroplating a Se material layer, which has an amorphous micro-structure and which exhibits high electrical resistivity, on a workpiece and subsequently annealing the Se layer. Annealing process transforms the amorphous structure of the Se layer into a crystalline structure which is conductive. After the annealing, another Se layer can be electroplated onto the annealed Se layer. The electroplating and annealing steps can be repeated until the desired Se layer thickness is reached.

Abstract: A lens array block comprises a plurality of lens barrels joined to one another form a three-dimensional unitary structure. Each lens barrel comprises a stepped cylindrical chamber having a through hole with an internal profile having first and second steps that are spaced apart through the height of the through hole, the second step being radially inward of the first step. An image capturing unit comprising the lens block array, and methods of fabrication and assembly are also described.

Abstract: A thin film magnetic head is described, the magnetic head having an insulating layer and a protrusion which has an upper portion and a base portion, and the upper portion has an extended portion. The insulating layer is present under the extending part. A method of manufacturing the magnetic head includes forming a first insulating layer around the lower core layer; simultaneously forming a coil layer by plating the lower core layer with a coil insulating underlayer interposed between the lower coil layer and a coil lead layer connected to the coil layer on the first insulating layer; forming a coil insulating layer of an inorganic material on the coil layer and the coil lead layer; and, simultaneously forming a first plating underlayer for forming an upper core layer by plating, a second plating underlayer on the first coil lead layer exposed through the plating-forming opening, and a current-carrying lead layer.

Abstract: An electroplating apparatus includes a reactor vessel having a segmented anode array positioned therein for effecting electroplating of an associated workpiece such as a semiconductor wafer. The anode array includes a plurality of ring-like anode segments which are preferably positioned in concentric, coplanar relationship with each other. The anode segments can be independently operated to create varying electrical potentials with the associated workpiece to promote uniform deposition of electroplated metal on the surface of the workpiece.

Abstract: A method comprising forming an interconnection opening through a dielectric material to a contact point; and electroplating a interconnection comprising copper in the contact opening using an electroplating bath comprising an alkoxylated sulfopropylated alkylamine. A method comprising forming an interconnection opening through a dielectric material to a contact point; lining the interconnection opening with a barrier layer and a seed layer; and electroplating an interconnection comprising copper in the contact opening using an electroplating bath comprising an alkoxylated sulfopropylated alkylamine.

Abstract: Methods for electrodeposition of copper on a noble metal layer of a work piece are provided. An exemplary method includes exposing the noble metal layer to an electrodeposition composition. The electrodeposition composition comprises a copper salt, a suppressor, an accelerator and an electrolyte. The electrodeposition of copper on a surface of the noble metal layer is initiated by application of a predetermined current density to the work piece. The electrodeposition of copper is terminated upon the occurrence of a predetermined event.

Abstract: An electroplating system (30) and process makes electrical current density across a semiconductor device substrate (20) surface more uniform during plating to allow for a more uniform or tailored deposition of a conductive material. The electrical current density modifiers (364 and 37) reduce the electrical current density near the edge of the substrate (20). By reducing the current density near the edge of the substrate (20), the plating becomes more uniform or can be tailored so that slightly more material is plated near the center of the substrate (20). The system can also be modified so that the material that plates on electrical current density modifier portions (364) of structures (36) can be removed without having to disassemble any portion of the head (35) or otherwise remove the structures (36) from the system. This in-situ cleaning reduces the amount of equipment downtime, increases equipment lifetime, and reduces particle counts.

Abstract: An electroplating method calls for immersing a body to be plated in a plating solution containing tin and bismuth to form a tin-bismuth alloy skin layer on surfaces of the body. The plating is carried out such that a solid tin metal and a solid bismuth metal placed in the plating solution are connected to an anode and the body to be plated is connected to a cathode of a power supply.

Abstract: A method for electroplating a copper deposit onto a semiconductor integrated circuit device substrate having submicron-sized features, and a concentrate for forming a corresponding electroplating bath. A substrate is immersed into an electroplating bath formed from the concentrate including ionic copper and an effective amount of a defect reducing agent, and electroplating the copper deposit from the bath onto the substrate to fill the submicron-sized reliefs. The occurrence of protrusion defects from superfilling, surface roughness, and voiding due to uneven growth are reduced, and macro-scale planarity across the wafer is improved.

Abstract: A method of wiring formation includes forming a feeder film partially on a substrate, forming on the substrate a plating base film via a physical film making method so that the plate base film partially overlaps the feeder film, forming a plated wiring on the plating base film using an electrolytic plating, and selectively removing at least an area of the feeder film which is exposed from the plated wiring, using a wet etching process.

Abstract: A device includes an integrated circuit and a deposited tin in electrical contact with a portion of the integrated circuit. The deposited tin is formed by electrodeposition from a bath. The deposited tin includes a residue characteristic of the bath. The bath includes a bath-soluble tin compound, a strong acid, and a sulfopropylated anionic surfactant. In another aspect, a composition includes between approximately 20 and 40 grams per liter of one of stannous methane sulfonate, stannous sulfate, and a mixture thereof, between approximately 100 and 200 grams per liter of one of methanesulfonic acid, sulfuric acid, and a mixture thereof, and between approximately 1 and 2 grams per liter of one or more polyethyleneglycol alkyl-3-sulfopropyl diethers. In another aspect, a method includes electroplating tin with a current density of greater than approximately 30 mA/cm2 and a plating efficiency of greater than approximately 95%.

Abstract: Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

Abstract: Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

Abstract: The present invention is directed to methods and compositions for depositing a noble metal alloy onto a microelectronic workpiece. In one particular aspect of the invention, a platinum metal alloy is electrochemically deposited on a surface of the workpiece from an acidic plating composition. The plated compositions when combined with high-k dielectric material are useful in capacitor structures.

Abstract: A method and apparatus for transmitting electrical signals and fluids to and/or from a microelectronic workpiece. An apparatus in accordance with one embodiment of the invention includes a shaft rotatable about a shaft axis and having a first end with a first electrical contact portion toward the first end, a second end opposite the first end, and an internal channel along the shaft axis between the first and second ends. The shaft can further have at least one first hole toward the first end with the first hole extending radially from the channel to an external surface of the shaft. The shaft can still further have at least one second hole toward the second end with the second hole extending from the channel to the external surface. A housing rotatably receives the shaft and has an aperture coupleable to a fluid source and/or fluid sink.

Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.

Abstract: The invention provides an apparatus and a method for achieving reliable, consistent metal electroplating or electrochemical deposition onto semiconductor substrates. More particularly, the invention provides uniform and void-free deposition of metal onto metal seeded semiconductor substrates having sub-micron, high aspect ratio features. The invention provides an electrochemical deposition cell comprising a substrate holder, a cathode electrically contacting a substrate plating surface, an electrolyte container having an electrolyte inlet, an electrolyte outlet and an opening adapted to receive a substrate plating surface and an anode electrically connect to an electrolyte. Preferably, a vibrator is attached to the substrate holder to vibrate the substrate in at least one direction, and an auxiliary electrode is disposed adjacent the electrolyte outlet to provide uniform deposition across the substrate surface.