Adhesive Or Autogenous Bonding Of Self-sustaining Preforms (e.g., Prefabricated Base, Etc.) Patents (Class 216/20)
  • Patent number: 9060458
    Abstract: A method for manufacturing a multi-layer printed circuit board includes: forming first bumps on one surface of a first copper layer at a predetermined interval; providing, on the first copper layer, an insulating layer through which the first bumps are penetrating; stacking a second copper layer on a top of the insulating layer; forming circuits by patterning the first copper layer and the second copper layer; laminating insulating films on top and bottom surfaces of the insulating layer on which the circuits have been formed; forming second bumps on one surface of a third copper layer and of a fourth copper layer at a predetermined interval; and stacking the third copper layer and fourth copper layer, provided with the second bumps, on the top and bottom surfaces of the insulating films.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: June 16, 2015
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yoong Oh, Cheol Ho Choi
  • Publication number: 20150131240
    Abstract: The invention concerns a method for production of electronic assembly (1) with 1.1 Supply of an electrically-conducting film (3), especially a support film (3a), 1.2 Supply of at least one electrical component (5) with at least one electrical contact site (5c), 1.3 Application of an adhesive (20) between the electrical component and a surface (30) of the electrically-conducting film, 1.4 Arrangement of the at least one component (5) with the at least one electrical contact site (5c) on the surface (30) of the electrically-conducting film (3) and fastening of the at least one component by formation of an adhesive joint between the electrical component and the surface, 1.5 Supply of the support (9), especially from a flexible material, 1.
    Type: Application
    Filed: May 22, 2012
    Publication date: May 14, 2015
    Applicant: Würth Elektronik Gmbh &Co. KG
    Inventor: Jan Kostelnik
  • Publication number: 20150129293
    Abstract: A printed circuit board and a method of manufacturing the same. In one embodiment, a printed circuit board includes: a core made of a glass material; an insulator surrounding the core; and a via connecting internal circuit layers through the core and the insulator.
    Type: Application
    Filed: November 11, 2014
    Publication date: May 14, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon CHO, Hyo Seung NAM, Yong Sam LEE, Seok Hwan AHN
  • Patent number: 9031684
    Abstract: A method and system for integrated circuit fabrication is disclosed. In an example, the method includes determining a first process parameter of a wafer and a second process parameter of the wafer, the first process parameter and the second process parameter corresponding to different wafer characteristics; determining a variation of a device parameter of the wafer based on the first process parameter and the second process parameter; constructing a model for the device parameter as a function of the first process parameter and the second process parameter based on the determined variation of the device parameter of the wafer; and performing a fabrication process based on the model.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nai-Han Cheng, Chin-Hsiang Lin, Chi-Ming Yang, Chun-Lin Chang, Chih-Hong Hwang
  • Publication number: 20150108085
    Abstract: The present invention provides a method of manufacturing a touch screen, comprising the steps of: a) forming a conductive layer on a substrate; b) forming an etching resist pattern on the conductive layer; and c) forming a conductive pattern having a line width smaller than the line width of the etching resist pattern by over-etching the conductive layer by using the etching resist pattern and a touch screen manufactured by the method. According to the present invention, a touch screen comprising a conductive pattern having an ultrafine line width can be economically and efficiently provided.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 23, 2015
    Inventors: Ji-Young HWANG, In-Seok HWANG, Sang-Ki CHUN, Dong-Wook LEE, Yong-Koo SON, Min-Choon PARK, Seung-Heon LEE, Beom-Mo KOO, Young-Jun HONG, Ki-Hwan KIM, Su-Jin KIM, Hyeon CHOI
  • Publication number: 20150108084
    Abstract: A method of manufacturing a multilayer flexible circuit comprises providing first and second flexible substrates, each comprising a conductor layer and an insulator layer. The conductor layer of the first substrate is a patterned conductor layer. The first and second substrates are laminated together using a double belt press through which the substrates move in a continuous process. The method may include patterning the conductor layer of the first substrate and/or the conductor layer of the second substrate using an etching method that includes exposing a dry film resist on the conductor layer to a pattern by carrying out a plurality of exposures of adjacent and/or overlapping areas.
    Type: Application
    Filed: January 24, 2013
    Publication date: April 23, 2015
    Inventor: Philip Johnston
  • Publication number: 20150101848
    Abstract: Disclosed herein are a surface-treated copper foil, a copper-clad laminate plate including the same, a printed circuit board using the same, and a method for manufacturing the same. In detail, the copper-clad laminate plate according to one implementation embodiment of the present invention includes: carrier; a peel layer formed on the carrier; a copper-clad layer formed on the peel layer; and a surface-treated layer formed on the copper-clad layer, in which the surface-treated layer includes a thiol-based compound. Therefore, the present invention provides a printed circuit board capable of improving an adhesive force between a base and a copper-clad layer without treating a roughed surface by forming the surface-treated layer on the copper-clad layer.
    Type: Application
    Filed: September 19, 2014
    Publication date: April 16, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ji Sung CHO, Toshiko Yokota, Makoto Dobashi, Seung Min Baek, Ichiro Ogura, Eun Jung Lim, Yoon Su Kim, Sung Han
  • Publication number: 20150101847
    Abstract: A rigid-flexible printed circuit board (PCB) a method for manufacturing the rigid-flexible PCB, and a PCB module having the rigid-flexible PCB are provided. The rigid-flexible printed circuit board (PCB) defines a first area, a second area, and a third area connected in the described order. The rigid-flexible PCB includes a first flexible PCB, a second flexible PCB adhered with the first flexible PCB through a bonding sheet in the third area, and, a first conductive layer and a second conductive layer formed on opposite side of the rigid-flexible PCB in the first area and the third area. The first flexible PCB is apart from the second flexible PCB in the first area and the second area.
    Type: Application
    Filed: October 13, 2014
    Publication date: April 16, 2015
    Inventor: HSIEN-MING TSAI
  • Publication number: 20150090476
    Abstract: A manufacturing method of a package carrier includes the following steps. Two base metal layers are bonded together. Two supporting layers are laminated onto the base metal layers respectively. Two release metal films are disposed on the supporting layers respectively. Each release metal film includes a first metal film and a second metal film separable from each other. Two first patterned metal layers are formed on the release metal films respectively. Each first patterned metal layer includes a pad pattern. Two dielectric layers are formed on the release metal films respectively and cover the corresponding first patterned metal layers. Each dielectric layer has a conductive via connecting to the corresponding pad pattern. Two second patterned metal layers are formed on the dielectric layers respectively. Each second patterned metal layer at least covers the conductive via. The base metal layers are separated from each other to form two independent package carriers.
    Type: Application
    Filed: December 5, 2013
    Publication date: April 2, 2015
    Applicant: SUBTRON TECHNOLOGY CO., LTD.
    Inventor: Shih-Hao Sun
  • Publication number: 20150090481
    Abstract: A manufacturing method of a package carrier includes the following steps. Firstly, two base metal layers are bonded together. Then, two supporting layers are laminated onto the base metal layers respectively. Next, two release metal films are disposed on the supporting layers respectively, wherein each of the release metal films includes a first metal film and a second metal film separable from each other. Next, two patterned metal layers are formed on the release metal films respectively, wherein each of the patterned metal layers is suitable for carrying and electrically connected to a chip. Then, the base metal layers are separated from each other to form two package carriers independent from each other. A package carrier formed by the manufacturing method described above is also provided.
    Type: Application
    Filed: November 22, 2013
    Publication date: April 2, 2015
    Applicant: Subtron Technology Co., Ltd.
    Inventor: Shih-Hao Sun
  • Publication number: 20150083688
    Abstract: A system for the manufacture of an end effector assembly which is configured for use with an electrosurgical instrument configured for performing an electrosurgical procedure is provided. The system includes a photolithography module that is configured to etch one or more pockets on a seal surface of the seal plate. A vacuum module is configured to raise, transfer and lower a spacer from a location remote from the pocket(s) on the seal plate to the pocket on the seal plate(s). An adhesive dispensing module is configured to dispense an adhesive into the pocket on the seal plate. An optical module is configured to monitor a volume of the adhesive dispensed within the pocket and monitor placement of the spacer within the pocket.
    Type: Application
    Filed: December 2, 2014
    Publication date: March 26, 2015
    Inventors: KIM V. BRANDT, ALLAN G. AQUINO
  • Publication number: 20150087007
    Abstract: A microfluidic device useable for performing live cell computed tomography imaging is fabricated with a cover portion including a first wafer with at least one metal patterned thereon, a base portion including a second wafer with at least one metal patterned thereon and negative photoresist defining recesses therein, and a diffusive bonding layer including a negative photoresist arranged to join the cover portion and the base portion. A composition useful in live cell computer topography includes a long-chain polysaccharide at a concentration of from about 0.01% to about 10.0% in cell culture medium for supporting cell life while enabling cell rotation rate to be slowed to a speed commensurate with low light level imaging.
    Type: Application
    Filed: September 25, 2014
    Publication date: March 26, 2015
    Applicant: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Ariz
    Inventors: Deirdre Meldrum, Roger Johnson, Iniyan Soundappa Elango, Andrew Shabilla, Hong Wang, Jakrey Myers, Laimonas Kelbauskas, Dean Smith, Pimwadee Limsirichai
  • Publication number: 20150077949
    Abstract: Provided is a flexible device, which includes a flexible substrate, a plurality of electrode lines provided on the flexible substrate and configured to contact the following anisotropic conductive film and then extend to a side of the flexible substrate, an anisotropic conductive film configured to contact the electrode line and laminated on the flexible substrate, a plurality of bumps provided on the anisotropic conductive film, and a circuit board having an electronic device provided at one side thereof and configured to contact the plurality of bumps.
    Type: Application
    Filed: September 5, 2014
    Publication date: March 19, 2015
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Kyung Wook Baek, Keon Jae Lee, Geon Tae Hwang, Hyeon Kyun Yoo, Do Hyun Kim, Yoo Sun Kim
  • Patent number: 8980676
    Abstract: A method of forming a window cap wafer (WCW) structure for semiconductor devices includes machining a plurality of cavities into a front side of a first substrate; bonding the first substrate to a second substrate, at the front side of the first substrate; removing a back side of the first substrate so as to expose the plurality of cavities, thereby defining the WCW structure comprising the second substrate and a plurality of vertical supports comprised of material of the first substrate.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: March 17, 2015
    Assignee: Raytheon Company
    Inventors: Buu Diep, Stephen H. Black
  • Publication number: 20150065840
    Abstract: Improved stretchable printed circuit boards, and fabrication methods thereof, are described. The improved stretchable printed circuit boards include a serpentine conductive trace enclosed by stretchable dielectric material. The stretchable dielectric material has a serpentine shape itself, realized by crenulated edges. The crenulated edges reduce torsional strain on the conductive trace and are formed, for example, by cutting away sections of the stretchable dielectric material proximate segments of the serpentine conductive trace where the serpentine conductive trace changes direction.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 5, 2015
    Inventor: Matthew Bailey
  • Publication number: 20150053465
    Abstract: An approach for making thin flexible circuits. A layer of dielectric may have one or two surfaces coated with metal. The dielectric and the metal may each have a sub-mil thickness. The dielectric may be held in a fixture for fabrication like that of integrated circuits. The metal may be patterned and have components attached. More layers of dielectric and patterned metal may be added to the flexible circuit. Also bond pads and connecting vias may be fabricated in the flexible circuit. The flexible circuit may be cut into a plurality of smaller flexible circuits.
    Type: Application
    Filed: October 17, 2014
    Publication date: February 26, 2015
    Inventors: Daniel Youngner, Son Thai Lu, Helen Chanhvongsak, Lisa Lust, Douglas Carlson
  • Publication number: 20150047884
    Abstract: Provided is a copper foil for a printed wiring board including a roughened layer on at least one surface thereof. In the roughened layer, the average diameter D1 at the particle bottom being apart from the bottom of each particle by 10% of the particle length is 0.2 to 1.0 ?m, and the ratio L1/D1 of the particle length L1 to the average diameter D1 at the particle bottom is 15 or less. In the copper foil for printed wiring board, when a copper foil for printed wiring having a roughened layer is laminated to a resin and then the copper layer is removed by etching, the sum of areas of holes accounting for the resin roughened surface having unevenness is 20% or more. The present invention involves the development of a copper foil for a semiconductor package substrate that can avoid circuit erosion without causing deterioration in other properties of the copper foil.
    Type: Application
    Filed: March 26, 2013
    Publication date: February 19, 2015
    Inventors: Tomota Nagaura, Michiya Kohiki, Terumasa Moriyama
  • Publication number: 20150040675
    Abstract: A pressure sensor includes a top cap with a recess formed in an end of the top cap and a cavity formed in the end of the top cap to communicate with the recess. The cavity extends further axially into the top cap than the recess thereby having depth greater than a depth of the recess. Outer edges of the recess extend laterally outward beyond outer edges of the cavity thereby defining a bonding boundary. A silicon substrate has a sensing circuit on a top side thereof. The top cap is bonded to the top side of the silicon substrate in a range from the outer edges of the top cap to the bonding boundary. The recess and the cavity of the top cap face the top side of the silicon substrate and form a reference vacuum cavity. When pressure is exerted on a backside of the substrate, a portion of the substrate is constructed and arranged to deflect.
    Type: Application
    Filed: May 29, 2014
    Publication date: February 12, 2015
    Applicant: Continental Automotive Systems, Inc.
    Inventor: Xiaoyi Ding
  • Publication number: 20150042906
    Abstract: Disclosed herein is a touch sensor module, including: a window substrate; a touch sensor formed to face the window substrate and having an electrode pattern on a surface; an adhesive layer coupling the window substrate with the touch sensor; and a first moisture prevention layer formed along an outer edge of the touch sensor.
    Type: Application
    Filed: August 5, 2014
    Publication date: February 12, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young An CHOI, Kyoung Soo CHAE, Gwan Ha JEONG, Ji Soo LEE
  • Publication number: 20150034365
    Abstract: A method for manufacturing a wiring board includes preparing a wiring board having an insulation layer, a conductive pattern and a solder-resist layer laminated such that the solder-resist layer is covering the conductive pattern and exposing a conductive pad portion of the conductive pattern, applying microwave plasma on the wiring board in a nonoxidative atmosphere such that the wiring board undergoes microwave plasma treatment in the nonoxidative atmosphere, and forming a surface-treatment layer on the conductive pad portion of the conductive pattern after the applying of microwave plasma on the wiring board.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 5, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Hiroyuki NISHIOKA, Shinsuke Ishikawa
  • Publication number: 20150034590
    Abstract: The present invention provides a method for producing a printed-wiring board in a semi-additive process, comprising the steps of: providing a chemical copper plating 4 on an insulation layer 3 or forming a copper thin film on the insulation layer 3 using a sputtering method; subjecting the obtained copper surface 4 to a roughening treatment using an etching solution containing 0.1 to 3% by mass of hydrogen peroxide, 0.3 to 5% by mass of sulfuric acid, 0.1 to 3 ppm of halogen ion and 0.003 to 0.3% by mass of tetrazoles; attaching a dry film resist 5 to the copper surface 4 after the roughening treatment to perform exposure and development and providing an electrolytic copper plating 7 to an opening 6 after the exposure; and subjecting the remaining dry film resist to a stripping treatment using a resist stripping liquid containing 0.5 to 20% by mass of monoethanolamine, 0.2 to 10% by mass of quaternary ammonium hydroxide, 0.01 to 10% by mass of ethylene glycols and 0.01 to 0.5% by mass of azoles.
    Type: Application
    Filed: July 16, 2014
    Publication date: February 5, 2015
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Kenichi TAKAHASHI, Kazuhiko IKEDA
  • Patent number: 8943685
    Abstract: A method of manufacturing a capacitor-embedded printed circuit board using a first conductive layer formed on one side of an insulation layer, the method including: forming a second conductive layer on one side of the first conductive layer; forming a second electrode by removing a portion of the second conductive layer; forming a first electrode by removing a portion of the first conductive layer in correspondence with the second electrode; and forming a dielectric layer on one side of the second electrode.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: February 3, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Young Do Kweon, Sung Yi, Hong-Won Kim
  • Publication number: 20150027752
    Abstract: A wiring cover layer is formed on a base insulating layer with a conductor trace sandwiched therebetween. A cover insulating layer is formed on the base insulating layer to cover the wiring cover layer. A terminal cover layer is formed to cover a terminal portion of the conductor trace. A projection of the wiring cover layer projects from an upper surface of the wiring portion to a position above the terminal portion. An end surface of the projection is positioned inward from an end of the cover insulating layer. An insert portion of the terminal cover layer is formed between an upper surface of the terminal portion and a lower surface of the end of the cover insulating layer. A projection of the terminal cover layer is formed between the upper surface of the terminal portion and a lower surface of the projection of the wiring cover layer.
    Type: Application
    Filed: July 16, 2014
    Publication date: January 29, 2015
    Inventor: Hayato TAKAKURA
  • Publication number: 20150021183
    Abstract: An apparatus and method for performing analysis and identification of molecules have been presented. In one embodiment, a portable molecule analyzer includes a sample input/output connection to receive a sample, a nanopore-based sequencing chip to perform analysis on the sample substantially in real-time, and an output interface to output result of the analysis.
    Type: Application
    Filed: October 1, 2014
    Publication date: January 22, 2015
    Inventor: Daniel Wai-Cheong So
  • Publication number: 20150008021
    Abstract: A printed wiring board includes an interlayer resin insulation layer, multiple pads formed on the interlayer resin insulation layer, and multiple metal posts having bonding material portions and positioned on the pads, respectively, such that the metal posts are bonded to the pads through the bonding material portions of the metal posts, respectively.
    Type: Application
    Filed: June 27, 2014
    Publication date: January 8, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Naoto Ishida, Kota Noda
  • Publication number: 20140360568
    Abstract: Provided is a collector sheet for a solar cell, wherein the collector sheet for solar cell can prevent short circuiting between a non-photoreception surface side element and a wiring section, as well as cushioning shocks. This collector sheet (2) for a solar cell has a circuit (22) on the surface of a resin substrate (21). A sealing material layer (23) is stacked on the circuit (22), and in the sealing material layer (23) on the wiring section (221) is formed a conductive recessed part (24) through which the wiring section (221) is exposed, in order to provide conductivity between an electrode (4) on the non-photoreception surface side of the solar cell element (1), and the wiring section (221) corresponding thereto, with the sealing material layer (23) therebetween.
    Type: Application
    Filed: February 29, 2012
    Publication date: December 11, 2014
    Inventors: Takayuki Komai, Satoshi Emoto
  • Patent number: 8906245
    Abstract: A method for transferring PMMA-coated graphene can transfer graphene to a wide variety of different substrate surfaces. It transfers graphene to different surfaces by using of Poly(methyl methacrylate) (PMMA), polymer such as sponge, and deionized (DI) water. This method comprises easy steps of coating CVD graphene with a layer of PMMA; placing the PMMA-coated CVD graphene onto a polymer to form a PMMA-coated CVD graphene on the surface of a polymer; putting this polymer with PMMA-coated CVD graphene in DI water, and finally scooping up the PMMA-coated CVD graphene with one target substrate. In this way, it transfers the CVD graphene to a target substrate surface.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: December 9, 2014
    Inventor: Richard S. Ploss, Jr.
  • Publication number: 20140347717
    Abstract: An electrophoretic display panel includes a driving substrate and an electrophoretic display substrate. The driving substrate includes a first base material, driving electrode patterns, conductive lines, and a shielding layer. The first base material has a first configuration region and a second configuration region. The driving electrode patterns are located inside the first configuration region. The conductive lines are respectively connected to the driving electrode patterns and respectively extend from the first configuration region to the second configuration region. The shielding layer shields the conductive lines and exposes the driving electrode patterns. The electrophoretic display substrate includes a second base material located opposite to the first base material, an electrode layer, and display media. The electrode layer is disposed on the second base material and between the first and second base materials.
    Type: Application
    Filed: August 7, 2014
    Publication date: November 27, 2014
    Inventors: Hsu-Cheng Yeh, Ming-Chuan Hung
  • Publication number: 20140345911
    Abstract: A rigid flexible printed circuit board, having a rigid region and a flexible region, includes, in one embodiment: a base substrate including a portion in the rigid region and a portion in the flexible region; a coverlay formed on the base substrate; a first insulating layer formed on the coverlay and formed in the rigid region; a second insulating layer formed on the first insulating layer; and an outer layer circuit layer formed on the second insulating layer. Also described is a method of manufacturing a rigid flexible printed circuit board having a rigid region and a flexible region.
    Type: Application
    Filed: May 20, 2014
    Publication date: November 27, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yang Je LEE, Jee Hoon Kim, Jae Ho Shin, Hyung Ju Cho
  • Publication number: 20140342127
    Abstract: A method for transfer of a two-dimensional material includes forming a spreading layer of a two-dimensional material on a first substrate. The spreading layer has at least one monolayer. A stressor layer is formed on the spreading layer. The stressor layer is configured to apply stress to a closest monolayer of the spreading layer. The closest monolayer is exfoliated by mechanically splitting the spreading layer wherein at least the closest monolayer remains on the stressor layer. The at least one monolayer is stamped against a second substrate to adhere remnants of the two-dimensional material on the at least one monolayer to the second substrate to provide a single monolayer on the stressor layer. The single monolayer is transferred to a third substrate.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 20, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christos D. Dimitrakopoulos, Keith E. Fogel, Jeehwan Kim, Hongsik Park
  • Publication number: 20140338452
    Abstract: A tri-axial MEMS accelerometer includes a top cap silicon wafer and a bottom cap silicon wafer coupled with a measurement mass. The measurement mass has a two level structure, each level having an inner frame coupled to an outer frame by a plurality of first elastic beams, a mass coupled to the inner frame by a plurality of second elastic beams, and a comb coupling structure between the mass and the inner frame. The comb coupling structures are arranged in an orthogonal orientation. The top level and bottom level measurement masses measure acceleration in perpendicular directions. The top level and bottom level measurement masses and the inner frame form an integral unit which moves along a third direction. Acceleration in the third direction is measured from the change in capacitance between the integral unit and the top cap silicon wafer and bottom cap silicon wafer.
    Type: Application
    Filed: May 6, 2014
    Publication date: November 20, 2014
    Applicant: Chinese Academy of Sciences Institute of Geology and Geophysics
    Inventors: Chen Sun, Lian Zhong Yu
  • Publication number: 20140332253
    Abstract: A carrier substrate includes a dielectric layer, a first circuit layer, an insulation layer, conductive blocks, and a first conductive structure. The dielectric layer has a first surface, a second surface, and blind vias. The first circuit layer is embedded in the first surface and the blind vias extend from the second surface to the first circuit layer. The insulation layer is disposed on the first surface and has a third surface, a fourth surface, and first openings. The first openings expose the first circuit layer and an aperture of each first opening is increased gradually from the third surface to the fourth surface. The conductive blocks fill the first openings and connect with the first circuit layer. The first conductive structure includes conductive vias filling the blind vias and a second circuit layer disposed on a portion of the second surface.
    Type: Application
    Filed: August 14, 2013
    Publication date: November 13, 2014
    Applicant: Unimicron Technology Corp.
    Inventor: Chun-Ting Lin
  • Patent number: 8872040
    Abstract: A wiring structure includes: an insulating film formed over a substrate; a plurality of wirings formed on the insulating film; and an inducing layer, which is formed on the insulating film in a region between the plurality of wirings, a constituent atoms of the wirings are diffused in the inducing layer.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: October 28, 2014
    Assignee: Fujitsu Limited
    Inventors: Tsuyoshi Kanki, Shoichi Suda, Yoshihiro Nakata
  • Publication number: 20140307404
    Abstract: An embedded electronic device and a method for manufacturing the same wherein the embedded electronic device is composed of a printed circuit board, having a top surface and a bottom surface, a plurality of circuit components attached to the top surface of the printed circuit board having a plurality of standoffs on the bottom surface of the printed circuit board, a bottom overlay attached to the bottom surface of the printed circuit board, a top overlay positioned above the top surface of the printed circuit board and a core layer positioned between the top surface of the printed circuit board and the top overlay.
    Type: Application
    Filed: May 5, 2014
    Publication date: October 16, 2014
    Inventor: Robert Singleton
  • Publication number: 20140296078
    Abstract: Disclosed is a splicing method of two second-generation ReBCO high temperature superconductor coated conductors (2G ReBCO HTS CCs), in which, with stabilizing layers removed from the two strands of 2G ReBCO HTS CCs through chemical wet etching or plasma dry etching, surfaces of the two high temperature superconducting layers are brought into direct contact with each other and heated in a splicing furnace in a vacuum for micro-melting portions of the surfaces of the high temperature superconducting layers to permit inter-diffusion of ReBCO atoms such that the surfaces of the two superconducting layers can be spliced to each other and oxygenation annealing for recovery of superconductivity which was lost during splicing.
    Type: Application
    Filed: October 29, 2012
    Publication date: October 2, 2014
    Inventors: Young-Kun Oh, Hee-Sung Ann, Myung-Whon Lee, Hai-Gun Lee
  • Publication number: 20140284304
    Abstract: The invention provides a method of fabricating test strips for measuring biological blood. The method comprises steps: preparing an insulating membrane material; printing a metallic circuit layer on the insulating membrane material by a metallic ionic ink; performing a surface treatment for the metallic circuit layer expose metallic ions of the metallic ionic ink; chemical plating for the exposed metallic ions of the metallic circuit layer to form an electrode section on the metallic circuit layer; providing a sensing reagent on the electrode section to form a sensing reagent layer; sequentially adhering an intermediate layer and a cover to the insulating membrane material to cover the metallic circuit layer and expose part of the metallic circuit layer; and cutting the insulating membrane material to form a plurality of insulating sheets. The test strip is provided to enhance the stability of resistance and the test accuracy.
    Type: Application
    Filed: September 5, 2013
    Publication date: September 25, 2014
    Applicant: Ichia Technologies, Inc.
    Inventor: Ko-Ju CHEN
  • Patent number: 8840797
    Abstract: A unique and cost-effective method for producing a multilayer ceramic structure by using a first green film that contains a ceramic material, and the multilayer ceramic structure produced thereby. The method including the steps of: (a) producing at least one porous region in the first green film, the at least one porous region extending from the surface of the first green film; (b) applying a first layer, in sections, to the surface of the first green film, wherein one section of the first layer is located above the at least one porous region produced in step (a); (c) positioning at least one additional green film on the surface of the first green film, to which the first layer has been applied; (d) laminating the first green film and the at least one additional green film to form a green film composite; and (e) sintering the green film composite.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: September 23, 2014
    Assignees: Micro Systems Engineering GmbH, Technische Universitaet Wien
    Inventors: Thomas Haas, Dieter Schwanke, Achim Bittner, Ulrich Schmid
  • Publication number: 20140239768
    Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate of a single crystal material having a top side including a patterned dielectric layer thereon including a thick and a thin dielectric region, and a through-substrate via (TSV) extending a full thickness of the first substrate. The TSV is formed of the single crystal material, is electrically isolated by isolation regions in the single crystal material, and is positioned under a top side contact area of the first substrate. A membrane layer is bonded to the thick dielectric region and over the thin dielectric region to provide a movable membrane over a micro-electro-mechanical system (MEMS) cavity. A metal layer is over the top side substrate contact area and over the movable membrane including coupling of the top side substrate contact area to the movable membrane.
    Type: Application
    Filed: February 27, 2013
    Publication date: August 28, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: PETER B. JOHNSON, IRA OAKTREE WYGANT
  • Publication number: 20140240404
    Abstract: An inkjet device includes a pumping chamber bounded by a wall, a piezoelectric layer disposed above the pumping chamber, a ring electrode having an annular lower portion disposed on the piezoelectric layer. A moisture barrier layer covers a remainder of the piezoelectric layer over the pumping chamber that is not covered by the annular lower portion of the ring electrode.
    Type: Application
    Filed: February 28, 2013
    Publication date: August 28, 2014
    Applicant: FUJIFILM CORPORATION
    Inventors: Youming Li, Yoshikazu Hishinuma, Jeffrey Birkmeyer
  • Publication number: 20140242350
    Abstract: A process for the production of a layered body S2 (1), comprising the process steps: i) provision of a layered body S1 (2) comprising a substrate (3) and an electrically conductive layer (4) which is applied to the substrate (3) and comprises an electrically conductive polymer P1; ii) bringing of at least a first region Du (7) of the electrically conductive layer (4) into contact with a composition Z1 for reduction of the electrical conductivity of this first region Du (7), wherein the electrically conductive layer (4) has a temperature in a range of from more than 40 to 100° C. during the bringing into contact.
    Type: Application
    Filed: July 6, 2012
    Publication date: August 28, 2014
    Applicant: Heraeus Precious Metals GmbH & Co. KG
    Inventors: Udo Guntermann, Detlef Gaiser, Myriam Grasse, Akio Ishikawa
  • Patent number: 8816218
    Abstract: A multilayer composite electronic structure comprising at least two feature layers extending in an X-Y plane and separated by a via layer comprising a dielectric material that is sandwiched between two adjacent feature layers, the via layer comprising via posts that couple adjacent feature layers in a Z direction perpendicular to the X-Y plane, wherein a first via has different dimensions in the X-Y plane from a second via in the via layer.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: August 26, 2014
    Assignee: Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd.
    Inventor: Dror Hurwitz
  • Publication number: 20140224528
    Abstract: The present invention provides a flexible circuit board, comprising at least a multilayer unit disposed on a substrate, wherein the multilayer unit includes: an adhesion enhancing layer formed within the surface of the substrate, a first electrical conducting unit disposed on the adhesion enhancing layer, and a second electrical conducting layer formed on the first electrical conducting layer, wherein the adhesion enhancing layer is Palladium, the first electrical conducting layer is Nickel, and the substrate is composed of polyimide(PI).
    Type: Application
    Filed: March 28, 2013
    Publication date: August 14, 2014
    Applicant: ICHIA TECHNOLOGIES,INC.
    Inventors: CHIEN-HWA CHIU, CHIH-MIN CHAO, PEIR-RONG KUO, CHIA-HUA CHIANG, CHIH-CHENG HSIAO, FENG-PING KUAN, YING-WEI LEE, YUNG-CHANG JUANG
  • Publication number: 20140209564
    Abstract: The present invention is directed to the fabrication of thin aluminum anode batteries using a highly reproducible process that enables high volume manufacturing of the galvanic cells. A method of fabricating a thin aluminum anode galvanic cell is provided, the method including, depositing a layer of catalytic metal on a surface of a first substrate, depositing and patterning a benzocyclobutene layer to form a reservoir having four sidewalls of benzocyclobutene on the surface of the catalytic layer, depositing a layer of aluminum on a surface of a second substrate and bonding the first substrate to the second substrate to form a galvanic cell bounded by the catalytic metal layer and the aluminum layer and separated by the reservoir walls of benzocyclobutene, the second substrate positioned in overlying relation to contact the four sidewalls of the reservoir with the aluminum layer facing the catalytic layer.
    Type: Application
    Filed: August 30, 2013
    Publication date: July 31, 2014
    Applicant: UNIVERSITY OF SOUTH FLORIDA
    Inventors: Andres M. Cardenas-Valencia, Jay Dlutowski, Melynda C. Calves, John Bumgarner, Larry Langebrake
  • Patent number: 8790520
    Abstract: A method for manufacturing a Z-directed component for insertion into a mounting hole in a printed circuit board according to one example embodiment includes punching a plurality of segments out of at least one sheet of substrate material to form a plurality of layers of the Z-directed component. A channel is formed through the substrate material either before or after the segments are punched. At least one of the formed layers includes at least a portion of the channel. A conductive material is applied to at least one surface of at least one of the formed layers. A stack of the formed layers is combined to form the Z-directed component.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: July 29, 2014
    Assignee: Lexmark International, Inc.
    Inventors: Paul Kevin Hall, Keith Bryan Hardin, Zachary Charles Nathan Kratzer, Qing Zhang
  • Patent number: 8779598
    Abstract: Embodiments described herein provide a method of manufacturing integrated circuit (IC) devices. The method includes coupling a first surface of a first intermediate substrate to a first surface of a second intermediate substrate, forming a first plurality of patterned metal layers on a second surface of the first intermediate substrate to form a first substrate and a second plurality of patterned metal layers on a second surface of the second intermediate substrate to form a second substrate, and separating the first and second substrates. Each of the first substrate and the second substrate is configured to facilitate electrical interconnection between a respective IC die and a respective printed circuit board (PCB).
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: July 15, 2014
    Assignee: Broadcom Corporation
    Inventors: Fan Yeung, Raymond (Kwok Cheung) Tsang, Edward Law
  • Patent number: 8771526
    Abstract: A method of manufacturing a composite concrete article comprising affixing at least one layer of textile to a base layer and incorporating the base layer into a body of wet uncured concrete such that the base layer becomes embedded in the concrete, whereby at least a portion of the at least one textile layer defines at least a portion of a surface of the cured concrete article with the base layer embedded within the concrete to anchor the textile layer to the concrete.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: July 8, 2014
    Assignee: University of Ulster
    Inventors: Patricia Clare Belford, Ruth Ellen Morrow
  • Patent number: 8764998
    Abstract: A method for manufacturing a composite substrate that prevents undesirable effects of etching a thin film includes a pattern forming step, an ion implanting step, a bonding step, and a separation step. In the pattern forming step, a pattern region and a reverse pattern region are formed on a principal surface of a functional material substrate. In the ion implanting step, by implanting ions into the functional material substrate, a separation layer is formed inside at a certain distance from the surface of each of the pattern region and the reverse pattern region. In the bonding step, the functional material substrate at the pattern region is bonded to a supporting substrate. In the separation step, the pattern region is separated from the functional material substrate, and the reverse pattern region is made to fall off.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: July 1, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kiyoto Araki, Takashi Iwamoto, Hajime Kando
  • Publication number: 20140174798
    Abstract: Disclosed herein are a metal core substrate and a method of manufacturing the same. The method of manufacturing a metal core substrate includes: forming a metal layer into which connection bridges are inserted; laminating an insulating layer and a copper foil on an upper surface and a lower surface of the metal layer en bloc; and removing the connection bridges.
    Type: Application
    Filed: December 11, 2013
    Publication date: June 26, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.,
    Inventors: Jae Hoon CHOI, Jong Kuk HONG
  • Publication number: 20140177193
    Abstract: An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a release layer having a lower release layer surface, an upper release layer surface parallel to the lower release layer surface, and at least one release layer side, the release layer coupled with the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the release layer side and lower release layer surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Inventors: Liwen Jin, Dilan Seneviratne
  • Publication number: 20140175049
    Abstract: Roll-to-roll processes for manufacturing touch sensors using a sheet of patterned photoresist film are disclosed. The photoresist film can include a sheet of photoresist material, such as DFR, that has been patterned by removing portions of the photoresist film using a die or laser cutting technique. In some examples, the photoresist film can be patterned such that the patterned photoresist film can be laminated to a base film and used as an etching mask or a photoresist layer in a roll-to-roll manufacturing process. In this way, the patterned photoresist film can be used in place of conventional photoresist films in roll-to-roll processes, thereby obviating the need for subsequent exposure and development operations that would otherwise be performed when using conventional photoresist films. As a result, the chance that a defect is introduced into the touch sensors is reduced by reducing the number of operations performed in the roll-to-roll process.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Applicant: Apple Inc.
    Inventors: Siddharth MOHAPATRA, Sunggu KANG, John Z. ZHONG