Etching Of Semiconductor Material To Produce An Article Having A Nonelectrical Function Patents (Class 216/2)
  • Patent number: 8529773
    Abstract: The present invention discloses a method for making a MEMS device, comprising: providing a zero-layer substrate; forming a MEMS device region on the substrate, wherein the MEMS device region is provided with a first sacrificial region to separate a suspension structure of the MEMS device from another part of the MEMS device; removing the first sacrificial region by etching; and micromachining the zero-layer substrate.
    Type: Grant
    Filed: September 30, 2012
    Date of Patent: September 10, 2013
    Assignee: PixArt Imaging Incorporation R.O.C.
    Inventors: Chuan Wei Wang, Sheng Ta Lee
  • Patent number: 8523426
    Abstract: The invention relates to a one-piece regulating member including a balance cooperating with a hairspring made in a layer of silicon-based material and including a balance spring coaxially mounted on a collet. According to the invention, the collet includes one extending part that projects from the balance spring and which is made in a second layer of silicon-based material and is secured to the balance.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: September 3, 2013
    Assignee: Nivarox-FAR S.A.
    Inventors: Pierre-André Bühler, Marco Verardo, Thierry Conus, Jean-Philippe Thiebaud, Jean-Bernard Peters, Pierre Cusin
  • Patent number: 8524112
    Abstract: Elemental fluorine and carbonyl fluoride are suitable etchants for producing microelectromechanical devices (“MEMS”). They are preferably applied as mixtures with nitrogen and argon. If applied in Bosch-type process, C4F6 is a highly suitable passivating gas.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: September 3, 2013
    Assignee: Solvay Fluor GmbH
    Inventor: Marcello Riva
  • Patent number: 8518279
    Abstract: A method for providing a capping layer configured for an energy assisted magnetic recording (EAMR) head including at least one slider. The method comprises etching a substrate having a top surface using an etch to form a trench in the substrate, the trench having a first surface at a first angle from the top surface and a second surface having a second angle from the top surface. The method further comprises providing a protective coating exposing the second surface and covering the first surface, removing a portion of the substrate including the second surface to form a laser cavity within the substrate configured to fit a laser therein, and providing a reflective layer on the first surface to form a mirror, the cavity and mirror being configured for alignment of the laser to the laser cavity and to the mirror and for bonding the laser to the laser cavity.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: August 27, 2013
    Assignee: Western Digital (Fremont), LLC
    Inventors: Lei Wang, Pezhman Monadgemi
  • Patent number: 8518276
    Abstract: A process for forming a porous nanoscale membrane is described. The process involves applying a nanoscale film to one side of a substrate, where the nanoscale film includes a semiconductor material; masking an opposite side of the substrate; etching the substrate, beginning from the masked opposite side of the substrate and continuing until a passage is formed through the substrate, thereby exposing the film on both sides thereof to form a membrane; and then simultaneously forming a plurality of randomly spaced pores in the membrane. The resulting porous nanoscale membranes, characterized by substantially smooth surfaces, high pore densities, and high aspect ratio dimensions, can be used in filtration devices, microfluidic devices, fuel cell membranes, and as electron microscopy substrates.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: August 27, 2013
    Assignee: University of Rochester
    Inventors: Christopher C. Striemer, Philippe M. Fauchet, Thomas R. Gaborski, James L. McGrath
  • Patent number: 8518275
    Abstract: Methods for fabricating sub-lithographic, nanoscale microstructures in line arrays utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: August 27, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald Westmoreland
  • Patent number: 8512588
    Abstract: A method of fabricating a nanoporous membrane filter having a uniform array of nanopores etch-formed in a thin film structure (e.g. (100)-oriented single crystal silicon) having a predetermined thickness, by (a) using interferometric lithography to create an etch pattern comprising a plurality array of unit patterns having a predetermined width/diameter, (b) using the etch pattern to etch frustum-shaped cavities or pits in the thin film structure such that the dimension of the frustum floors of the cavities are substantially equal to a desired pore size based on the predetermined thickness of the thin film structure and the predetermined width/diameter of the unit patterns, and (c) removing the frustum floors at a boundary plane of the thin film structure to expose, open, and thereby create the nanopores substantially having the desired pore size.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: August 20, 2013
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Joseph W. Tringe, Rodney L. Balhorn, Saleem Zaidi
  • Patent number: 8512578
    Abstract: Multi-layer structures are electrochemically fabricated from at least one structural material (e.g. nickel), that is configured to define a desired structure and which may be attached to a substrate, and from at least one sacrificial material (e.g. copper) that surrounds the desired structure. After structure formation, the sacrificial material is removed by a multi-stage etching operation. In some embodiments sacrificial material to be removed may be located within passages or the like on a substrate or within an add-on component. The multi-stage etching operations may be separated by intermediate post processing activities, they may be separated by cleaning operations, or barrier material removal operations, or the like. Barriers may be fixed in position by contact with structural material or with a substrate or they may be solely fixed in position by sacrificial material and are thus free to be removed after all retaining sacrificial material is etched.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: August 20, 2013
    Assignee: Microfabrica Inc.
    Inventors: Adam L. Cohen, Michael S. Lockard, Dale S. McPherson
  • Patent number: 8506827
    Abstract: Methods for forming a metal grating include providing a first grating including a plurality of grating lines formed from a dielectric material, each grating having a pair of sidewalls, facing sidewalls of adjacent grating lines being separated by corresponding trenches, the grating lines and trenches forming a grating surface; forming a layer of a metal on the grating surface, where the metal layer has a constant thickness and conforms to the grating surface; and removing portions of the metal layer between sidewalls of adjacent grating lines of the first grating to form a metal grating having grating lines formed from the metal, the grating lines of the metal grating corresponding to the portions of the metal layer adjacent the sidewalls of the grating lines of the first grating. The metal grating has a pitch of 200 nm or less, a depth of 50 nm or more, and the grating lines of the metal grating have an aspect ratio of 10-to-1 or more.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: August 13, 2013
    Assignee: Polarization Solutions, LLC
    Inventors: Qihong Wu, Sheng Liu, Xu Zhang, Shiaw-wen Tai, Xiaohua Du, Thomas Tombler
  • Patent number: 8506826
    Abstract: A method for manufacturing a micro electro-mechanical system (MEMS) switch system (600, 700) includes etching each of a plurality of base circuit layers (425) and a plurality of passive component substrate layers (412, 418, 42, 426). The method continues with laser milling of a first dielectric film (406) to create a spacer layer (405). A metal cladding (402, 403) formed on a flexible dielectric film layer 404 is etched so as to form a plurality of switch component features. Further laser milling is performed with respect to the flexible dielectric film layer to form at least one switch structure (448, 450). Thereafter, a stack (400) is assembled which is comprised of the spacer layer disposed between the flexible dielectric film layer and the plurality of base circuit layers. Additional layers can also be included in the stack. When the stack is completed, heat and pressure are applied to join the various layers forming the stack.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: August 13, 2013
    Assignee: Harris Corporation
    Inventor: John E. Rogers
  • Patent number: 8506829
    Abstract: A semiconductor hollow-core waveguide using high-contrast gratings or photonic crystal claddings and a method of manufacturing the same includes providing a layered semiconductor structure; creating an etching mask pattern over the layered semiconductor structure; performing a combined cycled directional etching process on the layered semiconductor structure in one sequence and in one lithography level to create a 3-dimensional waveguide structure; and creating a hollow air core in the layered semiconductor structure by removing to define a shape of the waveguide. The etching process comprises vertically etching a series of deep trenches on the layered semiconductor structure with precise control and varying the width of the trench. Furthermore, the hollow air core is created by removing a portion of the sacrificial material located in the center of the waveguide and under the waveguide.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: August 13, 2013
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Weimin Zhou
  • Publication number: 20130201485
    Abstract: A system and method for depth-resolved imaging of a sample are presented. The system for depth-resolved imaging of a sample includes a substrate of substantially flexible material., a plurality of waveguides disposed on the substrate, an optical element disposed at a distal end of the plurality of waveguides, and one or more interferometers. Light is collected from the sample through the optical element and plurality of waveguides on the flexible substrate on its path to the one or more interferometers. The interferometers are configured to combine a reference light with the light received by at least a portion of the plurality of waveguides to resolve contributions from one or more depths of the sample.
    Type: Application
    Filed: February 6, 2013
    Publication date: August 8, 2013
    Applicant: MEDLUMICS, S.L.
    Inventors: Jose RUBIO-GUIVERNAU, Eduardo Margallo-balbas
  • Patent number: 8501584
    Abstract: The process comprises the following steps: a) a first element (3) or a plurality of said first elements (3) is/are machined in a first silicon wafer (1) keeping said elements (3) joined together via material bridges (5); b) step a) is repeated with a second silicon wafer (2) in order to machine a second element (4), differing in shape from that of the first element (3), or a plurality of said second elements (4); c) the first and second elements (3, 4) or the first and second wafers (1, 2) are applied, face to face, with the aid of positioning means (6, 7); d) the assembly formed in step c) undergoes oxidation; and e) the parts (10) are separated form the wafers (1, 2). Micromechanical timepiece parts obtained according to the process.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: August 6, 2013
    Assignee: ETA SA Manufacture Horlogère Suisse
    Inventors: Philippe Marmy, Jean-Luc Helfer, Thierry Conus
  • Patent number: 8491803
    Abstract: A method of hydrophobizing a frontside surface of an integrated circuit. The method includes the steps of: (a) depositing a hydrophobic polymeric layer onto the frontside surface; (b) depositing a protective metal film onto the hydrophobic polymeric layer; (c) depositing a sacrificial material onto the metal film; (d) patterning the sacrificial material; (e) etching through the metal film, the hydrophobic polymeric layer and the frontside surface; (f) performing MEMS processing steps on a backside of the integrated circuit; (g) subjecting the integrated circuit to an oxidizing plasma, wherein the metal film protects the hydrophobic polymeric layer from the oxidizing plasma; and (h) removing the protective metal film to provide an integrated circuit having a relatively hydrophobic patterned frontside surface.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: July 23, 2013
    Assignee: Zamtec Ltd
    Inventors: Gregory John McAvoy, Emma Rose Kerr, Kia Silverbrook
  • Publication number: 20130180944
    Abstract: A process for producing a liquid ejection head including a silicon substrate having a first surface and a second surface that is a surface on an opposite side to the first surface, an ejection energy generating element which is formed on a side of the first surface side and generates energy for ejecting a liquid, a cavity formed in the second surface and a liquid supply port which is formed in a bottom part of the cavity and communicates with the first surface, including, in the following order: (1) forming the cavity in the second surface of the silicon substrate by a first crystal anisotropic etching; (2) forming a chemical leading hollow in a slope of the cavity; (3) expanding the cavity by a second crystal anisotropic etching; and (4) forming the liquid supply port in a bottom face of the cavity by dry etching with the use of an ion.
    Type: Application
    Filed: November 26, 2012
    Publication date: July 18, 2013
    Applicant: Canon Kabushiki Kaisha
    Inventor: Canon Kabushiki Kaisha
  • Patent number: 8486279
    Abstract: The invention relates to a method (1) of manufacturing a silicon-metal composite micromechanical component (51) combining DRIE and LIGA processes. The invention also relates to a micromechanical component (51) including a layer wherein one part (53) is made of silicon and another part (41) of metal so as to form a composite micromechanical component (51). The invention concerns the field of timepiece movements.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: July 16, 2013
    Assignee: Nivarox-FAR S.A.
    Inventors: Jean-Charles Fiaccabrino, Marco Verardo, Thierry Conus, Jean-Philippe Thiebaud, Jean-Bernard Peters
  • Patent number: 8486278
    Abstract: Embodiments of method of manufacturing an implantable pump, including providing an upper layer comprising a dome structure for housing a drug chamber and a cannula in fluid communication with the drug chamber, providing a middle deflection layer adjacent the drug chamber, providing a bottom layer comprising electrolysis electrodes, and bonding the upper layer, middle deflection layer, and bottom layer to form the pump.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: July 16, 2013
    Assignee: MiniPumps, LLC
    Inventors: Changlin Pang, Fukang Jiang, Jason Shih, Sean Caffey, Mark Humayun, Yu-Chong Tai
  • Patent number: 8486282
    Abstract: Surface texturing of the transparent conductive oxide (TCO) front contact of a thin film photovoltaic (TFPV) solar cell is needed to enhance the light-trapping capability of the TFPV solar cells and thus improving the solar cell efficiency. Embodiments of the current invention describe chemical formulations and methods for the wet etching of the TCO. The formulations and methods may be optimized to tune the surface texturing of the TCO as desired.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: July 16, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Zhi-Wen Sun, Nitin Kumar, Guizhen Zhang, Minh Anh Nguyen, Nikhil Kalyankar
  • Patent number: 8486840
    Abstract: A method includes making a target feature of an integrated circuit by providing a main layer over a substrate, depositing a first mask layer over the main layer, patterning the first mask layer, forming sidewall spacers with a width (w) in adjoining sidewalls of the patterned first mask layer and exposing a top area of the patterned first mask layer, selectively removing the first mask layer and exposing a portion of the main layer between the sidewall spacers, depositing a second mask layer over the main layer between the sidewall spacers, selectively removing the sidewall spacers to form an opening and exposing another portion of the main layer in the opening, etching the main layer through the opening to form the target feature.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: July 16, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jhon Jhy Liaw
  • Publication number: 20130176621
    Abstract: A diffractive MEMS device has an in-plane binary reflective diffraction pattern formed in an outer surface of a tiltable platform. The binary reflective diffraction pattern includes rectangular or trapezoidal ridges and valleys, or grooves, of a same depth. The binary reflective diffractive pattern has a high diffraction efficiency even though the surfaces of the “grooves” or “ridges” are not perpendicular to the incoming optical beam. The diffractive pattern is supported by a pair of torsional hinges and is tiltable by an electrostatic actuator. The electrostatic actuator can include at least one side electrode for linearization of dependence of tilt angle on the voltage applied to the actuator.
    Type: Application
    Filed: December 20, 2012
    Publication date: July 11, 2013
    Applicant: JDS Uniphase Corporation
    Inventors: John Michael Miller, Wenlin JIN
  • Patent number: 8480053
    Abstract: Mechanical actuation of valves in flexible fluidic structures allows for the regulation of fluid flow. In accordance with the disclosure herein, a fluidic structure is provided wherein mechanical actuation is conferred using a pin to actuate a flexible layer to occlude fluid flow in a fluid channel.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: July 9, 2013
    Assignee: California Institute of Technology
    Inventors: James R. Heath, Michael Van Dam, Arkadij Elizarov
  • Patent number: 8470184
    Abstract: A method for making a micro-device including at least one receiving site for components, formed in a thickness of a substrate. The method includes: a) making in at least one first substrate adhesively bonded to a second substrate via a discontinuous adhesive bonding interface, at least one first trench around at least one sacrificial block of the first substrate, by etching the first substrate so as to expose the adhesive bonding interface; and b) removing the sacrificial block so as to make at least one first cavity in the first substrate.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: June 25, 2013
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Damien Saint-Patrice, Sebastien Bolis, Fabrice Jacquet
  • Patent number: 8465596
    Abstract: Disclosed is a supercritical processing apparatus and a supercritical processing method for suppressing the pattern collapse or the injection of material constituting a processing liquid into a substrate. A processing chamber receives a substrate subjected to a processing with supercritical fluid, and a liquid supply unit supplies a processing liquid including a fluorine compound to the processing chamber. A liquid discharge unit discharges the supercritical fluid from the processing chamber, a pyrolysis ingredient removing unit removes an ingredient facilitating the pyrolysis of a liquid from the processing chamber or from the liquid supplied from the liquid supply unit, and a to heating unit heats the processing liquid including a fluorine compound of hydrofluoro ether or hydrofluoro carbon.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: June 18, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Takayuki Toshima, Mitsuaki Iwashita, Kazuyuki Mitsuoka, Hidekazu Okamoto, Hideo Namatsu
  • Patent number: 8465658
    Abstract: In a method of forming a main pole, an initial accommodation layer is etched by RIE using a first etching mask having a first opening, whereby a groove is formed in the initial accommodation layer. Next, a part of the initial accommodation layer including the groove is etched by RIE using a second etching mask having a second opening, so that the groove becomes an accommodation part. The main pole is then formed in the accommodation part. The first etching mask has first and second sidewalls that face the first opening and are opposed to each other at a first distance in a track width direction. The second etching mask has third and fourth sidewalls that face the second opening and are opposed to each other at a second distance greater than the first distance.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: June 18, 2013
    Assignee: Headway Technologies, Inc.
    Inventors: Hironori Araki, Yoshitaka Sasaki, Hiroyuki Ito, Kazuki Sato, Shigeki Tanemura, Yukinori Ikegawa
  • Patent number: 8460948
    Abstract: A method for manufacturing an ink jet recording head is employed which has a metal mask formation process for forming a metal mask having a predetermined shape containing a silicide film formed by silicidation of the surface of a flow path forming substrate wafer containing a silicon substrate and a liquid flow path formation process for forming a liquid flow path by anisotropically etching the flow path forming substrate wafer using the metal mask as a mask.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: June 11, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Yasuyuki Matsumoto
  • Patent number: 8460564
    Abstract: A drug-delivery chip and a method of fabricating the same are provided. The drug-delivery chip has a main body having at least one drug receiving space individually formed with an opening for storing drugs therein; a thin film for sealing up the at least one drug receiving space; a first conductive wire connecting to one end of the thin film; a second conductive wire connecting to another end of the thin film; a signal-receiving module for receiving actuated signals; and a control module for applying voltages to first and second wire conductive s according to the actuated signal, thereby generating heat to break off the thin film for the release of a drug or drugs received in the at least one drug receiving space.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: June 11, 2013
    Assignee: National Taiwan University
    Inventors: Shey-Shi Lu, Yao-Joe Yang, Yu-Jie Huang, Chii-Wann Lin, Hsin-Hung Liao, Tao Wang, Pen-Li Huang, Yao-Hong Wang
  • Patent number: 8460561
    Abstract: The present invention provides a crystal oscillator piece in which the cross section of its vibrating tine, while not symmetrical in shape, has a principal axis that is oriented parallel to an X axis to suppress the generation of leakage vibration, and a method for manufacturing such a crystal oscillator piece.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: June 11, 2013
    Assignee: Citizen Holdings Co., Ltd.
    Inventor: Akiko Katoh
  • Patent number: 8455288
    Abstract: A micromachining process forms a plurality of layers on a wafer. This plurality of layers includes both a support layer and a given layer. The process also forms a mask, with a mask hole, at least in part on the support layer. In this configuration, the support layer is positioned between the mask hole and the given layer, and longitudinally spaces the mask hole from the given layer. The process also etches a feature into the given layer through the mask hole.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: June 4, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Kuang L. Yang, Thomas D. Chen
  • Patent number: 8455278
    Abstract: N-V centers in diamond are created in a controlled manner. In one embodiment, a single crystal diamond is formed using a CVD process, and then annealed to remove N-V centers. A thin layer of single crystal diamond is then formed with a controlled number of N-V centers. The N-V centers form Qubits for use in electronic circuits. Masked and controlled ion implants, coupled with annealing are used in CVD formed diamond to create structures for both optical applications and nanoelectromechanical device formation. Waveguides may be formed optically coupled to the N-V centers and further coupled to sources and detectors of light to interact with the N-V centers.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: June 4, 2013
    Assignee: Apollo Diamond, Inc
    Inventors: Robert C. Linares, Patrick J. Doering, William W. Dromeshauser, Bryant Linares, Alfred R. Genis
  • Patent number: 8440089
    Abstract: A plurality of micro three-dimensional structure elements each having a movable structure fixed on a sacrifice layer, and fixation portions of the micro three-dimensional structure elements for the sacrifice layer are arranged into a film-like elastic body, and then the sacrifice layer is removed. Thus, a three-dimensional structure in which the individual micro three-dimensional structure elements are arranged independently of one another within the elastic body is manufactured.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: May 14, 2013
    Assignee: Panasonic Corporation
    Inventors: Isao Shimoyama, Kiyoshi Matsumoto, Kazunori Hoshino, Kentaro Noda, Shuji Hachitani, Hidehiro Yoshida, Shoichi Kobayashi, Tohru Nakamura
  • Patent number: 8435415
    Abstract: A nanofabrication process for use with a photoresist that is disposed on a substrate includes the steps of exposing the photoresist to a grayscale radiation pattern, developing the photoresist to remove a irradiated portions and form a patterned topography having a plurality of nanoscale critical dimensions, and selectively etching the photoresist and the substrate to transfer a corresponding topography having a plurality of nanoscale critical dimensions into the substrate.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: May 7, 2013
    Assignees: The United States of America, as represented by the Secretary of Commerce, the National Institute of Standards and Technology, Cornell University—Cornell Center for Technology, Enterprise & Commercialization
    Inventors: Samuel Martin Stavis, Elizabeth Arlene Strychalski, Michael Gaitan
  • Publication number: 20130098865
    Abstract: A method of making a mold includes forming spaced mold cavities in a mold body. The mold cavities include geometrically similar portions, but have respective depths below an initial reference surface that vary as a function of position along a particular direction. The mold cavities can be formed using anisotropic etching of preferred crystal directions in single crystal materials such as silicon. A portion of the mold material adjacent the initial reference surface is removed to expose a new reference surface at a tilt angle with respect to the initial reference surface. The modified mold cavities have their respective axes at a new desired tilt angle relative to the new reference surface.
    Type: Application
    Filed: May 17, 2012
    Publication date: April 25, 2013
    Applicant: Metadigm LLC
    Inventor: Victor B. Kley
  • Patent number: 8425982
    Abstract: Methods for fabricating arrays of nanoscaled alternating lamellar or cylinders in a polymer matrix having improved long range order utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: April 23, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Jennifer Kahl Regner
  • Patent number: 8422702
    Abstract: A micromini condenser microphone having a flexure hinge-shaped upper diaphragm and a back plate, and a method of manufacturing the same are provided.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: April 16, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hye Jin Kim, Sung Q Lee, Kang Ho Park, Jong Dae Kim
  • Patent number: 8414785
    Abstract: Methods for fabrication of microfluidic systems on printed circuit boards (PCB) are described. The PCB contains layers of insulating material and a layer or layers of metal buried within layers of insulating material. The metal layers are etched away, leaving fully enclosed microfluidic channels buried within the layers of insulating material.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: April 9, 2013
    Assignee: California Institute of Technology
    Inventors: Christopher I. Walker, Aditya Rajagopal, Axel Scherer
  • Patent number: 8409449
    Abstract: Methods for fabricating sub-lithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multi-layer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: April 2, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Eugene P. Marsh
  • Patent number: 8409452
    Abstract: A through-hole forming method includes steps of forming a first impurity region (102a) around a region where a through-hole is to be formed in the first surface of a silicon substrate (101), the first impurity region (102) being higher in impurity concentration than the silicon substrate (101), forming a second impurity region (102b) at a position adjacent to the first impurity region (102a) in the depth direction of the silicon substrate (101), the second impurity region (102b) being higher in impurity concentration than the first impurity region (102a), forming an etch stop layer (103) on the first surface, forming an etch mask layer (104) having an opening on the second surface of the silicon substrate (101) opposite to the first surface, and etching the silicon substrate (101) until at least the etch stop layer (103) is exposed via the opening.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: April 2, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keiichi Sasaki, Yukihiro Hayakawa
  • Patent number: 8404600
    Abstract: A mold having an open interior volume is used to define patterns. The mold has a ceiling, floor and sidewalls that define the interior volume and inhibit deposition. One end of the mold is open and an opposite end has a sidewall that acts as a seed sidewall. A first material is deposited on the seed sidewall. A second material is deposited on the deposited first material. The deposition of the first and second materials is alternated, thereby forming alternating rows of the first and second materials in the interior volume. The mold and seed layer are subsequently selectively removed. In addition, one of the first or second materials is selectively removed, thereby forming a pattern including free-standing rows of the remaining material. The free-standing rows can be utilized as structures in a final product, e.g., an integrated circuit, or can be used as hard mask structures to pattern an underlying substrate. The mold and rows of material can be formed on multiple levels.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: March 26, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej Sandhu
  • Patent number: 8404124
    Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: March 26, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu
  • Publication number: 20130068719
    Abstract: A method for making a master disk to be used in the nanoimprinting process to make patterned-media disks uses an electrically conductive substrate and guided self-assembly of a block copolymer to form patterns of generally radial lines and/or generally concentric rings of one of the block copolymer components. A metal is electroplated onto the substrate in the regions not protected by the lines and/or rings. After removal of the block copolymer component, the remaining metal pattern is used as an etch mask to fabricate either the final master disk or two separate molds that are then used to fabricate the master disk.
    Type: Application
    Filed: September 19, 2011
    Publication date: March 21, 2013
    Inventors: Christian Rene' Bonhote, Jeffrey S. Lille, Ricardo Ruiz, Georges Gibran Siddiqi
  • Patent number: 8398877
    Abstract: A method is provided for forming an opening in a layer of a selected material. The method comprises, forming a polymer resist layer over said selected material and plasticising areas of the resist where openings are to be formed. The plasticising is performed by depositing a first solution onto the surface of said polymer resist layer, where the first solution is a plasticiser selected to increase permeability of the polymer resist layer to a second solution, in an area which has absorbed the first solution. The second solution is selected to be an etchant or solvent for the selected material. After the resist layer has been selectively plasticised, it is contacted with the second solution, which permeates the polymer resist layer in the area of increased permeability and forms an opening in the selected material.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: March 19, 2013
    Assignee: Newsouth Innovations Pty Ltd.
    Inventors: Stuart Ross Wenham, Alison Lennon, Roland Yudadibrata Utama, Anita Wing Yi Ho-Baillie
  • Patent number: 8398867
    Abstract: Method for producing a probe for atomic force microscopy with a silicon nitride cantilever and an integrated single crystal silicon tetrahedral tip with high resonant frequencies and low spring constants intended for high speed AFM imaging.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: March 19, 2013
    Inventor: Chung Hoon Lee
  • Patent number: 8398866
    Abstract: A microchip for forming an emulsion has a first glass substrate, a second glass substrate and a silicon substrate. The silicon substrate has formed therein a first fluid flow path through which a first fluid flows and a second fluid flow path through which a second fluid that is not mixed with the first fluid flows. The first fluid flow path has a plurality of branched flow paths that join at a joint portion. The second fluid flow path communicates with the joint portion. The silicon substrate has formed therein an emulsion formation flow path that faces an edge portion of the second fluid flow path at the joint portion. An emulsion composed of the first fluid and the second fluid that is surrounded by the first fluid is formed in the emulsion formation flow path.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: March 19, 2013
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Yutaka Ozawa, Ryoichi Ohigashi, Koji Fujimoto, Shoji Takeuchi
  • Patent number: 8397555
    Abstract: The present invention is directed to scanning probes in which a cantilever contacts a stylus via an integrated stylus base pad, and methods for fabricating such probes. The probe offer many advantages over other types of scanning probes with respect to eliminating the need for a soft, reflective coating in some applications and providing for the simple fabrication of sharp stylus tips, flexibility with respect to functionalizing the tip, and minimal thermal drift due to reduced bimorph effect. The advantage of these features facilitates the acquisition of high resolution images of samples in general, and particularly in liquids.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: March 19, 2013
    Assignee: Applied NanoStructures, Inc.
    Inventor: Ami Chand
  • Patent number: 8398865
    Abstract: A method of manufacturing a mechanical part includes the steps of providing a micro-machinable substrate; etching a pattern which includes the part through the entire substrate using photolithography; mounting the etched substrate on a support so as to leave the top and bottom surfaces of said substrate accessible for coating; depositing a tribological quality improving coating of on the outer surface of the part; and releasing the part from the substrate.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: March 19, 2013
    Assignee: The Swatch Group Research and Development Ltd
    Inventors: Rudolf Dinger, Thierry Ravenel
  • Patent number: 8394283
    Abstract: The present invention relates to a three-dimensional structure manufacturing method for performing surface treatment processes, and a replication step to provide hydrophobicity on an external surface of the three-dimensional structure. In the manufacturing method, the hydrophobicity may be provided to the external surface of the three-dimensional structure, a high cost device required in the conventional MEMS process is not used, the manufacturing cost is reduced, and the manufacturing process is simplified. In addition, it has been difficult to provide the hydrophobicity on an external surface of a three-dimensional structure having a large surface due to a spatial limitation, but in the exemplary embodiment of the present invention, the hydrophobicity may be provided to the external surface of the three-dimensional structure having a large surface, such as a torpedo, a submarine, a ship, and a vehicle, without the spatial limitation.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: March 12, 2013
    Assignee: Postech Academy-Industry Foundation
    Inventors: Dong-Seob Kim, Sang-Min Lee, Woon-Bong Hwang, Kun-Hong Lee, Geun-Bae Lim, Joon-Won Kim, Dong-Hyun Kim, Hyun-Chul Park
  • Publication number: 20130059438
    Abstract: A pattern formation method, mask pattern formation method and a method for manufacturing semiconductor devices are provided in this disclosure, which are directed to the field of semiconductor processes. The pattern formation method comprises: providing a substrate; forming a polymer thin film containing a block copolymer on the substrate; forming a first pattern through imprinting the polymer thin film with a stamp; forming domains composed of different copolymer components through directed self assembly of the copolymer in the first pattern; selectively removing the domains composed of copolymer components to form a second pattern. In the embodiments of the present invention, finer pitch patterns can be obtained through combining the imprinting and DSA process without exposure, which as compared to the prior art methods has the advantage of simplicity. Furthermore, stamps used in imprinting may have relative larger pitches, facilitating and simplifying the manufacture and alignment of the stamps.
    Type: Application
    Filed: November 10, 2011
    Publication date: March 7, 2013
    Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: JUNQING ZHOU, XIAOYING MENG, HAIYANG ZHANG
  • Publication number: 20130047738
    Abstract: A method for the manufacture of a platform having a membrane bed includes providing a platform body, which comprises silicon; and removing silicon material from a surface of the platform body by means of laser ablation. Preferably, this is followed by oxidizing the ablated surface and then etching the oxidized surface. In an example of the invention, a resulting pressure sensor comprises two platforms, each with a membrane bed having a contour for supporting a measuring membrane, wherein the contour essentially corresponds to a bend line of the measuring membrane.
    Type: Application
    Filed: April 14, 2011
    Publication date: February 28, 2013
    Applicant: Endress + Hauser GmbH + Co. KG
    Inventors: Anh Tuan Tham, Dieter Stolze, Rafael Teipen
  • Patent number: 8382995
    Abstract: Methods are disclosed for manufacturing piezoelectric devices. In an exemplary method a base substrate is prepared that defines multiple device bases. Multiple cutting grooves are defined on a surface of the base substrate in a grid pattern to define therebetween the size of the devices. A frame substrate is also prepared from a piezoelectric material. The frame substrate defines multiple frames surrounding respective vibrating pieces and being alignable with respective bases in the base substrate. Also prepared is a lid substrate defining multiple lids being alignable with respective frames and bases. The three substrates are aligned and bonded together such that the frame substrate is between the lid and base substrates and the surface defining the cutting grooves faces outward. The base substrate is mounted on a dicing sheet such that cutting grooves face the dicing sheet. Cutting is performed, using a dicing blade, through the sandwich from the lid substrate to the cutting grooves.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: February 26, 2013
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Ryoichi Ichikawa, Mitoshi Umeki
  • Patent number: RE44356
    Abstract: A method of manufacturing a tunable wavelength optical filter. The method includes steps of forming a first sacrificial oxide film for floating a lower mirror on a semiconductor substrate; sequentially laminating conductive silicon films and oxide films for defining a mirror region on the first sacrificial oxide film in a multi-layer and laminating another conductive silicon film to form a lower mirror; sequentially laminating conductive silicon films and oxide films for defining the mirror region on a second sacrificial oxide film in a multi-layer and laminating another conductive silicon film to form an upper mirror and forming an optical tuning space between the lower mirror and the upper mirror and etching the first sacrificial oxide film and the second sacrificial oxide film such that the lower mirror is floated on the semiconductor substrate.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: July 9, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chang Auck Choi, Myung Lae Lee, Chang Kyu Kim, Chi Hoon Jun, Youn Tae Kim