Specific Configuration Of Electrodes To Generate The Plasma Patents (Class 216/71)
  • Patent number: 6863784
    Abstract: A plasma processing system for processing a substrate is disclosed. The system includes a process component capable of effecting a plasma inside a process chamber. The system also includes a gear drive assembly for moving the process component in a linear direction during processing of the substrate.
    Type: Grant
    Filed: November 5, 2003
    Date of Patent: March 8, 2005
    Assignee: Lam Research Corporation
    Inventors: Fangli Hao, Keith Dawson, Eric H. Lenz
  • Patent number: 6860275
    Abstract: A three-step polymer removal process that reverses the conventional sequence in which polymer is removed. In the preferred embodiment of the present invention the polymer is first removed from the Gas Deposition Table, after this the polymer is stripped from the inner surface of the created contact hole.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: March 1, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bao-Ru Young, Chia-Shiung Tsai
  • Patent number: 6852243
    Abstract: A confinement device for operative arrangement within a substrate etching chamber, having a lower surface of the device generally arranged over a substrate outer top surface such that a gap-spacing therebetween is generally equidistant. This spacing is less than a sheath thickness for the plasma, preferably less than ?rd of an inner width of an aperture through the lower surface of the device. The aperture, sized preferably greater than 3 times the sheath thickness, is in communication with a channel of the device in which an etchant gas can be confined for reaction to selectively etch a localized area in the substrate outer top surface generally below the aperture. A system for dry etching an IC wafer includes a substrate etching chamber and a confinement device. The etchant gas may be a plasma induced and sustained by RF energy, a microwave source, or other source, as designed.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: February 8, 2005
    Assignee: LSI Logic Corporation
    Inventors: Charles W. Jurgensen, Gregory A. Johnson, Kunal N. Taravade
  • Patent number: 6852195
    Abstract: An apparatus for low-damage, anisotropic etching of substrates having the substrate mounted upon a mechanical support located within an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: February 8, 2005
    Assignee: Georgia Tech Research Corporation
    Inventors: Kevin P. Martin, Harry P. Gillis, Dmitri A. Choutov
  • Patent number: 6846427
    Abstract: A dry etching step during the manufacturing of a substrate for a liquid crystal display (LCD) device is improved by placing the substrate at a predetermined distance away from the lower electrode to prevent damage of the substrate due to electrostatic formed therebetween. An insulating tape attached on the lower electrode provides electrostatic protection between the substrate and the lower electrode, so that the substrate is properly lifted off the lower electrode via the lifting pins of the lower electrode without electrostatic interference.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: January 25, 2005
    Assignee: LG. Philips LCD Co., Ltd.
    Inventor: Byung-Yong Ahn
  • Patent number: 6838012
    Abstract: Methods of etching dielectric materials in a semiconductor processing apparatus use a thick silicon upper electrode that can be operated at high power levels for an extended service life.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: January 4, 2005
    Assignee: Lam Research Corporation
    Inventor: Eric H. Lenz
  • Patent number: 6827870
    Abstract: Plasma etching or deposition is performed over substrates using spatially localized micro-plasmas operating in parallel with each other. A plasma generating electrode is positioned closely adjacent to an exposed surface of the substrate, as on the surface of a dielectric layer applied to the substrate. A selected pressure of the gas in the region of the electrode and the substrate is established, and a voltage is applied between the plasma generating electrode and the substrate or a second electrode to ignite a plasma in the region between the plasma generating electrode and the substrate for a selected period of time. This plasma is limited to the region of the plasma generating electrode adjacent to the exposed surface so that the substrate is plasma treated in a desired pattern.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: December 7, 2004
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Yogesh B. Gianchandani, Chester G. Wilson
  • Patent number: 6828246
    Abstract: A gas delivering device inside a gaseous reaction chamber capable of increasing gas flow in areas having a deficient supply of gas by forming additional holes in corresponding positions. Because a gas-delivering panel design having asymmetrical holes is employed, gas flow rate within the reactions chamber can be roughly balanced. Hence, a homogeneous stream of gaseous reactants can be maintained above the surface of a reacting wafer.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: December 7, 2004
    Assignee: Winbond Electronics Corp.
    Inventors: An-Chun Tu, Wen-Fa Tai
  • Patent number: 6822311
    Abstract: A method for forming a desired junction profile in a semiconductor device. At least one dopant is introduced into a semiconductor substrate. The at least one dopant is diffused in the semiconductor substrate through annealing the semiconductor substrate and the at least one dopant while simultaneously exposing the semiconductor substrate to an electric field.
    Type: Grant
    Filed: April 15, 2003
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, John J. Ellis-Monaghan, Toshihura Furukawa, Jeffrey D. Gilbert, Glenn R. Miller, James A. Slinkman
  • Patent number: 6814814
    Abstract: In a method of cleaning process residues formed on surfaces in a substrate processing chamber, a sacrificial substrate comprising a sacrificial material is placed in the chamber, a sputtering gas is introduced into the chamber, and the sputtering gas is energized to sputter the sacrificial material from the substrate. The sputtered sacrificial material reacts with residues on the chamber surfaces to clean them. In one version, the sacrificial substrate comprises a silicon-containing material that when sputtered deposits silicon on the chamber walls that reacts with and cleans fluorine-containing species that are left behind by a chamber cleaning process.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: November 9, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Alan W. Collins, Feng Gao, Tetsuya Ishikawa, Padmanaban Krishnaraj, Yaxin Wang
  • Patent number: 6815366
    Abstract: In the method for etching the organic insulating film in which the first RF power is applied to the electrode 12 with the object-to-be-processed having the organic insulating film mounted on and the second RF power is applied to the electrode 14 opposed to the electrode 12, whereby plasma of gas containing NH3 is generated to etch the organic insulating film, the first RF power and the second RF power are controlled so as to make the Vpp value of the voltage applied to the electrode 12 below 500 V. Thus, the organic insulating film can be vertically processed while the bow amplitude and the corner loss amount of the hard mask are decreased.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: November 9, 2004
    Assignee: Fujitsu Limited
    Inventor: Kenichi Higuchi
  • Patent number: 6802942
    Abstract: To generate an especially good heat transfer between a seating face of a storage plate support and a storage plate, during coating with a sputter source in a vacuum installation, the seating face of the storage plate support is slightly annularly convexly arched and the storage plate is clamped in the center as well as on its outer margin by a center mask and an outer mask against the arched seating face. Hereby an especially good heat transfer is attained with very low arching d, whereby the storage plate is treated gently and simultaneously, during the coating process, no layer thickness distribution problems occur through arching that is too large.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: October 12, 2004
    Assignee: Unaxis Balzers Limited
    Inventors: Stephan Voser, Martin Dubs
  • Patent number: 6796313
    Abstract: In one aspect, the invention encompasses a method of utilizing a vaporization surface as an electrode to form a plasma within a vapor forming device. In another aspect, the invention encompasses a method of chemical vapor deposition. A vaporization surface is provided and heated. At least one material is flowed past the heated surface to vaporize the material. A deposit forms on the vaporization surface during the vaporization. The vaporization surface is then utilized as an electrode to form a plasma, and at least a portion of the deposit is removed with the plasma.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: September 28, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 6793834
    Abstract: A magnetron reactive ion etching apparatus comprises: an electrode unit including electrodes facing each other through a semiconductor device; a high-frequency power source forming an electric field on the electrode unit; a dipole ring magnet; and a switching mechanism. The dipole ring magnet forms the first magnetic field state, including a magnetic field in a direction perpendicular to a direction of the electric field or in a direction parallel to the semiconductor device, and the second magnetic field state, including a magnetic field whose strength at the periphery of the surface of the semiconductor device is so satisfactory that an electron Larmor radius is larger than the mean free path of electrons. The first magnetic field state is switched to the second magnetic field state at a predetermined timing by the switching mechanism which is controlled by a controller.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: September 21, 2004
    Assignee: Tokyo Electron Limited
    Inventor: Tamotsu Morimoto
  • Patent number: 6794301
    Abstract: Apparatus and methods for an improved plasma processing. A first power source alternates between high and low power cycles to produce and sustain a plasma, and a second power source alternates between high and low power cycles to accelerate ions toward the substrate being processed. Preferably, the power sources are synchronized such that the second power provides each high power cycle substantially during the time that the first power source provides each low power cycle. Commencement of each high power cycle provided by the second power source may be delayed for a period of time after each high power cycle provided by the first power source terminates. This approach allows electrons to cool off and accumulated charge on surface features of the substrate to dissipate before ions are accelerated toward the substrate for processing.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: September 21, 2004
    Assignee: Mattson Technology, Inc.
    Inventor: Stephen E. Savas
  • Patent number: 6777037
    Abstract: A plasma processing method and apparatus are provided for processing the surface of a semiconductor device or the like through the effect of plasma. A pulsed plasma discharge is performed by switching on and off the high frequency electric power for generating the plasma with a specified off period of the plasma generation, to control an inflow amount of positive and negative charges to sparse and dense portions of device patterns and suppress an electric potential on a gate oxide film. Thereby, a highly accurate etching process with no charging damage can be carried out.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: August 17, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Sumiya, Hitoshi Tamura, Seiichi Watanabe
  • Patent number: 6774046
    Abstract: A method for minimizing the critical dimension growth of a feature on a semiconductor wafer includes performing an etch operation in a reactor 20 and controlling the temperature of the wafer 26 by controlling the pressure of the gas contacting the backside of the wafer 26 and/or providing a heat source 56 such as for example in the chuck 46 or electrode 28 associated with the wafer 26 in order to heat the wafer 26.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: August 10, 2004
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Alferd Cofer, Leslie G. Jerde, Kurt A. Olson, Paritosh Rajora
  • Publication number: 20040129220
    Abstract: In a plasma processing method for supplying an electric power to a first electrode, making a first electrode have a ground potential, or making a first electrode have a floating potential while supplying gas to a plasma source arranged in a vicinity of an object to be processed at a pressure in a vicinity of an atmospheric pressure, the method includes processing a part of the object to be processed with a plasma in a state where an area of a surface of a potentially controlled second electrode arranged in a position opposite to the plasma source via the object to be processed is made superposed on the object to be processed smaller than an area of a surface of the plasma source superposed on the object to be processed.
    Type: Application
    Filed: August 28, 2003
    Publication date: July 8, 2004
    Inventors: Mitsuo Saitoh, Tomohiro Okumura, Ichiro Nakayama
  • Publication number: 20040129675
    Abstract: The invention relates to a method and device for treating a substrate (20) in an arc vaporization device (10). An arc current of intensity I flows in an evacuated space (12) in the arc vaporization device between an anode and a metal target (14, 16, 18) which acts as a cathode. Said arc current is used to vaporize the target material and produce a metal ion density. The invention aims to treat the substrate (20) without causing undesirable heating thereof. As a result, the metal ion density per target (14, 16, 18) is set by at least partially covering the target, said density being effective for treating substrates.
    Type: Application
    Filed: November 24, 2003
    Publication date: July 8, 2004
    Inventor: Hermann Curtins
  • Publication number: 20040108301
    Abstract: A plasma processing system for processing a substrate is disclosed. The system includes a process component capable of effecting a plasma inside a process chamber. The system also includes a gear drive assembly for moving the process component in a linear direction during processing of the substrate.
    Type: Application
    Filed: November 5, 2003
    Publication date: June 10, 2004
    Inventors: Fangli Hao, Keith Dawson, Eric H. Lenz
  • Publication number: 20040089632
    Abstract: Disclosed herein is a method for etching a face of an object and more particularly a method for etching a rear face of a silicon substrate. The object having a silicon face is positioned so as to be spaced apart from a plasma-generating member by a predetermined interval distance. The plasma-generating member generates arc plasmas to form a plasma region. A reaction gas is allowed to pass through the plasma region to generate radicals having high energies and high densities. The radicals react with the object to etch the face of the object. The face of the object can be rapidly and uniformly etched.
    Type: Application
    Filed: November 4, 2003
    Publication date: May 13, 2004
    Inventors: Heung-Sik Park, Chang-Jin Kang, Tae-Hyuk Ahn, Kyeong-Koo Chi, Sang-Hun Seo
  • Patent number: 6720037
    Abstract: In a plasma processing method, on a back side of a cathode electrode is provided at least one conductor plate d.c. potentially insulated from the cathode electrode and an opposing electrode, and the cathode electrode and the conductor plate are enclosed with a shielding wall such that a ratio of an inter-electrode coupling capacitance provided by the cathode electrode and the opposing electrode to a coupling capacitance provided by the cathode electrode and a bottom surface of the shielding wall on the back side of the conductor plate is not less than a predetermined value. Thereby, a high-quality, high-speed plasma processing is realized.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: April 13, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yukito Aota, Masahiro Kanai
  • Patent number: 6696108
    Abstract: A vacuum processing method comprises placing an article to be processed in a reaction container and simultaneously supplying at least two high-frequency powers having mutually different frequencies to the same high-frequency electrode to generate plasma in the reaction container by the high-frequency powers admitted into the reaction container from the high-frequency electrode so as to process the article to be processed. In the method, at least the high-frequency power having a frequency f1 and the high-frequency power having a frequency f2 are used and satisfy the following two conditions as the high-frequency powers: 250 MHz≧f1>f2≧10 MHz 0.9≧f2/f1≧0.1.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: February 24, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hitoshi Murayama, Toshiyasu Shirasuna, Hiroaki Niino, Makoto Aoki
  • Publication number: 20040026372
    Abstract: A plasma treatment method comprising exhausting a process chamber so as to decompress the process chamber, mounting a wafer on a suscepter, supplying a process gas to the wafer through a shower electrode, applying high frequency power, which has a first frequency f1 lower than an inherent lower ion transit frequencies of the process gas, to the suscepter, and applying high frequency power, which has a second frequency f2 higher than an inherent upper ion transit frequencies of the process gas, whereby a plasma is generated in the process chamber and activated species influence the wafer.
    Type: Application
    Filed: February 14, 2003
    Publication date: February 12, 2004
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroto Takenaka, Hiroshi Nishikawa
  • Patent number: 6675816
    Abstract: In a parallel flat plate type plasma CVD apparatus, plasma damage of constituent parts in a reaction chamber due to irregularity of dry cleaning in the reaction chamber is reduced and the cost is lowered. In the parallel flat plate type plasma CVD apparatus in which high frequency voltages of pulse waves having mutually inverted waveforms are applied to an upper electrode and a lower electrode, and the inversion interval of the pulse wave can be arbitrarily changed, the interior of the reaction chamber is dry cleaned.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: January 13, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventor: Mitsuhiro Ichijo
  • Patent number: 6673722
    Abstract: An improved chemical vapor deposition or etching is shown in which cyclotron resonance and photo or plasma CVD cooperate to deposit a layer with high performance at a high deposition speed. The high deposition speed is attributed to the cyclotron resonance while the high performance is attributed to the CVDs.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: January 6, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 6659110
    Abstract: A method of removing organic impurities from a surface of a substrate that is used for feeding or processing web material, wherein a jet of an atmospheric plasma is directed onto the surface of the substrate.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: December 9, 2003
    Assignee: PlasmaTreat GmbH
    Inventors: Peter Förnsel, Christian Buske
  • Patent number: 6647994
    Abstract: An improved and new process for photoresist stripping for use during fabrication of semiconductor integrated circuits, which use porous low-k dielectric materials, such as OSG or HSQ, as the interlevel and intra-level insulating layers, has been developed. Photoresist stripping in microwave or rf generated plasmas in gaseous mixtures of NH3 and CO takes place without attack or damage to underlying layers of OSG or HSQ. Optimum results are obtained when the ratio of CO to NH3 is between about 0.8 and 1.2.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: November 18, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ming-Huei Lui, Mei-Hui Sung
  • Publication number: 20030192857
    Abstract: When etching a stacked-film layer including a plurality of films made of different quality materials by means of a magnetron plasma etching method, a magnetic field angle &thgr; at which the magnetic line of force 45 intersects the edge portion of a wafer surface approximately at right angles, is optimized and set to every sort of the film to be etched, thereby enabling good etching uniformity to be realized.
    Type: Application
    Filed: April 11, 2003
    Publication date: October 16, 2003
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Noriiki Masuda, Manabu Sato
  • Patent number: 6620335
    Abstract: A plasma etch reactor 20 includes a upper electrode 24, a lower electrode 24, a peripheral ring electrode 26 disposed therebetween. The upper electrode 24 is grounded, the peripheral electrode 26 is powered by a high frequency AC power supply, while the lower electrode 28 is powered by a low frequency AC power supply, as well as a DC power supply. The reactor chamber 22 is configured with a solid source 50 of gaseous species and a protruding baffle 40. A nozzle 36 provides a jet stream of process gases in order to ensure uniformity of the process gases at the surface of a semiconductor wafer 48. The configuration of the plasma etch reactor 20 enhances the range of densities for the plasma in the reactor 20, which range can be selected by adjusting more of the power supplies 30, 32.
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: September 16, 2003
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Leslie G. Jerde, Alferd Cofer, Robert C. Vail, Kurt A. Olson
  • Patent number: 6620334
    Abstract: An etching apparatus has (a) a processing unit to ionize a reactive gas and generate plasma to process a semiconductor wafer, (b) a bed on which the semiconductor wafer is set, (c) a first magnet arranged below the semiconductor wafer in the vicinity of the periphery of a semiconductor chip forming area defined on the semiconductor wafer, and (d) a second magnet arranged above the semiconductor wafer in the vicinity of the periphery of the semiconductor chip forming area.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: September 16, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masahiro Kanno
  • Patent number: 6589437
    Abstract: A method and an apparatus for actively controlling the density of the species generated in a plasma reactor using time-modulation. The method of the present invention includes providing an inductively coupled plasma reactor, irradiating a process gas and time-modulating an energy emission from the RF applicator in order to achieve a desired density of species within a plasma. The time-modulation includes varying an on-time and an off-time of the modulating signal. Moreover, a short on-time and a longer off-time is preferred if the degree of dissociation is to be minimized. The apparatus of the present invention, in which the above method may be carried out, includes an all-semiconductor chamber having a signal modulator. Moreover, the apparatus includes a reactor having various embodiments of a solenoidal antenna and a signal modulator.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: July 8, 2003
    Assignee: Applied Materials, Inc.
    Inventor: Kenneth S. Collins
  • Publication number: 20030121888
    Abstract: An etching method of the invention includes: an arranging step of arranging an object to be processed in a processing chamber, the object to be processed having a silicon oxide film and a silicon nitride film, the silicon oxide film being covered by the silicon nitride film; and an etching step of generating plasma of an etching gas in the processing chamber to etch the silicon nitride film of the object to be processed. A mixture gas including CH3F gas and O2 gas is used as the etching gas in the etching step. The essential feature of the invention is that a mixture ratio of the O2 gas with respect to the CH3F gas in the mixture gas (O2/CH3F) is set to be 4 to 9.
    Type: Application
    Filed: December 2, 2002
    Publication date: July 3, 2003
    Inventor: Kenji Adachi
  • Publication number: 20030111180
    Abstract: A plasma etching apparatus includes an upper electrode and a lower electrode (susceptor) on which a semiconductor wafer is disposed, the upper and lower electrodes being arranged within a process chamber, a first high frequency power source for applying a first high frequency power having a frequency not lower than 50 MHz to the upper electrode, a second high frequency power source for applying a high frequency power having a frequency not lower than 2 MHz and lower than the frequency of the first high frequency power to the upper and lower electrodes. The frequency of the high frequency power applied by the second high frequency source to the upper electrode is equal to that of the high frequency power applied by the second high frequency source to the lower electrode, and the high frequency power applied by the second high frequency source to the upper electrode has a reverse phase relative to the high frequency power applied by the second high frequency source to the lower electrode.
    Type: Application
    Filed: February 11, 2003
    Publication date: June 19, 2003
    Inventors: Kazunori Nagahata, Eiji Hirose
  • Patent number: 6558564
    Abstract: In the present invention, electron temperature is controlled by modifying the power delivered to the plasma by inducing or enhancing natural instabilities between the plasma and the power source. As a result, no pulse modulation of the RF power or RF generator is required. The instability is enhanced until the desired reduction in electron temperature has been achieved. In accordance with the invention, there are several modes for inducing such a natural instability.
    Type: Grant
    Filed: April 5, 2000
    Date of Patent: May 6, 2003
    Assignee: Applied Materials Inc.
    Inventors: Peter K. Loewenhardt, Wade Zawalski
  • Patent number: 6528429
    Abstract: In one aspect, the invention encompasses a method of etching insulative materials which comprise complexes of metal and oxygen. The insulative materials are exposed to physical etching conditions within a reaction chamber and in the presence of at least one oxygen-containing gas. In another aspect, the invention encompasses a method of forming a capacitor. An electrically conductive first layer is formed over a substrate, and a second layer is formed over the first layer. The second layer is a dielectric layer and comprises a complex of metal and oxygen. A conductive third layer is formed over the second layer. The first, second and third layers are patterned into a capacitor construction. The patterning of the second layer comprises exposing the second layer to at least one oxygen-containing gas while also exposing the second layer to physical etching conditions.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: March 4, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Daryl C. New
  • Patent number: 6517912
    Abstract: In a method for manipulating particles arranged in a plasma-cristalline state in a plasma of a carrier gas, the particles are at least partially subject to plasma treatment and/or applied to a substrate surface. A device for manipulating of particles in plasma-cristalline state includes a reaction vessel, in which plasma electrodes and at least one substrate are situated. An adaptive electrode for formation of a location selective low frequency or static electrical field in the reaction vessel is described.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: February 11, 2003
    Assignees: Max-Planck-Gesellschaft zur Forderung der Wissenschaften e.V., Kayser-Threde GmbH
    Inventors: Gregor Morfill, Hubertus Thomas, Timo Stuffler, Uwe Konopka
  • Patent number: 6508948
    Abstract: A method for etching features into a substrate by removing substrate material from selected areas while leaving the substrate substantially unaffected in other areas is provided including the steps of providing the substrate to be etched into a process chamber, providing a patterned mask on the substrate as a guide for selective removal of the substrate, the substrate having a mask area and mask-free area, introducing a chemical species of halogenated heterocylic hydrocarbons into the process chamber, applying excitation energy to the process chamber to cause the chemical species to dissociate and form reactive ions and neutral species, and maintaining an electric potential gradient in an area adjacent the substrate to impose directionality and anisotropy to the etch.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: January 21, 2003
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Brian Scott Felker, Ronald Martin Pearlstein
  • Patent number: 6509069
    Abstract: The present invention pertains to an apparatus and method useful in semiconductor processing. The apparatus and method can be used to provide a seal which enables a first portion of a semiconductor processing chamber to be operated at a first pressure while a second portion of the semiconductor processing chamber is operated at a second, different pressure. The sealing apparatus and method enable processing of a semiconductor substrate under a partial vacuum which renders conductive/convective heat transfer impractical, while at least a portion of the substrate support platform is under a pressure adequate to permit heat transfer using a conductive/convective heat transfer means. The sealing apparatus comprises a thin, metal-comprising layer, typically in the form of a strip or band, brazed to at least two different surfaces within said processing chamber, whereby the first and second portions of the semiconductor processing chamber are pressure isolated from each other.
    Type: Grant
    Filed: May 1, 1997
    Date of Patent: January 21, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Robert E. Davenport, Avi Tepman
  • Patent number: 6508885
    Abstract: A low-pressure processor for processing substrates includes a chuck that engages the substrates' peripheries for purposes of clamping, sealing, and centering the substrates on chuck bodies. For accomplishing all three purposes, a mechanical clamp can be arranged with two sealing regions. One of the sealing regions seals the clamp to a chuck body or an extension of the chuck body, and another of the sealing regions engages a peripheral edge surface of a substrate for sealing the clamp to the substrate. The second sealing region includes an inclined seating surface that engages a front edge of the substrate's peripheral edge surface and divides a clamping force into a first component that presses the substrate against the chuck body and a second component that centers the substrate on the chuck body.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: January 21, 2003
    Assignee: CVC Products, Inc.
    Inventors: Mehrdad M. Moslehi, Cecil J. Davis
  • Patent number: 6492280
    Abstract: A method and apparatus provide for etching a semiconductor wafer using a two step physical etching and a chemical etching process in order to create vertical sidewalls required for high density DRAMs and FRAMs.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: December 10, 2002
    Assignee: Tegal Corporation
    Inventors: Stephen P. DeOrnellas, Alferd Cofer, Paritosh Rajora
  • Patent number: 6488820
    Abstract: A substrate support and method for reducing the migration of a conductive material is provided. In one embodiment, a support includes a chuck body having a support side and a backside. A guard electrode is disposed within the chuck body proximate the backside of the chuck body. In another aspect, a method for reducing the migration of a conductive material is provided. In one embodiment, the method includes the steps of disposing a guard electrode proximate a backside of the substrate support and applying a voltage to the guard electrode.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: December 3, 2002
    Assignee: Applied Materials, Inc.
    Inventor: Vincent E. Burkhart
  • Patent number: 6465051
    Abstract: The invention is embodied in a method of cleaning a plasma reactor by creating a vacuum in the chamber while introducing an etchant gas into the chamber through the gas injection ports, and applying RF energy to a ceiling electrode in the chamber while not necessarily applying RF energy to the coil antenna, so as to strike a predominantly capacitively coupled plasma in the vacuum chamber. In another embodiment the method includes, whenever the reactor is to be operated in an inductive coupling mode, applying RF power to the reactors coil antenna while grounding the ceiling electrode, and whenever the reactor is to be operated in a capacitive coupling mode, applying RF power to the ceiling electrode, and whenever the reactor is to be cleaned, cleaning the reactor by applying RF power to the ceiling electrode and to the coil antenna while introducing an etchant gas into the vacuum chamber.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: October 15, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Turgut Sahin, Fred C. Redeker, Romuald Nowak, Shijian Li, Timothy Dyer, Derek R. Witty
  • Patent number: 6436304
    Abstract: A plasma processing method using helicon wave excited plasma which makes it possible to control a degree of dissociation for a process gas by controlling the source power. In the plasma processing method using helicon wave excited plasma, the source power applied to the plasma generator is set lower than a source power corresponding to a discontinuous change of a characteristic line indicating the dependency of electron density or saturated ion current density on source power.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: August 20, 2002
    Assignee: Anelva Corporation
    Inventor: Hiroshi Nogami
  • Patent number: 6423242
    Abstract: When in a chamber, an upper electrode and a lower electrode (suscepter) are provided opposite to each other and with a to-be-treated substrate supported by the lower electrode, the high-frequency electric field is formed between the upper electrode and the lower electrode to generate plasma of the process gas while introducing the process gas into the chamber held to the reduced pressure, and an etching is provided to the to-be-treated substrate with this plasma, the high frequency in the range from 50 to 150 MHZ, for example, 60 MHz, is applied to the upper electrode, and the high frequency in the range from 1 to 4 MHz, for example, 2 MHz, is applied to the lower electrode.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: July 23, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Masayuki Kojima, Yoshifumi Tahara, Masayuki Tomoyasu, Akira Koshiishi
  • Patent number: 6406759
    Abstract: An OAUGD plasma is generated using, for example, paraelectric or peristaltic electrohydrodynamic (EHD) techniques, in the plasma generator of a remote-exposure reactor, wherein one or more active species, especially oxidizing species in the plasma are convected away from the plasma-generation region and directed towards a workpiece that is located outside of the plasma-generation region (e.g., within an optional remote-exposure chamber configured to the plasma generator). In this way, the workpiece can be subjected to the one or more active species without directly being subjected to either the plasma or to the electric fields used to generate the plasma. The plasma generator may have a set of flat panels arranged within an air baffle to convect the active species in a serpentine manner through the plasma generator.
    Type: Grant
    Filed: July 28, 1999
    Date of Patent: June 18, 2002
    Assignee: The University of Tennessee Research Corporation
    Inventor: J. Reece Roth
  • Patent number: 6403490
    Abstract: A method of producing a plasma by capacitive discharges between an active electrode and a passive electrode within a sealed chamber at controlled pressure, the passive electrode being placed at a given electric potential while the active electrode is fed with a discharge-maintaining voltage. The active electrode and passive electrode define a separation plane therebetween parallel to the electrodes. According to the method, a multipole magnetic barrier is placed between the electrodes within the sealed chamber, the multipole magnetic barrier producing magnetic field lines extending across the separation plane. Fast electrons accelerated by the active electrode are caused to oscillate between magnetic poles in order to create plasma production and diffusion zones that are situated on either side of a magnetic barrier facing each of the electrodes.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: June 11, 2002
    Assignee: Metal Process (Societe a Responsabilite Limitee)
    Inventors: Thierry Lagarde, Jacques Pelletier
  • Publication number: 20020066537
    Abstract: A plasma reactor is provided for achieving extension of etching parameters to reduce charge-up shape anomaly and to improve selectivity, uniformity and workability in a dry etching process. An RF power fluctuates in cycles, each one of the cycles including first and second subcycles (25), (26) with different frequencies. The RF power in the first subcycles (25) is higher in frequency than that in the second subcycles (26). A charge accumulated during the first subcycles (25) in which the RF power of high frequency is applied can be relieved during the second subcycles (26) in which the RF power of low frequency is applied. At the same time, deterioration in an etching rate occurring with the application of only the RF power of low frequency can be relieved by applying the RF power of high frequency during the first subcycles (25).
    Type: Application
    Filed: May 1, 1997
    Publication date: June 6, 2002
    Inventors: SATOSHI OGINO, TAKAHIRO MARUYAMA
  • Publication number: 20020066531
    Abstract: A ring or collar surrounding a semiconductor workpiece in a plasma chamber. According to one aspect, the ring has an elevated collar portion having an inner surface oriented at an obtuse angle to the plane of the workpiece, this angle preferably being 135°. This angular orientation causes ions bombarding the inner surface of the elevated collar to scatter in a direction more parallel to the plane of the workpiece, thereby reducing erosion of any dielectric shield at the perimeter of the workpiece, and ameliorating spatial non-uniformity in the plasma process due to any excess ion density near such perimeter. In a second aspect, the workpiece is surrounded by a dielectric shield, and the shield is covered by a non-dielectric ring which protects the dielectric shield from reaction with, or erosion by, the process gases.
    Type: Application
    Filed: September 4, 2001
    Publication date: June 6, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Kuang-Han Ke, Bryan Y. Pu, Hongching Shan, James Wang, Henry Fong, Zongyu Li, Michael D. Welch
  • Patent number: 6399514
    Abstract: A plasma process for etching oxide and having a high selectivity to silicon including flowing into a plasma reaction chamber a fluorine-containing etching gas and maintaining a temperature of an exposed silicon surface within said chamber at a temperature of between 200° C. and 300° C. An example of the etching gas includes SiF4 and a fluorocarbon gas. The plasma may be generated by a capacitive discharge type plasma generator or by an electromagnetically coupled plasma generator, such as an inductively coupled plasma generator. The high selectivity exhibited by the etch process permits use of an electromagnetically coupled plasma generator, which in turn permits the etch process to be performed at low pressures of between 1 and 30 milliTorr, resulting the etching of vertical sidewalls in the oxide layer.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: June 4, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey Marks, Jerry Yuen-Kui Wong, David W. Groechel, Peter R. Keswick, Chan-Lon Yang