Substrate Contains Silicon Or Silicon Compound Patents (Class 216/99)
  • Patent number: 8809194
    Abstract: A method for performing a spacer etch process is described. The method includes conformally applying a spacer material over a gate structure on a substrate, and performing a spacer etch process sequence to partially remove the spacer material from the gate structure and the substrate, while retaining a sidewall spacer positioned along a sidewall of the gate structure. The spacer etch process sequence may include depositing a SiOCl-containing layer on an exposed surface of the spacer material to form a spacer protection layer.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: August 19, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Alok Ranjan, Kaushik Arun Kumar
  • Patent number: 8795542
    Abstract: A method to remove excess material during the manufacturing of semiconductor devices includes providing a semiconductor wafer comprising silicon nitride deposited thereon and applying a chemical solution to the semiconductor wafer, wherein the chemical solution comprises a combination of sulfuric acid and deionized water.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: August 5, 2014
    Assignee: Intermolecular, Inc.
    Inventor: Edwin Adhiprakasha
  • Patent number: 8790531
    Abstract: A high purity, non-toxic, environmentally friendly method for anisotropically etching single crystal silicon and etching polysilicon, suitable for microelectronics, optoelectronics and microelectromechanical (MEMS) device fabrication, using high purity aqueous ammonium hydroxide (NH4OH) solution generated at the point of use, is presented. The apparatus of the present invention supports generation of high purity aqueous NH4OH solution from ammonia NH3 gas dissolved into distilled/deionized water and maintained in equilibrium with an overpressure of NH3, within a hermetically enclosed chamber at the optimal temperature between 70-90° C., preventing evaporation of NH3 gas from aqueous NH4OH solution for achieving a high anisotropic etching rate. Other liquid anisotropic etching methods for silicon may use tetramethylammonium hydroxide (TMAH).
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: July 29, 2014
    Inventor: Alvin Gabriel Stern
  • Patent number: 8771531
    Abstract: A substrate for a liquid ejection head, including: forming a sacrifice layer on a first surface of a silicon substrate in a region in which a liquid supply port is to open, the sacrifice layer containing aluminum which is selectively etched with respect to the silicon substrate; forming an etching mask on a second surface which is a rear surface of the first surface of the silicon substrate, the etching mask having an opening corresponding to the sacrifice layer; a first etching step of etching the silicon substrate by using the etching mask as a mask and by using a first etchant containing 8 mass % or more and less than 15 mass % of tetramethylammonium hydroxide; and after the first etching step, a second etching step of removing the sacrifice layer by using a second etchant containing 15 mass % or more and 25 mass % or less of tetramethylammonium hydroxide.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: July 8, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenta Furusawa, Shuji Koyama, Hiroyuki Abo, Taichi Yonemoto
  • Patent number: 8772174
    Abstract: A method for treating silicon to form pillars, especially for use as the active anode material in Li-ion batteries, is disclosed. The process is simple to operate on a commercial scale since it uses a solution containing only a small number of ingredients whose concentration needs to be controlled and it can be cheaper to operate than previous processes. The solution includes: 0.01 to 5M HF 0.002 to 0.2M of metal ions capable of nucleating on and forming a porous layer comprising regions of elemental metal on the silicon surface; 0.001 to 0.7M of an oxidant selected from the group O2, O3, H2O2, the acid, ammonium or alkali metal salt of NO3?, S2O82?, NO2?, B4O72? and ClO4? or a mixture thereof. The treated silicon is suitably removed from the solution.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: July 8, 2014
    Assignee: Nexeon Ltd.
    Inventors: Mino Green, Feng-Ming Liu, Yuxiong Jiang, Valerie Elizabeth Dawn Stevens, Benjamin Odarkwei Mills-Lamptey
  • Patent number: 8765001
    Abstract: Monocrystalline semiconductor substrates are textured with alkaline solutions to form pyramid structures on their surfaces to reduce incident light reflectance and improve light absorption of the wafers. The alkaline baths include hydantoin compounds and derivatives thereof in combination with alkoxylated glycols to inhibit the formation of flat areas between pyramid structures to improve the light absorption.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: July 1, 2014
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Michael P. Toben, Robert K. Barr, Corey O'Connor
  • Patent number: 8758633
    Abstract: Disclosed is a method for fabricating nanofluidic channels having a height of from about 1 nm to about 10 nm. Generally, the method includes formation of doped silicon parallel strips in a silicon substrate, formation of a native oxide layer on the substrate, and etching of the native oxide layer at one of the strips to form a channel of a depth of between about 1 nm and about 10 nm. The method also includes bonding a second wafer to the surface, the second wafer including through etched windows to provide probe contacts to two of the parallel strips during use. These parallel strips provide high-frequency transmission lines in the device that can provide broadband dielectric spectroscopy measurement within the nanochannels.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: June 24, 2014
    Assignee: Clemson University
    Inventors: Pingshan Wang, Chunrong Song
  • Patent number: 8759231
    Abstract: The present disclosure includes a texture formulation that includes an aliphatic diol, an alkaline compound and water which provides a consistent textured region across a silicon surface suitable for solar cell applications. Processes for texturing a crystalline silicon substrate using these formulations are also described.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: June 24, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Zhi-Wen Sun, Sagar Vijay
  • Patent number: 8753528
    Abstract: The present disclosure provides a chemical etchant which is capable of removing Ge and Ge-rich SiGe alloys in a controlled manner. The chemical etchant of the present disclosure includes a mixture of a halogen-containing acid, hydrogen peroxide, and water. Water is present in the mixture in an amount of greater than 90% by volume of the entire mixture. The present disclosure also provides a method of making such a chemical etchant. The method includes mixing, in any order, a halogen-containing acid and hydrogen peroxide to provide a halogen-containing acid/hydrogen peroxide mixture, and adding water to the halogen-containing acid/hydrogen peroxide mixture. Also disclosed is a method of etching a Ge or Ge-rich SiGe alloy utilizing the chemical etchant of the present application.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: June 17, 2014
    Assignees: International Business Machines Corporation, S.O.I.TEC Silicon on Insulator Technologies
    Inventors: Stephen W. Bedell, Keith E. Fogel, Nicolas Daval
  • Patent number: 8747689
    Abstract: There are provided a liquid processing method and a liquid processing apparatus capable of providing a high etching rate and a high etching selectivity for silicon nitride against silicon oxide, and a storage medium storing the method thereon. In the method for etching, by an etching solution, a substrate on which silicon nitride and silicon oxide are exposed, the etching solution is produced by mixing a fluorine ion source material, water and a boiling point adjusting agent; the produced etching solution is heated to a substrate processing temperature equal to or higher than 140° C.; after a temperature of the etching solution reaches the substrate processing temperature, the temperature of the etching solution is maintained at the substrate processing temperature for a first preset time; and after a lapse of the first preset time, the substrate is etched by the etching solution maintained at the substrate processing temperature.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: June 10, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Hiroki Ohno, Takehiko Orii
  • Patent number: 8741160
    Abstract: Disclosed are a method for manufacturing a solar cell by processing a surface of a silicon substrate for a solar cell, a solar cell manufactured by the method, and a substrate processing system for performing the method. The method for manufacturing a solar cell comprises protrusion forming step including wet-etching process and for forming a plurality of minute protrusions on a light receiving surface of a crystalline silicon substrate, and planarization step of planarizing the bottom surface, the opposite surface to the light receiving surface of the substrate during or after the protrusion forming step.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: June 3, 2014
    Assignee: Wonik IPS Co., Ltd.
    Inventor: Byung-Jun Kim
  • Patent number: 8741168
    Abstract: According to one embodiment, an etching method includes: supplying an etching-resistant material; and etching the silicon nitride film. The supplying includes supplying the etching-resistant material to a processing surface including a surface of a silicon nitride film and a surface of a non-etching film, the non-etching film including a material different from the silicon nitride film. The etching includes etching the silicon nitride film using an etchant in a state of the etching-resistant material being formed relatively more densely on the surface of the non-etching film than on the surface of the silicon nitride film.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: June 3, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhito Yoshimizu, Hisashi Okuchi, Hiroshi Tomita
  • Patent number: 8741167
    Abstract: This invention provides a method of making a photovoltaic cell. The method uses an etching composition comprising one or more onium salts selected from the group consisting of iodonium salts and sulfonium and an organic medium to etch the anti-reflection coating. Also provided is a photovoltaic cell made by this method.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: June 3, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: Angel R Cartagena, Feng Gao, Haixin Yang, Lei Zhang
  • Patent number: 8741070
    Abstract: Disclosed are a liquid processing method, a liquid processing apparatus, and a recording medium that can prevent convex portions of a target substrate from collapsing when a rinsing liquid is dried. A base surface of a target substrate is hydrophilized and the surfaces of convex portions become water-repellent by surface-processing the target substrate which includes a main body, a plurality of convex portions protruding from the main body, and a base surface formed between the convex portions on the substrate main body. Next, a rinsing liquid is supplied to the target substrate which has been subjected to the surface processing. Thereafter, the rinsing liquid is removed from the target substrate.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: June 3, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Nobutaka Mizutani, Tsutae Omori, Takehiko Orii, Akira Fujita
  • Patent number: 8741777
    Abstract: A substrate processing method for forming a space extending along a predetermined line in a silicon substrate includes a first step of converging a laser light which is an elliptically-polarized light having an ellipticity other than 1 at the substrate so as to form a plurality of modified spots within the substrate along the line and construct a modified region including the modified spots, and a second step of anisotropically etching the substrate so as to advance an etching selectively along the modified region and form the space in the substrate. In the first step, the light is converged at the substrate such that a moving direction of the light with respect to the substrate and a direction of polarization of the light form an angle of less than 45° therebetween, and the modified spots are made align in a plurality of rows along the line.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: June 3, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hideki Shimoi, Keisuke Araki
  • Patent number: 8734659
    Abstract: A process for etching a silicon-containing substrate to form structures is provided. In the process, a metal is deposited and patterned onto a silicon-containing substrate (commonly one with a resistivity above 1-10 ohm-cm) in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. The metallized substrate is submerged into an etchant aqueous solution comprising about 4 to about 49 weight percent HF and an oxidizing agent such as about 0.5 to about 30 weight percent H2O2, thus producing a metallized substrate with one or more trenches. A second silicon etch is optionally employed to remove nanowires inside the one or more trenches.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: May 27, 2014
    Assignee: Bandgap Engineering Inc.
    Inventors: Brent A. Buchine, Faris Modawar, Marcie R. Black
  • Patent number: 8729798
    Abstract: Exemplary embodiments are disclosed of anti-reflective nanoporous silicon for efficient hydrogen production by photoelectrolysis of water. A nanoporous black Si is disclosed as an efficient photocathode for H2 production from water splitting half-reaction.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: May 20, 2014
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Jihun Oh, Howard M. Branz
  • Patent number: 8721910
    Abstract: A process for manufacturing a membrane of nozzles of a spray device, comprising the steps of laying a substrate, forming a membrane layer on the substrate, forming a plurality of nozzles in the membrane layer, forming a plurality of supply channels in the substrate, each supply channel being substantially aligned in a vertical direction to a respective nozzle of the plurality of nozzles and in direct communication with the respective nozzle.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: May 13, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Antonio Merassi, Angelo Pesci, Benedetto Vigna, Ernestino Galeazzi, Marco Mantovani
  • Patent number: 8721901
    Abstract: Embodiments disclosed include methods of processing substrates, including methods of forming conductive connections to substrates. In one embodiment, a method of processing a substrate includes forming a material to be etched over a first material of a substrate. The material to be etched and the first material are of different compositions. The material to be etched is etched in a dry etch chamber to expose the first material. After the etching, the first material is contacted with a non-oxygen-containing gas in situ within the dry etch chamber effective to form a second material physically contacting onto the first material. The second material comprises a component of the first material and a component of the gas. In one embodiment, the first material is contacted with a gas that may or may not include oxygen in situ within the dry etch chamber effective to form a conductive second material.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: May 13, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Nishant Sinha, Gurtej S. Sandhu
  • Patent number: 8703005
    Abstract: A method for removing a plurality of dielectric materials from a supporting substrate by providing a substrate with a plurality of materials, contacting the substrate at a first temperature with a solution to more quickly remove a first dielectric material than a second dielectric material at the first temperature, and then contacting the substrate at a second temperature with a solution to more quickly remove the second dielectric material than the first dielectric material at the second temperature. Thus, the dielectric materials exhibit different etch rates when etched at the first and second temperatures. The solutions to which the first and second dielectric materials are exposed may contain phosphoric acid. The first dielectric material may be silicon nitride and the second dielectric material may be silicon oxide. Under these conditions, the first temperature may be about 175° C., and the second temperature may be about 155° C.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: April 22, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Li Li, Don L. Yates
  • Patent number: 8685269
    Abstract: A laser processing method of converging laser light into an object to be processed made of silicon so as to form a modified region and etching the object along the modified region so as to form the object with a through hole comprises a laser light converging step of converging the laser light at the object so as to form the modified region along a part corresponding to the through hole in the object; an etch resist film producing step of producing an etch resist film resistant to etching on an outer surface of the object after the laser light converging step; and an etching step of etching the object so as to advance the etching selectively along the modified region and form the through hole after the etch resist film producing step; while the laser light converging step exposes the modified region to the outer surface of the object.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: April 1, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hideki Shimoi, Keisuke Araki
  • Patent number: 8673167
    Abstract: A laser processing method for forming a hole in a sheet-like object to be processed made of silicon comprises a depression forming step of forming a depression in a part corresponding to the hole on a laser light entrance surface side of the object, the depression opening to the laser light entrance surface; a modified region forming step of forming a modified region along a part corresponding to the hole in the object by converging a laser light at the object after the depression forming step; and an etching step of anisotropically etching the object after the modified region forming step so as to advance the etching selectively along the modified region and form the hole in the object; wherein the modified region forming step exposes the modified region or a fracture extending from the modified region to an inner face of the depression.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: March 18, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hideki Shimoi, Hiroyuki Kyushima, Keisuke Araki
  • Patent number: 8673788
    Abstract: A method of fabricating a semiconductor device is illustrated. A substrate having a plurality of trenches is provided. The plurality of trenches include trenches having differing widths. A first layer is formed on the substrate including in the plurality of trenches. Forming the first layer creates an indentation in the first layer in a region overlying a trench (e.g., wide trench). A second layer is formed in the indentation. The first layer is etched while the second layer remains in the indentation. The second layer may protect the region of indentation from further reduction in thickness. In an embodiment, the first layer is polysilicon and the second layer is BARC of photoresist.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: March 18, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hsiu Cheng, Shih-Hao Wu, Chih-Hsien Hsu, Chia-Chi Chung, Wei-Yueh Tseng
  • Patent number: 8673168
    Abstract: An object and project of the present invention is to provide a method for producing silicon fine particles and a method for controlling a particle diameter of silicon fine particles which enable efficient production of silicon fine particles having a uniform particle diameter. A the characteristics of the present invention is producing silicon fine particles having a smaller particle diameter than silicon particles and controlling a particle diameter of silicon fine particles by immersing the silicon particles into an etching solution and irradiating the silicon particles immersed in the etching solution with light having a larger energy than a band gap energy of the silicon particles.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: March 18, 2014
    Assignee: Bridgestone Corporation
    Inventors: Seiichi Sato, Mari Miyano, Shigeki Endo, Osamu Shiino, Shingo Ono, Masato Yoshikawa
  • Patent number: 8673164
    Abstract: A method to fabricate nanoporous diamond membranes and a nanoporous diamond membrane are provided. A silicon substrate is provided and an optical lithography is used to produce metal dots on the silicon substrate with a predefined spacing between the dots. Selective seeding of the silicon wafer with nanodiamond solution in water is performed followed by controlled lateral diamond film growth producing the nanoporous diamond membrane. Back etching of the under laying silicon is performed to open nanopores in the produced nanoporous diamond membrane.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: March 18, 2014
    Assignee: UChicago Argonne, LLC
    Inventor: Anirudha V. Sumant
  • Patent number: 8664022
    Abstract: A submount for a light emitting diode and a method for fabricating the same are provided. The method includes the following steps: (a) providing a silicon substrate; (b) forming a mask layer on the silicon substrate to expose a part of the silicon substrate; (c) forming a first silicon oxide layer in the part of the silicon substrate which is exposed; and (d) removing the mask layer and the first silicon oxide layer, so as to form a recess in the silicon substrate.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: March 4, 2014
    Assignee: Episil Technologies Inc.
    Inventors: Le-Sheng Yeh, Cheng-I Chien
  • Patent number: 8663487
    Abstract: The invention is directed to the provision of a method for manufacturing a crystal oscillator manufacturing method that can achieve a highly precise fine adjustment without applying unnecessary external force to a crystal oscillator, and that can adjust a plurality of crystal oscillators in a collective manner. More specifically, the invention provides a method for manufacturing a crystal oscillator includes a first etching step for forming a prescribed external shape, an electrode forming step for forming an electrode at least in a portion of a surface of the external shape, a leakage amount measuring step for measuring leakage amount associated with leakage vibration of the external shape, and a second etching step for etching the external shape by an amount that is determined based on a measurement result of the leakage amount measuring step so as to adjust balance.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: March 4, 2014
    Assignee: Citizen Holdings Co., Ltd.
    Inventors: Akiko Katoh, Tohru Yanagisawa
  • Patent number: 8658544
    Abstract: This invention relates to a method for texturing a silicon surface and silicon wafers made by the method, where the method comprises immersing the wafers in an alkaline solution at pH>10, and applying a potential difference between the wafer and a platinum electrode in the electrolyte in the range of +10 to +85 V.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: February 25, 2014
    Assignee: Norut Narvik AS
    Inventors: Ingemar Olefjord, Timothy C. Lommasson
  • Patent number: 8656936
    Abstract: Apparatuses, and related methods, for processing a workpiece that include a particular barrier structure that can overlie and cover a workpiece. Apparatuses, and related methods, for processing a workpiece that include a particular movable member that can be positioned over and moved relative to a workpiece. Apparatuses, and related methods, for processing a workpiece that include a particular ceiling structure that can overlie a processing chamber. Nozzle devices, and related methods, that include a particular annular body. Nozzle devices, and related methods, that include a particular first, second, and third nozzle structure.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: February 25, 2014
    Assignee: Tel FSI, Inc.
    Inventors: Jimmy D. Collins, Samuel A. Cooper, James M. Eppes, Alan D. Rose, Kader Mekias
  • Patent number: 8652345
    Abstract: A method of forming a patterned substrate is provided. The method includes providing a substrate (300) having a structured surface region comprising one or more recessed features (310). The method includes disposing a first liquid (325) onto at least a portion of the structured surface region. The method includes contacting the first liquid with a second liquid (330). The method includes displacing the first liquid with the second liquid from at least a portion (315) of the structured surface region. The first liquid is selectively located in at least a portion of the one or more recessed features.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: February 18, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Cristin E. Moran, Matthew H. Frey, Matthew S. Stay, Mikhail L. Pekurovsky
  • Patent number: 8647526
    Abstract: The object of the present invention is a new inkjet printable etching composition comprising an etchant, which is activated by a second component. Thus, a further object is the use of this new composition in a process for the etching of surfaces semiconductor devices or surfaces of solar cell devices.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: February 11, 2014
    Assignee: Merck Patent Gesellschaft mit Beschrankter Haftung
    Inventors: Oliver Doll, Edward Plummer, Mark James, Ingo Koehler
  • Publication number: 20140034607
    Abstract: An implanted parylene tube shunt relieves intra-ocular pressure. The device is implanted with an open end in the anterior chamber of the eye, allowing excess fluid to be drained through the tube out of the eye. In one embodiment, only a first end of the tube implanted into the anterior chamber of the eye is open. Intra-ocular pressure (IOP) is then monitored, for example utilizing an implanted sensor. When IOP exceeds a critical valve, a practitioner intervenes, puncturing with a laser a thinned region of the tube lying outside the eye, thereby initiating drainage of fluid and relieving pressure. In accordance with alternative embodiments, the both ends of the tube are open, and the tube includes a one-way valve configured to permit drainage where IOP exceeds the critical value. The tube may include projecting barbs to anchor the tube in the eye without the need for sutures.
    Type: Application
    Filed: June 19, 2013
    Publication date: February 6, 2014
    Inventors: Ellis Fan-chuin Meng, Po-Jui Chen, Damien C. Rodger, Yu-Chong Tai, Mark S. Humayun
  • Patent number: 8637409
    Abstract: An etching method includes: applying a radiation to an etching aqueous solution; and etching a material to be etched by using the etching aqueous solution irradiated with the radiation.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: January 28, 2014
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Masayuki Takeda
  • Publication number: 20140021169
    Abstract: The disclosure provides a polyimide-containing layer suitable for being etched by an alkaline solution and a method for etching a polyimide-containing layer. The polyimide-containing layer suitable for being etched by an alkaline solution includes 20-50 parts by weight of a silica dioxide, and 50-80 parts by weight of a polyimide.
    Type: Application
    Filed: May 22, 2013
    Publication date: January 23, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Cheng LIN, Chyi-Ming LEU
  • Publication number: 20140020556
    Abstract: A mass separation method utilizing a turbomolecular pump includes providing a gas, having analytes and ambient molecules, to an inlet chamber for allowing flow of gas into the pump, pulling gas into a pump chamber via motion of at least one of a rotor and a stator, positioning the rotor and stator such that the gas flows around an outer surface of one of the rotor or stator, and then inward toward a central axis and then toward a gas outlet, and wherein one or more target molecular or atomic species that are heavier than the ambient molecules in the gas at the inlet are passed through the chamber via the rotor and stator and a partial pressure of analytes in a gas at the outlet is increased by a larger factor than the ambient molecules at the outlet, resulting in an increase in the number analytes versus ambient molecules.
    Type: Application
    Filed: November 5, 2012
    Publication date: January 23, 2014
    Applicant: Honeywell International Inc.
    Inventor: Honeywell International Inc.
  • Patent number: 8632691
    Abstract: Disclosed herein is an interface treatment method for germanium-based device, which belongs to the field of manufacturing technologies of ultra large scaled integrated (ULSI) circuits. In the method, the natural oxide layer on the surface of the germanium-based substrate is removed by using a concentrated hydrochloric acid solution having a mass percentage concentration of 15%˜36%, and dangling bonds of the surface are performed a passivation treatment by using a diluted hydrochloric acid solution having a mass percentage concentration of 5%˜10% so as to form a stable passivation layer on the surface. This method makes a good foundation for depositing a high-K (high dielectric constant) gate dielectric on the surface of the germanium-based substrate after cleaning and passivating, enhances quality of the interface between the gate dielectric and the substrate, and improves the electrical performance of germanium-based MOS device.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: January 21, 2014
    Assignee: Peking University
    Inventors: Ru Huang, Min Li, Xia An, Ming Li, Meng Lin, Xing Zhang
  • Patent number: 8628674
    Abstract: A method for trimming a structure obtained by bonding a first wafer to a second waver on contact faces and thinning the first waver, wherein at least either the first wafer or the second wafer is chamfered and thus exposes the edge of the contact face of the first wafer, wherein the trimming concerns the first wafer. The method includes a) selecting the second wafer from among wafers with a resistance to a chemical etching planned in b) that is sufficient with respect to the first wafer to allow b) to be carried out; b) after bonding the first wafer to the second wafer, chemical etching the edge of the first wafer to form in the first wafer a pedestal resting entirely on the contact face of the second wafer and supporting the remaining of the first wafer; and c) thinning the first wafer until the pedestal is reached and attacked, to provide a thinned part of the first wafer.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: January 14, 2014
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, Soitec
    Inventors: Marc Zussy, Bernard Aspar, Chrystelle Lagahe-Blanchard, Hubert Moriceau
  • Publication number: 20140001156
    Abstract: A method is described for etching ceramic phosphor converters. The method includes contacting a surface of the converter with a solution of phosphor acid for a time sufficient to etch the converter.
    Type: Application
    Filed: June 14, 2013
    Publication date: January 2, 2014
    Applicant: OSRAM SYLVANIA INC.
    Inventor: Alan Piquette
  • Publication number: 20130341304
    Abstract: A resist underlayer film-forming composition includes a polymer having a glass transition temperature (Tg) of 0 to 180° C. The resist underlayer film-forming composition is used for a multilayer resist process. The multilayer resist process includes forming a silicon-based oxide film on a surface of a resist underlayer film, and subjecting the silicon-based oxide film to wet etching.
    Type: Application
    Filed: August 28, 2013
    Publication date: December 26, 2013
    Applicant: JSR CORPORATION
    Inventors: Shin-ya MINEGISHI, Kazuhiko KOMURA, Shin-ya NAKAFUJI, Takanori NAKANO
  • Patent number: 8609221
    Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: December 17, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu
  • Patent number: 8585910
    Abstract: A process for producing a micromachined tube (microtube) suitable for microfluidic devices. The process entails isotropically etching a surface of a first substrate to define therein a channel having an arcuate cross-sectional profile, and forming a substrate structure by bonding the first substrate to a second substrate so that the second substrate overlies and encloses the channel to define a passage having a cross-sectional profile of which at least half is arcuate. The substrate structure can optionally then be thinned to define a microtube and walls thereof that surround the passage.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: November 19, 2013
    Assignee: Integrated Sensing Systems Inc.
    Inventors: Douglas Ray Sparks, Nader Najafi
  • Patent number: 8585918
    Abstract: A method is described of selectively etching a silicon substrate in small local areas in order to form columns or pillars in the etched surface. The silicon substrate is held in an etching solution of hydrogen fluoride, a silver salt and an alcohol. The inclusion of the alcohol provides a greater packing density of the silicon columns.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: November 19, 2013
    Assignee: Nexeon Ltd.
    Inventors: Mino Green, Feng-Ming Liu
  • Patent number: 8580158
    Abstract: Some embodiments include methods of removing silicon dioxide in which the silicon dioxide is exposed to a mixture that includes activated hydrogen and at least one primary, secondary, tertiary or quaternary ammonium halide. The mixture may also include one or more of thallium, BX3 and PQ3, where X and Q are halides. Some embodiments include methods of selectively etching undoped silicon dioxide relative to doped silicon dioxide, in which thallium is incorporated into the doped silicon dioxide prior to the etching. Some embodiments include compositions of matter containing silicon dioxide doped with thallium to a concentration of from about 1 weight % to about 10 weight %.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: November 12, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Nishant Sinha
  • Patent number: 8580696
    Abstract: Systems and methods for detecting watermark formations on semiconductor wafers are described. In one embodiment, a method comprises providing a semiconductor wafer having at least one watermark sensitive region fabricated thereon, subjecting the wafer to a wet processing step, enhancing a susceptibility to detection of at least one watermark formation created on the at least one watermark sensitive region, and detecting the at least one watermark formation. In another embodiment, a method comprises growing a first oxide layer on a surface of a semiconductor wafer, patterning a watermark sensitive structure on the first oxide layer, depositing a silicon layer over the first oxide layer, doping a region of the silicon layer over the watermark sensitive structure with an impurity to create a watermark sensitive region that is prone to retaining watermark formations as result of a wet processing step, and growing a second oxide layer over the silicon layer.
    Type: Grant
    Filed: July 27, 2007
    Date of Patent: November 12, 2013
    Assignee: Abound Limited
    Inventors: Kiyoshi Mori, Shu Ikeda, Gabriel Gebara
  • Patent number: 8562855
    Abstract: In etching processing of silicon, in particular anisotropic etching processing of silicon in a manufacturing step of MEMS parts, an etching liquid having a long life of etching liquid and an etching method are provided by suppressing a lowering of an etching rate at the time of warming which is characteristic of a hydroxylamine-containing etching liquid. A silicon etching liquid which is an alkaline aqueous solution containing an alkali metal hydroxide, hydroxylamine and an inorganic carbonate compound and having a pH of 12 or more and which is able to anisotropically dissolve monocrystalline silicon therein, and an etching method of silicon using this etching liquid are provided.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: October 22, 2013
    Assignee: Mitsubishi Gas Chemical Company, Inc.
    Inventors: Kazuyoshi Yaguchi, Ryuji Sotoaka
  • Patent number: 8563440
    Abstract: A method for chemically treating a disc-shaped substrate having a bottom surface, a top surface and side surfaces by contacting a process medium that is fluid-chemically active with at least the bottom surface of the substrate. The substrate is moved relative to the process medium while forming a triple line between the substrate, the substrate medium and the atmosphere surrounding the substrate and medium. In order to chemically remove errors, particularly in the side surfaces, relative motion should be carried out while avoiding a contacting of the process medium with the top surface of the substrate, where the triple line is formed at a desired height of the side surface facing away from the process medium flow side in relation to the relative motion between the substrate and the process medium.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: October 22, 2013
    Assignee: Schott Solar AG
    Inventors: Andreas Teppe, Berthold Schum, Dieter Franke, Ingo Schwirtlich, Knut Vaas, Wilfried Schmidt
  • Patent number: 8540891
    Abstract: The invention relates to novel etching media in the form of etching pastes for etching selected areas or the entire area of silicon surfaces and layers, in addition to the use of said media.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: September 24, 2013
    Assignee: Merck Patent GmbH
    Inventors: Armin Kübelbeck, Sylke Klein, Werner Stockum
  • Patent number: 8535544
    Abstract: A method of fabricating a material having nanoscale pores is provided. In one embodiment, the method of fabricating a material having nanoscale pores may include providing a single crystal semiconductor. The single crystal semiconductor layer is then patterned to provide an array of exposed portions of the single crystal semiconductor layer having a width that is equal to the minimum lithographic dimension. The array of exposed portion of the single crystal semiconductor layer is then etched using an etch chemistry having a selectivity for a first crystal plane to a second crystal plane of 100% or greater. The etch process forms single or an array of trapezoid shaped pores, each of the trapezoid shaped pores having a base that with a second width that is less than the minimum lithographic dimension.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: September 17, 2013
    Assignee: International Business Machines Corporation
    Inventors: Chengwen Pei, Zhengwen Li
  • Patent number: 8524103
    Abstract: A method for manufacturing a susceptor includes: forming a concave pattern in a surface of a substrate to be processed; applying a SiC paste containing a SiC powder and a sintering agent to the surface of the substrate to be processed to fill the concave pattern to form a SiC coating layer; laminating a SiC substrate on the SiC coating layer; and firing the SiC coating layer to form a SiC layer having at least one convex section on the surface of the SiC substrate.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: September 3, 2013
    Assignee: NuFlare Technology, Inc.
    Inventors: Hideki Arai, Masayoshi Yajima, Kunihiko Suzuki
  • Patent number: RE44995
    Abstract: A method for producing a semiconductor component includes forming an n-doped layer in a p-doped layer of the semiconductor component, wherein the n-doped layer comprises at least one of: a sieve-like layer or a network-like layer. The method also includes porously etching the p-doped layer between the material of the n-doped layer to form a top electrode, and forming a cavity below the n-doped layer.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: July 8, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Hubert Benzel, Heribert Weber, Hans Artmann, Frank Schaefer