Of Electrical Device (e.g., Semiconductor) Patents (Class 228/179.1)
  • Publication number: 20090120998
    Abstract: A heating and pressurizing apparatus (101), to which a circuit board (70) with electronic components (8) pre-bonded thereto via bonding elements (9) is carried in, is provided. The heating and pressurizing apparatus post-bonds the electronic component to the circuit board by heating and pressurizing the electronic component by a contact member (1211) having a heating device (122). By executing the pre-bonding and the post-bonding of the electronic components to the circuit board independently of each other, the time required for the post-bonding can be reduced, compared with the conventional case, and the productivity of the whole mounting line can be improved.
    Type: Application
    Filed: January 8, 2009
    Publication date: May 14, 2009
    Inventors: Shozo Minamitani, Naoto Hosotani, Koichi Morita, Syunji Onobori, Kenichi Nishino
  • Patent number: 7510108
    Abstract: A method of making an electronic assembly comprising an electronic component that is attached to a circuit board by protruding solder bumps of the electronic component places the electronic component on a surface of the circuit board so that solder bumps on the bottom of the electronic component engage contact pads on the top of the circuit board. The solder bumps are then reflowed to attach the electronic component to the circuit board after which the electronic component is underfilled by providing a mold die having a mold cavity, a gate leading into the mold cavity and a vent leading out of the mold cavity. The mold die is placed over the electronic component and onto the surface of the circuit board so that the electronic component is inside the mold cavity and the mold cavity is sealed.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: March 31, 2009
    Assignee: Delphi Technologies, Inc.
    Inventors: Daniel A. Lawlyes, David A. Laudick
  • Publication number: 20090050677
    Abstract: An exemplary method of welding electronic components on PCBs is disclosed. Firstly, a metal tray including a number of supporting areas is provided. At least one through hole is formed in each of the supporting areas. Secondly, solder pastes are applied onto welding pads of PCBs. Thirdly, electronic components are mounted on the welding pads. Fourthly, PCBs are placed on the metal tray in a manner that each printed circuit board is placed in a corresponding supporting area and the welding pads being above the through hole. Finally, the solder pastes are heated to weld the electronic components on the printed circuit board. By doing so, the heat can pass through the through holes in each supporting area directly and fully melt the solder paste. As a result, welding defects can be reduced.
    Type: Application
    Filed: April 14, 2008
    Publication date: February 26, 2009
    Applicants: FUKUI PRECISION COMPONENT (SHENZHEN) CO., LTD., FOXCONN ADVANCED TECHNOLOGY INC.
    Inventors: JIAN-YI HAO, I-HSIEN CHIANG, CHENG-HSIEN LIN
  • Publication number: 20090040415
    Abstract: A flexible printed circuit board for use in a liquid crystal display device includes: a body section having a light source portion embedded therein; a leg section including a solder pad connected to an external printed circuit board, the leg section being extended from the body section and integrally formed with the body section; and a single conductive layer formed across the body section and the leg section for electrically interconnecting the light source portion and the solder pad.
    Type: Application
    Filed: July 3, 2008
    Publication date: February 12, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Wal-Hee Kim
  • Publication number: 20090014502
    Abstract: An improved placing method and placing apparatus are provided for placing conductive balls in a predetermined pattern onto a base unit. In the placing method for placing balls having conductivity in a predetermined pattern onto one surface of the base unit, an arrangement member has one surface, another surface opposite to the one surface of the arrangement member and positioning openings, wherein the positioning openings are arranged corresponding to the pattern such that the openings are through from the one surface to the another surfaces of the arrangement member so that the balls are inserted therein. The another surface of the arrangement member is positioned opposite to the one surface of the base unit. The arrangement member has two or more line members of which the core axes are substantially aligned.
    Type: Application
    Filed: August 25, 2008
    Publication date: January 15, 2009
    Inventors: Motoyuki Itoh, Masanori Ochiai, Shinichi Kazui
  • Publication number: 20090008431
    Abstract: Apparatus, which is useful as both a conductive gasket and a grounding pad, which has a compressible elastomeric substrate having at least one side surface and two ends, a conductive elastomeric layer adjacent to all of the side surfaces of the compressible substrate, and a metal layer adjacent to the conductive layer.
    Type: Application
    Filed: July 3, 2007
    Publication date: January 8, 2009
    Inventors: Kossi Zonvide, Jeremy Trethewey
  • Patent number: 7474022
    Abstract: A liquid-cooled armature bar end fitting-to-strand brazed connection. The end fitting is comprised of a main body and a cover, and defines a cavity, a bottom wall of which is defined in part by the cover. An armature winding bar strand package including solid strands and hollow strands arranged in a tiered array extends into the end fitting so that at least the free ends of the hollow strands extend beyond the bottom wall, into the cavity. The side wall of the cavity is spaced from the hollow strands. A braze alloy joins the strands to each other and to the end fitting. The braze alloy forms an isolation layer over the free ends of the solid strands and over the said bottom wall of the cavity to a depth above a horizontal junction between the main body and the cover.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: January 6, 2009
    Assignee: General Electric Company
    Inventors: George R. Silliman, Joseph Alan Worden, David Robert Schumacher, Jeffrey Michael Breznak, Alan Michael Iversen, Lawrence Lee Sowers
  • Publication number: 20080302860
    Abstract: An air bearing gap control arrangement for injection molded solder filler heads. Also provided is a method of providing for a gap control for injection molded solder filler heads utilizing an air bearing arrangement. Provided is a C-ring seal, at the lower or dispensing region of the solder filler head structure, wherein the C-shape is open at the leading edge thereof. Hereby, a prevalent leading edge gap is tightly controlled by means of pressurized air in order to form an air bearing. Downstream of this leading edge is the molten solder, which is contained within a very narrow gap height between the solder filler head and the mold. As the solder fills the pits or recesses which are formed in the mold surface, air will rush out or be displaced from the pits towards the air bearing and is then expelled, while the deposited solder remains in place.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 11, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Glen N. Biggs, Timothy J. Chainer, John P. Karidis, Dennis G. Manzer, Christopher L. Tessler
  • Patent number: 7456438
    Abstract: A nitride-based semiconductor LED which is flip-chip bonded on a lead pattern of a sub-mount through a bump ball comprises a substrate; a light-emitting structure formed on the substrate; an electrode formed on the light-emitting structure; a protective film formed on the resulting structure having the electrode formed therein, the protective film exposing the electrode surface corresponding to a portion which is connected to the lead pattern of the sub-mount through a bump ball; and a grid-shape buffer film formed on the electrode surface exposed through the protective film.
    Type: Grant
    Filed: October 17, 2006
    Date of Patent: November 25, 2008
    Assignee: Samsung Electro-Mechanics Co., ltd.
    Inventors: Hyuk Min Lee, Hyoun Soo Shin, Chang Wan Kim, Yong Chun Kim
  • Publication number: 20080245846
    Abstract: A method of creating an electrical connection involves providing a pair of contacts each on one of two different chips, the pair of contacts defining a volume therebetween, the volume containing at least two compositions each having melting points, the compositions having been selected such that heating to a first temperature will cause a change in at least one of the at least two compositions such that the change will result in a new composition having a new composition melting point of a second temperature, greater than the first temperature and the melting point of at least a first of the at least two compositions, and heating the pair of contacts and the at least two compositions to the first temperature.
    Type: Application
    Filed: April 5, 2007
    Publication date: October 9, 2008
    Inventor: John Trezza
  • Patent number: 7389905
    Abstract: A flip chip bonding tool tip comprising a dissipative material with a resistance low enough to prevent a discharge of a charge to a device being bonded and high enough to avoid current flow large enough to damage the device being bonded is disclosed. Methods for manufacturing a dissipative material for use in a flip chip bonding tool tip are further disclosed.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: June 24, 2008
    Inventor: Steven F. Reiber
  • Publication number: 20080099535
    Abstract: A method for mounting an electronic component on a substrate includes: forming an Au bump (24) on a surface of an electrode (20) of a substrate (10); placing an Sn-based solder sheet (26) on the Au bump; subjecting the Sn-based solder sheet and the Au bump to reflow soldering, to thus form an Au—Sn eutectic alloy (28); smoothing the eutectic alloy; and bonding an electronic component (30) on a surface of the smoothed eutectic alloy.
    Type: Application
    Filed: October 25, 2007
    Publication date: May 1, 2008
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Kei Murayama
  • Patent number: 7364063
    Abstract: The base of a heat sink may be selectively plated with a solder wetting material and soldered to an integral heat spreader also selectively plated with gold. In another embodiment, the solder may be applied in the form of an insert made up of an electrical heating wire sandwiched between indium foil which acts as solder when heated by the intervening wire.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: April 29, 2008
    Assignee: Intel Corporation
    Inventors: Matthew J. Schaenzer, Thomas J. Fitzgerald, Tim A. Renfro, Manjit Dhindsa, Vaibhav P. Trivedi
  • Patent number: 7360679
    Abstract: A method for the production of a soldered joint between at least two contact partners (22, 23) of a bonding arrangement (21), with a formed piece of solder material (27) being arranged at a distance to the bonding arrangement. The formed piece of solder material is at least partially melted off. The at least partially melted off formed piece of solder material being thrust against a bonding arrangement in such a way that both bonding partners are wetted in a bonding area to establish an electrically conductive bonding.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: April 22, 2008
    Assignee: Smart Pac GmbH Technology Services
    Inventor: Ghassem Azdasht
  • Patent number: 7344060
    Abstract: A device for orienting an integrated lead suspension tail during a head gimbal assembly soldering operation of a head stack assembly process is disclosed. The device includes a body portion and at least one pin extending from the body portion. The pin(s) is configured to position the integrated lead suspension tail proximate to a main flex cable such that electrical coupling between the integrated lead suspension tail and the main flex cable is established upon completion of said head gimbal assembly soldering operation. The pin(s) has sufficient length to extend past a terminal end of the main flex cable.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: March 18, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventor: Choon Kuay Koh
  • Patent number: 7325715
    Abstract: A housing for microelectronic devices requiring an internal vacuum for operation, e.g., an image detector, is formed by tape casting and incorporates leads between interior and exterior of said housing where said leads are disposed on a facing surface of green tape layers. Adjacent green tape layers having corresponding apertures therein are stacked on a first closure member to form a resulting cavity and increased electrical isolation or channel sub-structures are achievable by forming adjacent layers with aperture dimension which vary non-monotonically. After assembly of the device within the cavity, a second closure member is sealed against an open face of the package in a vacuum environment to produce a vacuum sealed device.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: February 5, 2008
    Assignee: Interac, Inc.
    Inventor: Kenneth A. Costello
  • Patent number: 7267260
    Abstract: Optical fibers are inserted and bonded in a two dimensional array of feedthroughs provided by an insert having a top plate, a bottom plate and a sandwiched spacer plate. Top and bottom plate feature funnel shaped hole sections that capture the approaching fiber end during its insertion. The funnel sections terminate in narrow hole sections that tightly hold the inserted fiber ends. Having top and bottom plate spaced apart provides for high angular precision of the bonded fiber ends with minimal fabrication effort of the insert. Optical fibers may be combined in linear arrays and simultaneously inserted significantly reducing assembly efforts. The insert is attached to a fiber housing and hermetically sealed within an external housing, which features a glass plate to provide beam propagation to and from the fiber ends. An optical gel fills the gap between the insert's output face and the glass plate.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: September 11, 2007
    Assignee: Intel Corporation
    Inventors: Steven S. Nasiri, Janusz Liberkowski, Zhenfang Chen, Jeff Jarfa
  • Patent number: 7265315
    Abstract: A method of joining terminals by soldering is provided which allows control of increasing gas supply even in soldering performed in a gas atmosphere within a gas chamber. Utilizing a springback phenomenon occurring at a flat portion of a terminal, a solder joint of the terminal is immersed in molten solder. Then, laser soldering is performed using a gas chamber made of a material which transmits a laser beam at least in part.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: September 4, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Atsushi Oohashi, Shoichiro Nishitani, Takahiro Yamada
  • Patent number: 7258264
    Abstract: Methods of manufacturing optical transceiver modules using lead frame connectors that connect optical sub-assemblies to printed circuit boards are disclosed. The lead frame connector includes an electrically insulating case having a first part separated from a second part and a plurality of conductors that are electrically isolated one from another by the electrically insulating case. Each of the plurality of conductors can form an electrical contact restrained in a fixed position with respect to the first part and a contact point extending from the second part. The electrical contact is aligned with and soldered to the leads that protrude from the back end of an optical sub-assembly. The contact points can then be connected to electrical pads on a PCB.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: August 21, 2007
    Assignee: Finisar Corporation
    Inventors: Donald A. Ice, Darin James Douma
  • Publication number: 20070157464
    Abstract: An apparatus and method for soldering an LED driving element to an LCD panel includes a panel holding unit, a rotating unit and a soldering unit. The panel holding unit holds the display panel. The rotating unit supports the panel holding unit at initial radial and angular positions relative to a center of rotation of the rotating unit and rotates the holding unit in a horizontal plane about the center of rotation to selected angular positions relative thereto. The soldering unit is disposed above the rotating unit at the initial radial position and at a first angular position relative to initial angular position of the holding unit, and is operable to solder the driving element of the display panel held by the panel holding unit when the rotating unit rotates the panel holding unit to the first angular position. The apparatus and method provide improved display panel productivity.
    Type: Application
    Filed: October 5, 2006
    Publication date: July 12, 2007
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Woo Jeon, Hyun-Gyu Choi, Hee-Young Park, Ho-Jeong Kang
  • Patent number: 7195145
    Abstract: A method for assembling an electrical circuit apparatus that includes; a substrate having a top side, a ground layer, at least one thermal aperture, and at least one solder aperture; a heat sink; and an adhesive layer for mechanically coupling the heat sink to the ground layer of the substrate, the adhesive layer having at least one aperture wherein aligning the at least one substrate solder aperture with the at least one adhesive layer aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: March 27, 2007
    Assignee: Motorola, Inc.
    Inventors: John M. Waldvogel, Herman J. Miller
  • Patent number: 7196294
    Abstract: A solder-joint detection circuit uses a resistive bridge and a differential detector to detect faults in the solder-joint network both inside and outside the digital electronic package during operation. The resistive bridge is preferably coupled to a high supply voltage used to power the package. Resistors R1 and R2 are connected in series at a first junction between the high and low supply voltages and a resistor R3 is coupled to the high supply voltage and connected in series with the resistance of the solder-network at a second junction. The network is held at a low voltage on the die. The detector compares the sensitivity and detection voltages and outputs a Pass/Fail signal for the solder-joint network.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: March 27, 2007
    Assignee: Ridgetop Group, Inc.
    Inventors: James P. Hofmeister, Philipp S. Spuhler, Bert M. Vermeire
  • Patent number: 7161122
    Abstract: An embodiment of the present invention is a technique to package a device. Heat is localized on a die having bumps on a package substrate using a first induction heater operating at a first frequency. Heat is localized on at least an integrated heat spreader (IHS), a thermal interface material (TIM), an underfill, and a sealant on the die using a second induction heater operating at a second frequency.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: January 9, 2007
    Assignee: Intel Corporation
    Inventor: Thomas Joseph DeBonis
  • Patent number: 7138328
    Abstract: A packaged IC including insulated wire for electrically connecting conductive structures of the packaged IC. In some embodiments, the packaged IC includes an IC die attached to a package substrate, where bond pads of the IC die are electrically connected to bond fingers of the substrate with insulated wire. The insulated wire has a conductive core and an insulator coating. In some examples, the insulator coating includes an inorganic covalently-bonded substance that is not an oxide of the electrically conductive core such as, e.g., silicon nitride or silicon oxide. In one example, the insulator coating is applied to a conductive core by a chemical vapor deposition (CVD) process such as a plasma enhanced chemical vapor deposition (PECVD).
    Type: Grant
    Filed: May 18, 2004
    Date of Patent: November 21, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Susan H. Downey, Peter R. Harper
  • Patent number: 7135770
    Abstract: A columnar bump formed of copper etc. is formed on a wiring film of a semiconductor chip through an interconnected film and an adhesive film in a wafer unit by electrolytic plating in which package formation is possible. An oxidation prevention film is formed of such as gold on an upper surface or a part of the upper surface and side surface. A wet prevention film of such as an oxide film is formed on the columnar bump side as needed. If this bump is soldered to the pad on a packaging substrate, solder gets wet in the whole region of the columnar bump upper surface and only a part of the side surface. Stabilized and reliable junction form can be thus formed. Moreover, since the columnar bump does not fuse, the distance between a semiconductor board and a packaging board is not be narrowed by solder.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: November 14, 2006
    Assignee: NEC Corporation
    Inventors: Tomohiro Nishiyama, Masamoto Tago
  • Patent number: 7086147
    Abstract: Solder balls such as, low melt C4 solder balls, undergo volume expansion during reflow, such as may occur during attachment of chip modules to a PCB. Where the solder balls are encapsulated, expansion pressure can cause damage to device integrity. A volume expansion region in the semiconductor chip substrate beneath each of the solder balls accommodated this volume expansion. Air-cushioned diaphgrams, deformable materials and non-wettable surfaces may be used to permit return of the solder during cooling to its original site. A porous medium with voids sufficient to accommodate expansion may also be used.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: August 8, 2006
    Assignee: International Business Machines Corporation
    Inventors: David Vincent Caletka, Krishna Darbha, Donald W. Henderson, Lawrence P. Lehman, George Henry Thiel
  • Patent number: 7078109
    Abstract: The thermal interface structure of the present invention is suited for use in a non-referenced die system between a heat source and heat sink spaced up to 300 mils apart and comprises a plurality of layers including a core body of high conductivity metal or metal alloy having opposite sides, a soft thermal interface layer disposed on one side of the core body for mounting against the heat sink and a thin layer of a phase change material disposed on the opposite side of the core body for mounting against the heat source wherein the surface area dimension (footprint) of the core body is substantially larger than the surface area of the heat source upon which the phase change material is mounted to minimize the thermal resistance between the heat source and the heat sink and wherein said soft thermal interface layer is of a thickness sufficient to accommodate a variable spacing between the heat source and the heat sink of up to 300 mils.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: July 18, 2006
    Assignee: Thermagon Inc.
    Inventors: Richard Hill, Jason Strader, James Latham
  • Patent number: 7070084
    Abstract: An electrical circuit apparatus (300) that includes: a substrate (330) having a ground layer (336), at least one thermal aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate such that at least a portion of the at least one substrate thermal aperture overlaps the heat sink, the adhesive layer having at least one thermal aperture (322) and at least one solder aperture (324), wherein aligning the at least one substrate solder aperture with the at least one adhesive layer solder aperture and aligning the at least one substrate thermal aperture with the at least one adhesive layer thermal aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: July 4, 2006
    Assignee: Motorola, Inc.
    Inventors: John M. Waldvogel, Brian R. Bielick, Herman J. Miller, Billy J. Van Cannon
  • Patent number: 7063249
    Abstract: An electrical circuit apparatus (300) that includes: a substrate (330) having a ground layer (336), at least one device aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate such that at least a portion of the substrate device aperture overlaps the heat sink, the adhesive layer having at least one device aperture and at least one solder aperture, wherein aligning the at least one substrate solder aperture with the at least one adhesive layer solder aperture and aligning the at least one substrate device aperture with the at least one adhesive layer device aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: June 20, 2006
    Assignee: Motorola, Inc.
    Inventors: John M. Waldvogel, Brian R. Bielick, Herman J. Miller, Billy J. Van Cannon
  • Patent number: 7007378
    Abstract: A process for manufacturing a land grid array connector for a printed wiring board is disclosed. The process does not require electroplating precious metal overlays. Therefore, no commoning bar is required. Another benefit of the invention includes a connector design using only a flash, soft gold application in the outer surface of the connector. Physical hardness and durability are derived from a thin palladium layer lying beneath the flash gold layer.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: March 7, 2006
    Assignee: International Business Machines Corporation
    Inventors: John G. Gaudiello, James D. Herard, John J. Konrad, Jeffrey McKeveny, Timothy L. Wells
  • Patent number: 7005584
    Abstract: One embodiment of the invention provides a compact navigation device assembly that is rugged, compact and does not require independent connector components to interconnect multiple circuit boards. According to one implementation of the compact navigation device assembly, an electrical or electromechanical circuit may be laid-out among a plurality of circuit boards that are electrically joined along their edges in a three-dimensional structure without the use of discrete connectors or components. Each circuit board may have one or more crenelated, serrated, and/or notched edge to electrically join the circuit board to other circuit boards. Such crenelated edges may be plated for electrical conductivity and may be joined to corresponding crenelated edges with solder or other electrically conductive materials.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: February 28, 2006
    Assignee: Honeywell International Inc.
    Inventors: Robert W. Levi, Ron Fang
  • Patent number: 6997370
    Abstract: A method for assembling an optical disk apparatus involves disposing first and second short-cutting terminals at different faces of a housing and in parallel with a laser diode of the apparatus. In a first state of assembling, the first short-cutting terminal is shorted by a solder applied thereon. Thereafter, the apparatus is inspected in a second state of assembling in which the solder is removed from the first short-cutting terminal. After inspection, the second short-cutting terminal is shorted by a solder applied thereon. Subsequently, the solder on the second short-cutting terminal is removed.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: February 14, 2006
    Assignee: Funai Electric Co., Ltd.
    Inventor: Suehiro Harada
  • Patent number: 6929170
    Abstract: A solder deposition method according to the present invention comprises the steps of: (1) providing a solder slab; (2) providing a complementary means having a plurality of through holes; (3) providing a circuit element, which is composed of an insulating body and a plurality of embedded conducting terminals; (4) placing the circuit element under the complementary means and the solder slab above the complementary means, and injecting a plurality of solder bits taken from the solder slab by a punching device through the complementary means into the solder-retaining units of the conducting terminals. This method is advantageous in the simplicity of soldering instrumentation and process, which significantly reduces production costs.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: August 16, 2005
    Inventor: Ted Ju
  • Patent number: 6898849
    Abstract: A method for forming a substantially spherical free air ball on a fine non-oxidizable wire in a computerized bonder, which has a computerized flame-off (EFO) apparatus operable to generate pulses of different heights and widths. A train of EFO current pulses is applied between electrode and wire; examples are shown in FIGS. 8 and 9. The pulse heights are controlled to melt a predetermined volume of wire while minimizing the heat-affected zone of the wire as well as the wire necking, thus creating free air balls of small diameters and high ball/wire strength. The pulse widths are controlled to create a substantially spherical ball shape. The pulse train of various heights and widths is minimized in order to minimize the time needed for one bond and to maximize the number of bonds provided per second.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: May 31, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Luis Trejo
  • Patent number: 6878396
    Abstract: A semiconductor die having multiple solder bumps, each having a diameter less than about 100 microns, and the method for making such a die are described. The solder bumps are preferably about 10 microns in diameter, and the pitch between the solder bumps is less than 100 microns, and preferably less than or equal to 10 microns. A thermal solder jet apparatus is utilized to deposit solder material to form the solder bumps. The apparatus includes a print head having a plurality of solder ejection ports. Each ejection port has an associated gas ejection conduit connected to a chamber containing one or more hydride films. The hydride film is heated to disassociate hydrogen gas. The hydrogen gas rapidly builds up in the conduit which leads to the ejection port which is loaded with a solder material and forces the ejection of the solder material from the port.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: April 12, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Paul A. Farrar, Jerome Eldridge
  • Patent number: 6864165
    Abstract: A method is described for forming an integrated structure, including a semiconductor device and connectors for connecting to a motherboard. A first layer is formed on a plate transparent to ablating radiation, and a second layer on the semiconductor device. The first layer has a first set of conductors connecting to bonding pads, which are spaced with a first spacing distance in accordance with a required spacing of connections to the motherboard. The second layer has a second set of conductors connecting to the semiconductor device. The first layer and second layer are connected using a stud/via connectors having spacing less than that of the bonding pads. The semiconductor device is thus attached to the first layer, and the first set and second set of conductors are connected through the studs. The interface between the first layer and the plate is ablated by ablating radiation transmitted through the plate, thereby detaching the plate. The connector structures are then attached to the bonding pads.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: March 8, 2005
    Assignee: International Business Machines Corporation
    Inventors: H. Bernhard Pogge, Chandrika Prasad, Roy Yu
  • Publication number: 20040256367
    Abstract: An apparatus and method are provided for using laser energy in an automated bonding machine to effect laser welding of ribbons and other connectors, particularly conductive ribbons in microelectronic circuits. The apparatus and method allow bonding and connection of microelectronic circuits with discrete heating avoiding heat damage to peripheral microelectronic components. The apparatus and method also allow bonding of flexible materials and low-resistance materials, and are less dependant on substrate and terminal stability in comparison to existing bonding methods. The bonding method leads to decreased apparatus wear in comparison to existing bonding methods.
    Type: Application
    Filed: April 2, 2004
    Publication date: December 23, 2004
    Applicant: Medtronic, Inc.
    Inventor: David A. Ruben
  • Patent number: 6833526
    Abstract: A method to solder flex circuits by diode laser. First and second flex circuits composed of polymer flex substrate are provided. Each flex circuit has a top and a bottom side and at least one contact trace embedded in its surface. An area of solder is provided on the contact trace of at least one of the flex circuits and the flex circuits are positioned so that the contact traces of each flex circuit are substantially aligned. A laser beam is positioned to heat the contact trace to melt the solder and fuse the contacts.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: December 21, 2004
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Peter J. Sinkunas, Zhong-You Shi, Lawrence L. Bullock
  • Patent number: 6817092
    Abstract: A method allowing for the inexpensive automated construction of interconnections between circuit boards is provided. According to the present invention, printed circuit pins are inserted in a circuit board from the top (component side). Provided the heads of the pins are thin enough to lie beneath a solder stencil, the pins may be pre-installed on the circuit board and solder applied to the pins at the same time solder is applied to other regions of the board. Thus, known surface mount techniques may be employed to form solder connections between the pins and conductive traces on the circuit board, which facilitates the automation of the previously manual operation of soldering the printed circuit pins separately.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: November 16, 2004
    Assignee: Powerwave Technologies, Inc.
    Inventors: James Keith Custer, James Hiram Roberson, William Kerr Veitschegger
  • Patent number: 6807730
    Abstract: A pad structure for a semiconductor package is provided by forming solder lands at predetermined locations on a printed circuit board. First circular pad portions are formed protruding laterally from upper surfaces of the solder lands. Second circular pad portions are formed protruding laterally from other lateral sides of the pads. The leads are secured to the pads of the semiconductor package so that, when the first and second circular pad portions are pushed laterally, the circular pad portions do not contact each other, thereby preventing short circuits.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: October 26, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-Dong Hwang Bo
  • Publication number: 20040188498
    Abstract: A method of soldering comprises disposing first and second balls of solder adjacent one another on a wire; disposing flux on the wire between and in contact with both of the first and second balls and so as to substantially fill a space between the first and second balls; disposing the wire on a substrate so that the first and second balls of solder contact a single conductor on the substrate; and melting the first and second balls of solder and flux and soldering the wire to the conductor.
    Type: Application
    Filed: April 6, 2004
    Publication date: September 30, 2004
    Applicant: PHILIPS CORPORATION
    Inventors: Eddy W. Vanhoutte, Gilbert De Clercq
  • Patent number: 6796018
    Abstract: A slider/suspension design and assembly method include securing a slider to a suspension assembly for use in a magnetic disk drive data recording device. To this end, a solder fillet bond is applied at the leading edge surface of the slider to provide a structural connection of the slider to the flexure, while also enabling the slider-suspension assembly to be separated without damage during the process. The slider/suspension assembly is initiated by forming a plurality of sliders on a wafer, in such a manner that the trailing edge surfaces of the sliders form the front side of the wafer, and the leading edge surfaces of the sliders form the backside of the wafer. A plurality of thin film data transducing elements and a plurality of electrical contact pads are then formed on the wafer front side.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: September 28, 2004
    Assignee: Western Digital (Fremont), Inc.
    Inventor: Brian Scott Thornton
  • Patent number: 6795746
    Abstract: The internet bonding diagram system comprises a processing unit to process the information send by a user via a network. A blank lead frame/substrate database is coupled to the processing unit to store lead frame information. A job database is coupled to the processing unit to store information forwarded by a potential client, wherein the job database includes buyer satisfaction data provided by said user. A bonding diagram generator is coupled to the processing unit to generate a layout of bonding diagram in accordance with the information provided by the user. A forwarding module is responsive to the bonding diagram generator to forward the layout of bonding diagram to the user.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: September 21, 2004
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Min Chuang, I-Liang Lin, Chun-Kuang Lin, Yung-I Yeh
  • Patent number: 6793123
    Abstract: An electrical structure or package, and associated method of formation. A plurality of logic chips is coupled electrically to a memory chip either through conductive members (e.g., solder balls) that interface with the memory chip and each logic chip, or through a sequential logic-to-memory electrically conductive path that includes: a first conductive member electrically coupled to a logic chip; an electrically conductive via path through a circuitized substrate; and a second conductive member electrically coupled to the memory chip. The logic chips are electrically coupled to the substrate either directly through an interfacing solder interconnection from the logic chip to the substrate, or indirectly through the memory chip such that the memory chip is electrically coupled to the substrate by an interfacing solder interconnect. The electrical structure may be plugged into a socket of a backplane of a circuit card.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: September 21, 2004
    Assignee: International Business Machines Corporation
    Inventors: Harm P. Hofstee, Eric A. Johnson, Randall J. Stutzman, Jamil A. Wakil
  • Patent number: 6786390
    Abstract: A LED stacking manufacturing method and its structure thereof, mainly uses a stacking method to integrate the epitaxial layer and the high-thermal-conductive substrate by twice bonding process, and the converted epitaxial layer of the temporary bonded substrate replaces the epitaxial wafer growth substrate, and the second bonded layer of the etch stop layer of the epitaxial layer is bonded with the second bonded layer of the high-thermal-conductive substrate to form an alloy layer with permanent connection, and then the temporary bonded substrate is removed, such that the process completes the integration of the epitaxial layer and the high-thermal-conductive substrate and makes the ohmic contact layer to face upward to provide a better reliability and efficiency of optical output of the LED.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: September 7, 2004
    Assignee: United Epitaxy Company Ltd.
    Inventors: Kuang-Neng Yang, Pai-Hsiang Wang, Chih-Sung Chang, Tzer-Perng Chen
  • Patent number: 6772501
    Abstract: The present invention relates to the design and manufacture of single cell units for planar, thin-film, ceramic electrochemical devices such as solid oxide fuel cells, electrochemical oxygen generators, gas separation membranes, and membrane modules and stacks and the fabrication of multi-cell stacks and modules of the single cell units. The design is based upon a single cell wherein manufacturing all layers of the device into an integral unit produces a monolithic structure. The design produces a gas-tight single cell that is easily assembled into multi-cell stacks and modules without external seals or sealing mechanisms. The design may use standard ceramic and metallurgical production techniques. The design of the present invention enhances device performance since the single cell units are inherently sealed for gas tightness and have reduced interfacial electrical resistances.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: August 10, 2004
    Assignee: ITN Energy Systems, Inc.
    Inventors: William G. Barker, Brian S. Berland, Michael Schwartz, Lin Simpson, Joseph Armstrong
  • Publication number: 20040140342
    Abstract: A system and method are disclosed for the manufacture of a hard disk drive arm and the bonding of magnetic head to suspension on the drive arm.
    Type: Application
    Filed: June 24, 2003
    Publication date: July 22, 2004
    Inventors: Ming Gao Yao, Masashi Shiraishi, Yi Ru Xie
  • Patent number: 6763994
    Abstract: A method of manufacturing a semiconductor device comprises: a first step of interposing a thermosetting anisotropic conductive material 16 between a substrate 12 and a semiconductor chip 20; a second step in which pressure and heat are applied between the semiconductor chip 20 and the substrate 12, an interconnect pattern 10 and electrodes 22 are electrically connected, and the anisotropic conductive material 16 is spreading out beyond the semiconductor chip 20 and is cured in the region of contact with the semiconductor chip 20; and a third step in which the region of the anisotropic conductive material 16 other than the region of contact with the semiconductor chip 20 is heated.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: July 20, 2004
    Inventor: Nobuaki Hashimoto
  • Patent number: 6742695
    Abstract: A soldering machine for tape carrier package. The soldering machine includes a cylinder, a linking rod, a cushioning pad, a floating connector and a press head assembly. The cylinder has a first end and a second end. The linking rod passes through the interior of the cylinder. The linking rod also has a first end and a second end. The first end of the linking rod protrudes from the first end of the cylinder while the second end of the first linking rod protrudes from the second end of the cylinder. The first end of the linking rod has a threaded section with an adjusting nut screw onto the threaded section. There is a cushioning pad between the adjusting nut and the cylinder. The second end of the linking rod has a floating connector. The press head assembly and the linking rod is connected together via the floating connector.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: June 1, 2004
    Assignee: Hannstar Display Corporation
    Inventor: Chun-Jung Chen
  • Patent number: 6727580
    Abstract: Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined in masking layers deposited on a surface of a substrate which may be an electronic component such as an active semiconductor device. Each spring contact element has a base end, a contact end, and a central body portion. The contact end is offset in the z-axis (at a different height) and in at least one of the x and y directions from the base end. In this manner, a plurality of spring contact elements are fabricated in a prescribed spatial relationship with one another on the substrate. The spring contact elements make temporary (i.e., pressure) or permanent (e.g., joined by soldering or brazing or with a conductive adhesive) connections with terminals of another electronic component to effect electrical connections therebetween.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: April 27, 2004
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Igor Y. Khandros, Gaetan L. Mathieu, David V. Pedersen