With Particular Semiconductor Material Patents (Class 257/103)
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Patent number: 11121299Abstract: A method includes depositing a photonic structure over a substrate, the photonic structure including photonic semiconductor layer, forming conductive pads over the photonic structure, forming a hard mask over the conductive pads, wherein the hard mask is patterned to cover each conductive pad with a hard mask region, etching the photonic structure using the hard mask as an etching mask to form multiple mesa structures protruding from the substrate, each mesa structure including a portion of the photonic structure, a contact pad, and a hard mask region, depositing a first photoresist over the multiple mesa structures, depositing a second photoresist over the first photoresist, patterning the second photoresist to expose the hard mask regions of the multiple mesa structures, and etching the hard mask regions to expose portions of the contact pads of the multiple mesa structures.Type: GrantFiled: September 9, 2019Date of Patent: September 14, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tian Hu, Yu-Hsiang Hu, Hung-Jui Kuo, Chen-Hua Yu
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Patent number: 11101299Abstract: It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulting film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulting film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is fanned so as to cover the opened organic resin film.Type: GrantFiled: August 21, 2018Date of Patent: August 24, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Satoshi Murakami, Masahiko Hayakawa, Kiyoshi Kato, Mitsuaki Osame
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Patent number: 11081028Abstract: A light-emitting device assembly includes a light-emitting device including a light-emitting layer, a first electrode, and a second electrode, and a first connecting portion and a second connecting portion provided on a base, in which the first connecting portion and the second connecting portion are separated from each other by a separation portion, the base is exposed from the separation portion, a wide portion is on a first connecting portion side of the separation portion, the first electrode includes a first portion and a second portion, the second portion of the first electrode is connected to the first connecting portion, the first portion of the first electrode extends from the second portion of the first electrode, and an orthographic projection image of the first portion of the first electrode with respect to the base and the wide portion of the separation portion overlap with each other at least in part.Type: GrantFiled: February 17, 2017Date of Patent: August 3, 2021Assignee: SONY CORPORATIONInventors: Akira Ohmae, Yusuke Kataoka, Tatsuo Ohashi, Sayaka Aoki, Hiroki Naito, Ippei Nishinaka, Tsuyoshi Sahoda, Toshio Fujino, Hideyuki Nishioka, Goshi Biwa
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Patent number: 11075320Abstract: A method of manufacturing a nitride semiconductor light-emitting element includes: growing an n-side superlattice layer that includes InGaN layers and GaN layers; and, after the step of growing the n-side superlattice layer, growing a light-emitting layer. The step of growing the n-side superlattice layer comprises repeating a cycle n times (n is a number of repetition), the cycle including growing one InGaN layer and growing one GaN layer. In the step of growing the n-side superlattice layer, the step of growing one GaN layer in each cycle from a first cycle to an mth cycle is performed using carrier gas that contains N2 gas and does not contain H2 gas. The step of growing one GaN layer in each cycle from a (m+1)th cycle to an nth cycle is performed using gas containing H2 gas as the carrier gas.Type: GrantFiled: February 5, 2018Date of Patent: July 27, 2021Assignee: NICHIA CORPORATIONInventor: Tomoya Yamashita
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Patent number: 11069836Abstract: Described herein are methods for growing light emitting devices under ultra-violet (UV) illumination. A method includes growing a III-nitride n-type layer over a III-nitride p-type layer under UV illumination. Another method includes growing a light emitting device structure on a growth substrate and growing a tunnel junction on the light emitting device structure, where certain layers are grown under UV illumination. Another method includes forming a III-nitride tunnel junction n-type layer over the III-nitride p-type layer to form a tunnel junction light emitting diode. A surface of the III-nitride tunnel junction n-type layer is done under illumination during an initial period and a remainder of the formation is completed absent illumination. The UV light has photon energy higher than the III-nitride p-type layer's band gap energy. The UV illumination inhibits formation of Mg—H complexes within the III-nitride p-type layer resulting from hydrogen present in a deposition chamber.Type: GrantFiled: December 17, 2019Date of Patent: July 20, 2021Assignee: LUMILEDS LLCInventors: Tsutomu Ishikawa, Isaac Wildeson, Erik Charles Nelson, Parijat Deb
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Patent number: 11069834Abstract: An optoelectronic device a substrate, a first doped contact layer arranged on the substrate, a multiple quantum well layer arranged on the first doped contact layer, a boron nitride alloy electron blocking layer arranged on the multiple quantum well layer, and a second doped contact layer arranged on the boron nitride alloy electron blocking layer.Type: GrantFiled: September 12, 2018Date of Patent: July 20, 2021Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Xiaohang Li, Wenzhe Guo, Haiding Sun
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Patent number: 11063178Abstract: A semiconductor heterostructure for an optoelectronic device with improved light emission is disclosed. The heterostructure can include a first semiconductor layer having a first index of refraction n1. A second semiconductor layer can be located over the first semiconductor layer. The second semiconductor layer can include a laminate of semiconductor sublayers having an effective index of refraction n2. A third semiconductor layer having a third index of refraction n3 can be located over the second semiconductor layer. The first index of refraction n1 is greater than the second index of refraction n2, which is greater than the third index of refraction n3.Type: GrantFiled: October 24, 2018Date of Patent: July 13, 2021Assignee: Sensor Electronic Technology, Inc.Inventors: Maxim S. Shatalov, Alexander Dobrinsky
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Patent number: 11053435Abstract: Quantum dot delivery methods are described. In a first example, a method of delivering or storing a plurality of nano-particles involves providing a plurality of nano-particles. The method also involves forming a dispersion of the plurality of nano-particles in a medium for delivery or storage, wherein the medium is free of organic solvent. In a second example, a method of delivering or storing a plurality of nano-particles involves providing a plurality of nano-particles in an organic solvent. The method also involves drying the plurality of nano-particles for delivery or storage, the drying removing entirely all of the organic solvent.Type: GrantFiled: December 21, 2018Date of Patent: July 6, 2021Assignee: OSRAM Opto Semiconductors GmbHInventors: Georgeta Masson, Kari N. Haley, Brian Theobald, Benjamin Daniel Mangum, Juanita N. Kurtin
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Patent number: 11054673Abstract: Photonic devices having Al1-xScxN and AlyGa1-yN materials, where Al is Aluminum, Sc is Scandium, Ga is Gallium, and N is Nitrogen and where 0<x?0.45 and 0?y?1.Type: GrantFiled: June 9, 2020Date of Patent: July 6, 2021Assignees: Raytheon BBN Technologies Corp., Raytheon CompanyInventors: Mohammad Soltani, Eduardo M. Chumbes
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Patent number: 11043792Abstract: Structures and methods for forming highly uniform and high-porosity gallium-nitride layers with sub-100-nm pore sizes are described. Electrochemical etching of heavily-doped gallium nitride at low bias voltages in concentrated nitric acid is used to form the porous gallium nitride. The porous layers may be used in reflective structures for integrated optical devices such as VCSELs and LEDs.Type: GrantFiled: September 30, 2015Date of Patent: June 22, 2021Assignee: Yale UniversityInventors: Jung Han, Cheng Zhang
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Patent number: 11018278Abstract: A semiconductor body is disclosed. In an embodiment a semiconductor body includes a p-doped region, an active region, an intermediate layer and a layer stack containing indium, wherein an indium concentration in the layer stack changes along a stacking direction, wherein the layer stack is formed with exactly one nitride compound semiconductor material apart from dopants, wherein the intermediate layer is nominally free of indium, arranged between the layer stack and the active region, and directly adjoins the layer stack, wherein the intermediate layer and/or the layer stack are n-doped at least in places, wherein a dopant concentration of the layer stack is at least 5*1017 1/cm3 and at most 2*1018 1/cm3, and wherein a dopant concentration of the intermediate layer is at least 2*1018 1/cm3 and at most 3*1019 1/cm3.Type: GrantFiled: February 28, 2018Date of Patent: May 25, 2021Assignee: OSRAM OLED GMBHInventors: Joachim Hertkorn, Marcus Eichfelder
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Patent number: 10991803Abstract: The present disclosure, in some embodiments relates to a semiconductor device. The semiconductor device includes a layer of semiconductor material disposed over a substrate and an electron supply layer disposed over the layer of semiconductor material between an anode terminal and a cathode terminal. A layer of III-N (III-nitride) semiconductor material is disposed over the electron supply layer. A passivation layer contacts an upper surface of the electron supply layer and further contacts an upper surface and a sidewall of the layer of III-N semiconductor material. A gate structure is separated from the layer of III-N semiconductor material by the passivation layer.Type: GrantFiled: April 23, 2018Date of Patent: April 27, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
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Patent number: 10985301Abstract: A light-emitting device includes a supportive substrate and a first light-emitting element on the supportive substrate. The first light-emitting element includes a first light-emitting stacked layer having a first surface and a second surface opposite to the first surface, and a first transparent layer on the first surface and electrically connected to the first light-emitting stacked layer. A second light-emitting element locates on the supportive substrate and a metal layer electrically connects to the first light-emitting element and the second light-emitting element and physically connects to the first transparent layer. The first light-emitting stacked layer includes a first width and the first transparent layer includes a second width different from the first width from a cross section view of the light-emitting device.Type: GrantFiled: June 6, 2018Date of Patent: April 20, 2021Assignee: EPISTAR CORPORATIONInventors: Shih-I Chen, Chia-Liang Hsu, Tzu-Chieh Hsu, Han-Min Wu, Ye-Ming Hsu, Chien-Fu Huang, Chao-Hsing Chen, Chiu-Lin Yao, Hsin-Mao Liu, Chien-Kai Chung
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Patent number: 10984979Abstract: The disclosure provides a charged particle detector including a scintillator that emits light with stable intensity and obtains high light emission intensity regardless of an energy of an incident electron. The disclosure provides the charged particle detector including: a first light-emitting part (21) in which a layer containing Ga1-x-yAlxInyN (where 0?x<1, 0?y<1) and a layer containing GaN are alternately laminated; a second light-emitting part (23) in which the layer containing Ga1-x-yAlxInyN (where 0?x<1, 0?y<1) and the layer containing GaN are alternately laminated; and a non-light-emitting part (22) that is interposed between the first light-emitting part (21) and the second light-emitting part (23) (see FIG. 2).Type: GrantFiled: January 25, 2018Date of Patent: April 20, 2021Assignee: HITACHI HIGH-TECH CORPORATIONInventors: Shin Imamura, Takashi Ohshima, Tomonobu Tsuchiya, Hajime Kawano, Shahedul Hoque, Shunsuke Mizutani, Makoto Suzuki
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Patent number: 10978610Abstract: A method of manufacturing a nitride semiconductor light-emitting element includes growing an n-side semiconductor layer, an active layer, and a p-side semiconductor layer. The step of growing the active layer includes growing a first barrier layer before growing a well layer. The step of growing the first barrier layer includes a first stage where a first nitride semiconductor layer containing In is grown with a first concentration of n-type impurity, a second stage where a second nitride semiconductor layer containing In is grown with a second concentration of n-type impurity higher than the first concentration, a third stage where a third nitride semiconductor layer containing In is grown with a third concentration of n-type impurity lower than the second concentration, and a fourth stage where a fourth nitride semiconductor layer is grown under a growth condition in which an amount of an impurity source gas is decreased or stopped.Type: GrantFiled: August 29, 2019Date of Patent: April 13, 2021Assignee: NICHIA CORPORATIONInventor: Takuya Okada
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Patent number: 10971655Abstract: One embodiment provides a semiconductor device comprising: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the first semiconductor layer; a third semiconductor layer disposed on the second semiconductor layer; and a reflective layer disposed on the third semiconductor layer, wherein the part between the first and second semiconductor layers, the part between the third and second semiconductor layers, and the second semiconductor layer comprise a depletion region, and the conductivity of the first semiconductor layer and the conductivity of the third semiconductor layer are different from each other, and the second semiconductor layer comprises an intrinsic semiconductor layer.Type: GrantFiled: April 12, 2017Date of Patent: April 6, 2021Assignee: LG INNOTEK CO., LTD.Inventor: Hyung Jo Park
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Patent number: 10964845Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: GrantFiled: September 27, 2019Date of Patent: March 30, 2021Assignee: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 10964843Abstract: An patterned Si substrate-based LED epitaxial wafer and a preparation method therefor, the LED epitaxial wafer comprising: a patterned Si substrate (1) and an Al2O3 coating (2) growing on the patterned Si substrate (1); sequentially growing on the Al2O3 coating (2) are a nucleating layer (3), a first buffer layer (4), a first insertion layer (5), a second buffer layer (6), a second insertion layer (7), an n-GaN layer (8), a quantum well layer (9), a p-GaN layer (10), an n-electrode (14) electrically connected to the n-GaN layer and a p-electrode (13) electrically connected to the p-GaN layer. The present invention is suitable for the preparation of large-sized LED epitaxial wafers. Furthermore, the crystal quality is improved, and the light extraction efficiency of the LED die is improved.Type: GrantFiled: March 28, 2017Date of Patent: March 30, 2021Assignee: ENKRIS SEMICONDUCTOR, INCInventors: Liyang Zhang, Kai Cheng
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Patent number: 10964900Abstract: A display panel and method of manufacture are described. In an embodiment, a display substrate includes a pixel area and a non-pixel area. An array of subpixels and corresponding array of bottom electrodes are in the pixel area. An array of micro LED devices are bonded to the array of bottom electrodes. One or more top electrode layers are formed in electrical contact with the array of micro LED devices. In one embodiment a redundant pair of micro LED devices are bonded to the array of bottom electrodes. In one embodiment, the array of micro LED devices are imaged to detect irregularities.Type: GrantFiled: August 1, 2019Date of Patent: March 30, 2021Assignee: Apple Inc.Inventors: Andreas Bibl, Kapil V. Sakariya, Charles R. Griggs, James Michael Perkins
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Patent number: 10957789Abstract: Systems, methods and apparatus incorporating Gallium Nitride heterostructure (Alx,Iny)Ga1-x-y N-materials in flexible, strainable and wearable radio frequency devices. These devices include (Alx,Iny)Ga1-x-y N-based high-electron mobility transistors (HEMTs), which enable amplification of microwave radio frequencies from approximately 300 MHz to approximately 300 GHz for flexible and conformal wireless transmission.Type: GrantFiled: May 14, 2020Date of Patent: March 23, 2021Assignee: United States of America as represented by the Secretary of the Air ForceInventors: Nicholas R. Glavin, Kelson D. Chabak, Michael R. Snure
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Patent number: 10930506Abstract: In one embodiment, a product includes a structure comprising a material of a Group-III-nitride having a dopant, where a concentration of the dopant in the structure has a concentration gradient characteristic of diffusion of the dopant inward from at least a portion of a surface of the structure in a direction substantially normal to the portion of the surface. The structure has less than 1% decomposition of the Group-III-nitride at the surface of the structure.Type: GrantFiled: June 19, 2019Date of Patent: February 23, 2021Assignee: Lawrence Livermore National Security, LLCInventors: Lars Voss, Daniel Max Dryden, Clint Frye, Sara Elizabeth Harrison, Rebecca J. Nikolic, Qinghui Shao
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Patent number: 10923623Abstract: A device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions is provided. The difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer.Type: GrantFiled: March 12, 2019Date of Patent: February 16, 2021Assignee: Sensor Electronic Technology, Inc.Inventors: Michael Shur, Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Jinwei Yang, Remigijus Gaska, Mikhail Gaevski
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Patent number: 10923508Abstract: The disclosure relates to an array substrate and a manufacturing method therefor, a display panel, and a display device. The array substrate comprises a base substrate, and a lead-out line and an inorganic insulating layer which are located on one side of the base substrate; the base substrate is provided with a plurality of connection vias penetrating the base substrate and filled with a first conductive material; the inorganic insulating layer is provided with a first via and a second via, the first via penetrating to the first conductive material, and the second via penetrating to the lead-out line; a second conductive layer is disposed on the side, away from the base substrate, of the first via, the second via and the inorganic insulating layer, such that the first conductive material and the lead-out line are electrically connected through the second conductive layer.Type: GrantFiled: April 30, 2019Date of Patent: February 16, 2021Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Renquan Gu, Qi Yao, Wusheng Li, Dongsheng Li, Huili Wu, Shipei Li, Dongsheng Yin, Fang He, Yang Yue
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Patent number: 10923882Abstract: A nitride semiconductor light-emitting device having high luminous efficiency is provided. A nitride semiconductor light-emitting device is provided with a nitride semiconductor substrate including a main surface having an off angle of 0.4° or larger with respect to a (0001) plane, a first semiconductor layer formed of an n-type or p-type nitride semiconductor formed on the main surface, a second semiconductor layer formed of a nitride semiconductor having In composition of 2% or higher formed on the first semiconductor layer, an active layer formed on the second semiconductor layer including a well layer formed of a nitride semiconductor having In composition higher than that of the second semiconductor layer and a barrier layer formed of a nitride semiconductor stacked therein, and a third semiconductor layer formed on the active layer having a conductivity type different from that of the first semiconductor layer.Type: GrantFiled: April 1, 2019Date of Patent: February 16, 2021Assignee: USHIO DENKI KABUSHIKI KAISHAInventors: Kohei Miyoshi, Koichi Naniwae
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Patent number: 10923628Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height, including a plurality of epitaxial layers such as a first n-layer, a first p-layer, and a first active layer. A second flat region at a second height and parallel to the first flat region includes at least a second n-layer. Sloped sidewalls connect the first flat region and the second flat region and include at least a third n-layer. The p-layer of the first flat region is thicker that at least a portion of the third region. A p-contact is formed on the first p-layer and an n-contact is formed on the second n-layer.Type: GrantFiled: September 26, 2019Date of Patent: February 16, 2021Assignee: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 10903430Abstract: The present invention relates to compounds, compositions and formulations comprising same and to opto-electronic devices comprising the compounds and compositions according to the invention.Type: GrantFiled: June 30, 2015Date of Patent: January 26, 2021Assignee: Merck Patent GmbHInventors: Anja Jatsch, Amir Hossain Parham, Thomas Eberle, Tobias Grossmann, Jonas Valentin Kroeber
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Patent number: 10892386Abstract: Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.Type: GrantFiled: September 21, 2018Date of Patent: January 12, 2021Assignee: SEOUL SEMICONDUCTOR CO., LTD.Inventors: Won Cheol Seo, Dae Sung Cho
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Patent number: 10892388Abstract: An LED structure is formed in a nanobeam on a semiconductor base and includes three nanobeam sections. A central section is the LED and it is formed by a bottom germanium doped layer, a middle germanium-tin layer and a top germanium layer that is doped oppositely from the bottom germanium layer. Left and right germanium nanobeam sections extend outwardly from the left and right ends of the central section. Metal contacts are formed on the top and bottom layers and an electrical circuit is connected to the metal contacts and provides an electrical signal that energizes the middle section and causes it to emit light, some of which is transmitted by the left and right nanobeams. Cylindrical holes are formed in the nanobeam and are sized and spaced apart to form a zero point-defect resonator. The diameters of the holes are reduced as they move further away from the central section in accordance with a Gaussian taper. The LED is configured and dimensioned to have a maximum modulation rate from about 1.Type: GrantFiled: April 16, 2019Date of Patent: January 12, 2021Assignee: United States of America as represented by the Secretary of Air ForceInventors: Joshua Hendrickson, Ricky D. Gibson, Jr.
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Patent number: 10892296Abstract: A light emitting device including first, second, and third LED sub-units, and electrode pads disposed on the first LED sub-unit, electrically connected to the LED sub-units, and including a common electrode pad electrically connected to each of the LED sub-units, and first, second, and third electrode pads connected to a respective one of the LED sub-units, in which the common electrode pad, the second electrode pad, and the third electrode pad are electrically connected to the second LED sub-unit and the third LED sub-unit through holes that pass through the first LED sub-unit, the first, second, and third LED sub-units are configured to be independently driven, light generated in the first LED sub-unit emitted to the outside through the second and third LED sub-units, and light generated in the second LED sub-unit is emitted to the outside through the third LED sub-unit.Type: GrantFiled: November 22, 2018Date of Patent: January 12, 2021Assignee: Seoul Viosys Co., Ltd.Inventors: Jong Hyeon Chae, Seong Gyu Jang, Ho Joon Lee, Chang Yeon Kim, Chung Hoon Lee
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Patent number: 10886327Abstract: A light emitting stacked structure including a plurality of epitaxial sub-units disposed one over another, each epitaxial sub-unit configured to emit colored light having different wavelength band from each other, and a common electrode disposed between and connected to adjacent epitaxial sub-units, in which light emitting regions of the epitaxial sub-units overlap each other.Type: GrantFiled: December 13, 2018Date of Patent: January 5, 2021Assignee: Seoul Viosys Co., Ltd.Inventors: Jong Hyeon Chae, Seong Gyu Jang, Ho Joon Lee
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Patent number: 10886345Abstract: An OLED display panel includes: a substrate; a pixel defining layer disposed on the substrate and defining a pixel region and a non-pixel region outside the pixel region; a spacer layer disposed in the non-pixel region; and an organic light-emitting layer including: a first portion disposed in the pixel region, and a second portion disposed in the non-pixel region. A surface of at least one of the pixel defining layer or the spacer layer has a contact portion which is in contact with the organic light-emitting layer and which is rough.Type: GrantFiled: May 29, 2019Date of Patent: January 5, 2021Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Tao Sun, Lujiang Huangfu, Song Zhang, Ziyu Zhang
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Patent number: 10886429Abstract: The invention relates to a method of manufacturing an optoelectronic device (1) produced on the basis of GaN, comprising an emission structure (10) configured to emit a first light radiation at the first wavelength (?1), the method comprising the following steps: i. producing a growth structure (20) comprising a nucleation layer (23) of Inx2Ga1-x2N at least partially relaxed; ii. producing a conversion structure (30), comprising an emission layer (33) configured to emit light at a second wavelength (?2), and an absorption layer (34) produced on the basis of InGaN; iii. transfer of the conversion structure (30) onto the emission structure (10) in such a way that the absorption layer (34) is located between the emission structure (10) and the emission layer (33) of the conversion structure.Type: GrantFiled: December 18, 2018Date of Patent: January 5, 2021Assignees: Commissariat a l'energie atomique et aux energies alternatives, THALESInventors: Amelie Dussaigne, Ivan-Christophe Robin
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Patent number: 10886438Abstract: A manufacturing method of a light-emitting device, comprising providing a growth substrate; forming a light-emitting stack on the growth substrate, the light-emitting stack comprising a first surface, a second surface opposite to the first surface, and a sidewall connecting the first surface and the second surface; forming a patterned dielectric layer on the first surface, the patterned dielectric layer comprising a first portion and a second portion separated from the first portion; attaching a permanent substrate to the light-emitting stack; removing the growth substrate after the permanent substrate is attached to the light-emitting stack; forming a plurality of trenches in the light-emitting stack to form a plurality of light-emitting units, wherein the plurality of light-emitting units are insulated from each other; and cutting along the plurality of trenches, wherein an outer part of the second portion of the patterned dielectric layer is thinned.Type: GrantFiled: January 3, 2019Date of Patent: January 5, 2021Assignee: EPISTAR CORPORATIONInventors: Jan Way Chien, Tzchiang Yu, Hsiao Yu Lin, Chyi Yang Sheu
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Patent number: 10868135Abstract: A high electron mobility transistor (HEMT) includes a silicon substrate, an unintentionally doped gallium nitride (UID GaN) layer over the silicon substrate. The HEMT further includes a donor-supply layer over the UID GaN layer, a gate structure, a drain, and a source over the donor-supply layer. The HEMT further includes a dielectric layer having one or more dielectric plug portions in the donor-supply layer and top portions between the gate structure and the drain over the donor-supply layer. A method for making the HEMT is also provided.Type: GrantFiled: December 13, 2018Date of Patent: December 15, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Ju Yu, Chih-Wen Hsiung, Fu-Wei Yao, Chun-Wei Hsu, King-Yuen Wong, Jiun-Lei Jerry Yu, Fu-Chih Yang
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Patent number: 10862013Abstract: A high-brightness vertical light emitting diode (LED) device includes an outwardly located metal electrode having a low illumination side and a high illumination side. The LED device is formed by: forming the metal electrode on an edge of a surface of a LED epitaxy structure using a deposition method, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), evaporation, electro-plating, or any combination thereof; and then performing a packaging process. The composition of the LED may be a nitride, a phosphide or an arsenide. The LED has the following advantages: improving current spreading performance, reducing light-absorption of the metal electrode, increasing brightness, increasing efficiency, and thereby improving energy efficiency. The metal electrode is located on the edge of the device and on the light emitting side. The metal electrode has two side walls, among which one side wall can receive more emission light from the device in comparison with the other one.Type: GrantFiled: April 24, 2013Date of Patent: December 8, 2020Assignee: SemiLEDs Optoelectronics Co., Co., Ltd.Inventors: Wen-Huang Liu, Li-Wei Shan, Chen-Fu Chu
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Patent number: 10862044Abstract: The present disclosure relates to an organic compound, a light emitting diode and an organic light emitting diode display device using the same. The organic compound is represented by a following chemical formula 1. This organic compound has the advantages in the thermal stability, the emission property, the color purity, the hole transport property and the hole movement property, and thus the lifetime, the emission efficiency and the emission property of the LED using the same are improved.Type: GrantFiled: May 26, 2017Date of Patent: December 8, 2020Assignee: LG DISPLAY CO., LTD.Inventors: Ki-Dong Koo, Jung-Keun Kim, Do-Han Kim, Jeong-Dae Seo, Seon-Keun Yoo, Seung-Hee Yoon, Ji-Cheol Shin
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Patent number: 10861834Abstract: A method for manufacturing a micro-LED display screen includes: forming an N-type GaN layer, a quantum-well light-emitting layer, and a P-type GaN layer on a sapphire substrate sequentially; etching the P-type GaN layer, the quantum-well light-emitting layer, and the N-type GaN layer from top to bottom, to form a first trench; forming an ITO layer on the surface of the P-type GaN layer, and etching the ITO layer to form a second trench; generating an N-type contact electrode in the first trench; generating a reflective electrode having a longitudinal cross-section in a shape with a wide upper side and a narrow lower side, respectively, on an upper surface of the N-type contact electrode and in the second trench; depositing an insulating layer on a surface of the micro-LED chip, and etching the insulating layer to expose the reflective electrodes; and soldering a driving circuit substrate to the reflective electrode.Type: GrantFiled: May 16, 2019Date of Patent: December 8, 2020Inventors: Dong Wei, Rubo Xing, Huimin Liu, Xiaolong Yang, Jiantai Wang
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Patent number: 10854796Abstract: A light system includes a first substrate and a second substrate having the first substrate thereon. A light emitting diode (LED) is connected to the first substrate. An encapsulation layer covers the LED and at least a majority of the first substrate.Type: GrantFiled: July 7, 2017Date of Patent: December 1, 2020Inventors: Adikaramge Asiri Jayawardena, Andrew Francis Scarlata
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Patent number: 10854670Abstract: A light emitting device including first, second, and third LED sub-units, and electrode pads disposed on the first LED sub-unit, electrically connected to the LED sub-units, and including a common electrode pad electrically connected to each of the LED sub-units, and first, second, and third electrode pads connected to a respective one of the LED sub-units, in which the common electrode pad, the second electrode pad, and the third electrode pad are electrically connected to the second LED sub-unit and the third LED sub-unit through holes that pass through the first LED sub-unit, the first, second, and third LED sub-units are configured to be independently driven, light generated in the first LED sub-unit emitted to the outside through the second and third LED sub-units, and light generated in the second LED sub-unit is emitted to the outside through the third LED sub-unit.Type: GrantFiled: November 22, 2018Date of Patent: December 1, 2020Assignee: Seoul Viosys Co., Ltd.Inventors: Jong Hyeon Chae, Seong Gyu Jang, Ho Joon Lee, Chang Yeon Kim, Chung Hoon Lee
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Patent number: 10854795Abstract: A Light Emitting Device (LED) that has increased reliability and efficiency. Specifically, the LED may be formed using Atomic Layer Deposition to improve the thermal conductivity between the ceramic plate and the LED, decrease the amount of organic contamination, and increase the efficiency of the optical output of the LED.Type: GrantFiled: September 9, 2019Date of Patent: December 1, 2020Assignee: Lumileds LLCInventors: Ken T. Shimizu, Hisashi Masui, Daniel B. Roitman
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Patent number: 10847692Abstract: A foil structure with generation of visible light via LED technology has a carrier foil and an LED chip for generation of UV light. The LED chip is disposed on a first portion of the carrier foil and is provided with a light output face for emission of the UV light. The foil structure further has a color reaction layer for conversion of the UV light into the visible light, wherein the color reaction layer is disposed on a second portion of the carrier foil. The carrier foil is folded over in such a way that the second portion of the carrier foil is disposed above the first portion of the carrier foil and the color reaction layer is disposed above the LED chip or in a manner laterally offset relative to the LED chip.Type: GrantFiled: June 18, 2018Date of Patent: November 24, 2020Assignee: Schreiner Group GmbH & Co. KGInventors: Johannes Becker, Sebastian Gepp, Manfred Hartmann, Hartmut Wiederrecht
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Patent number: 10844470Abstract: The present invention provides an epitaxial film forming method for epitaxially growing a high-quality group III nitride semiconductor thin film on an ?-Al2O3 substrate by a sputtering method. In the epitaxial film forming method according to an embodiment of the present invention, when an epitaxial film of a group III nitride semiconductor thin film is to be formed on the ?-Al2O3 substrate arranged on a substrate holder provided with a heater electrode and a bias electrode of a sputtering apparatus, in a state where the ?-Al2O3 substrate is maintained at a predetermined temperature by the heater electrode, high-frequency power is applied to a target electrode and high-frequency bias power is applied to a bias electrode and at that time, the powers are applied so that frequency interference between the high-frequency power and the high-frequency bias power does not occur.Type: GrantFiled: July 10, 2017Date of Patent: November 24, 2020Assignee: CANON ANELVA CORPORATIONInventors: Yoshiaki Daigo, Keiji Ishibashi
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Patent number: 10833223Abstract: To provide a Group III nitride semiconductor light-emitting device exhibiting the improved light extraction efficiency as well as reducing the influence of polarization that a p-type conductivity portion and an n-type conductivity portion occur in the AlGaN layer caused by the Al composition variation, and a production method therefor. A first p-type contact layer is a p-type AlGaN layer. A second p-type contact layer is a p-type AlGaN layer. The Al composition in the first p-type contact layer is reduced with distance from a light-emitting layer. The Al composition in the second p-type contact layer is reduced with distance from the light-emitting layer. The Al composition in the second p-type contact layer is lower than that in the first p-type contact layer. The Al composition variation rate to the unit thickness in the second p-type contact layer is higher than that in the first p-type contact layer.Type: GrantFiled: November 8, 2018Date of Patent: November 10, 2020Assignees: TOYODA GOSEI CO., LTD., MEIJO UNIVERSITYInventors: Tetsuya Takeuchi, Satoshi Kamiyama, Motoaki Iwaya, Isamu Akasaki, Hisanori Kojima, Toshiki Yasuda, Kazuyoshi Iida
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Patent number: 10825954Abstract: A light-emitting device may include a semiconductor body having a first conductivity type, with a front side and a back side. The light-emitting device may also include a porous-silicon region which extends in the semiconductor body at the front side, and a cathode region in direct lateral contact with the porous-silicon region. The light-emitting device may further include a barrier region of electrically insulating material, which extends in direct contact with the cathode region at the bottom side of the cathode region so that, in use, an electric current flows in the semiconductor body through lateral portions of the cathode region.Type: GrantFiled: May 18, 2018Date of Patent: November 3, 2020Assignee: STMICROELECTRONICS S.R.L.Inventors: Marco Morelli, Fabrizio Fausto Renzo Toia, Giuseppe Barillaro, Marco Sambi
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Patent number: 10816723Abstract: An optical coherent transceiver comprising a polarization and phase-diversity coherent receiver and a polarization and phase-diversity modulator on the same substrate interfaced by three grating couplers, on grating coupler coupling in a signal, one grating coupler coupling in a laser signal, and a third grating coupler coupling out a modulated signal.Type: GrantFiled: July 18, 2016Date of Patent: October 27, 2020Assignee: Acacia Communications, Inc.Inventors: Christopher Doerr, Benny Mikkelsen, Eric Swanson
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Patent number: 10811257Abstract: A method may include depositing a carbon layer on a substrate using physical vapor deposition, wherein the carbon layer exhibits compressive stress, and is characterized by a first stress value; and directing a dose of low-mass species into the carbon layer, wherein, after the directing, the carbon layer exhibits a second stress value, less compressive than the first stress value.Type: GrantFiled: June 4, 2018Date of Patent: October 20, 2020Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Rajesh Prasad, Tzu-Yu Liu, Kyu-Ha Shim, Tom Ho Wing Yu, Zhong Qiang Hua, Adolph Miller Allen, Viabhav Soni, Ravi Rajagopalan, Nobuyuki Sasaki
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Patent number: 10811460Abstract: A uLED and method for regrowth with thinner deposition on sidewall are disclosed. The uLED and method include a growth substrate including flat first and second regions, where the growth substrate is thicker in the first region as compared to the second region, and a third region of sloped sidewalls connecting the first and second regions, the topography forming a regular geometric pattern, a plurality of semiconductor epitaxial layers covering the first, second, and third regions including at least a p-n junction layer including a light emitting active region of direct bandgap semiconductor, sandwiched between n-type and p-type layers, each of the plurality of semiconductor epitaxial layers being thicker on the first and second regions as compared to the corresponding semiconductor epitaxial layers on the third region, and a plurality of electrical contacts forming an anode and cathode on part of the first and second regions, respectively.Type: GrantFiled: September 27, 2018Date of Patent: October 20, 2020Assignee: Lumileds Holding B.V.Inventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 10804102Abstract: The present disclosure provides a method for manufacturing a flexible device having a pattern of a two-dimensional material formed thereon includes: a step of forming a two-dimensional material layer on a substrate; a step of forming a pattern of the two-dimensional material; a step of coating a flexible substrate solution on the patterned two-dimensional material layer and curing the same; and a step of removing the substrate.Type: GrantFiled: February 13, 2019Date of Patent: October 13, 2020Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Ho Won Jang, Yeonhoo Kim, Byung Hee Hong
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Patent number: 10804423Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The p-type contact layer and electron blocking layer can be doped with a p-type dopant. The dopant concentration for the electron blocking layer can be at most ten percent the dopant concentration of the p-type contact layer. A method of designing such a heterostructure is also described.Type: GrantFiled: April 30, 2018Date of Patent: October 13, 2020Assignee: Sensor Electronic Technology, Inc.Inventors: Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur
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Patent number: 10787584Abstract: Provided are a printing ink comprising inorganic nano-materials and an electronic device manufactured by printing with the printing ink, in particular, an electroluminescent device. The composition of the provided ink comprises at least one inorganic nano-material, in particular, quantum dots, and at least one ester-based organic solvent.Type: GrantFiled: July 5, 2016Date of Patent: September 29, 2020Assignee: GUANGZHOU CHINARAY OPTOELECTRONIC MATERIALS LTD.Inventors: Junyou Pan, Xi Yang