With Separate Light Detector Integrated On Chip With Regenerative Switching Device Patents (Class 257/114)
  • Patent number: 10475992
    Abstract: A miniature oxygen sensor makes use of paramagnetic properties of oxygen gas to provide a fast response time, low power consumption, improved accuracy and sensitivity, and superior durability. The miniature oxygen sensor disclosed maintains a sample of ambient air within a micro-channel formed in a semiconductor substrate. O2 molecules segregate in response to an applied magnetic field, thereby establishing a measureable Hall voltage. Oxygen present in the sample of ambient air can be deduced from a change in Hall voltage with variation in the applied magnetic field. The magnetic field can be applied either by an external magnet or by a thin film magnet integrated into a gas sensing cavity within the micro-channel. A differential sensor further includes a reference element containing an unmagnetized control sample. The miniature oxygen sensor is suitable for use as a real-time air quality monitor in consumer products such as smart phones.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: November 12, 2019
    Assignee: STMicroelectronics Pte Ltd
    Inventors: Olivier Le Neel, Ravi Shankar
  • Patent number: 9978728
    Abstract: A display apparatus and a fabricating method thereof are provided. The display apparatus includes a substrate, a light emitting diode, a first bump, a first insulating layer and a second insulating layer. The light emitting diode has a first surface and a second surface opposite each other, wherein the first surface faces the substrate. The light emitting diode is bonded to the substrate through the first bump. The first insulating layer is disposed on a periphery of the first bump and the light emitting diode, and contacts the first bump and the first surface. The second insulating layer is disposed on the substrate and surrounds at least a portion of the first insulating layer.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: May 22, 2018
    Assignees: Innolux Corporation, Advanced Optoelectronics Technology Inc.
    Inventors: Chun-Hsien Lin, Tsau-Hua Hsieh, Po-Min Tu, Tzu-Chien Hung, Chien-Chung Peng, Shih-Cheng Huang
  • Patent number: 9263432
    Abstract: A high voltage semiconductor device is provided, comprising a high voltage metal-oxide-semiconductor transistor (HVMOS), and a normally-on low voltage metal-oxide-semiconductor transistor (LVMOS) electrically connected to the HVMOS. The HVMOS has a first collector and a first emitter, and the LVMOS has a second collector and a second emitter, wherein the second collector of the LVMOS is electrically connected to the first emitter of the HVMOS. The LVMOS electrically connected to the HVMOS provides an electro-static discharge bipolar transistor (ESD BJT), such as a NPN-type ESD BJT.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: February 16, 2016
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsin-Liang Chen, Wing-Chor Chan, Shyi-Yuan Wu
  • Patent number: 8968704
    Abstract: Provided is a fluorescent labeling material, including zinc oxide nanoparticles each surface-modified with an organic compound having an amino group placed at an outer end thereof. Also provided is a fluorescent labeling agent to be used in vivo or in vitro, including the fluorescent labeling material, in which: EDC or the like is bound thereto through the amino group; and a substance capable of selectively binding to a target to be fluorescently labeled, such as an antibody, is linked thereto.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: March 3, 2015
    Assignee: National University Corporation Shimane University
    Inventors: Moriyuki Sato, Morihiko Nakamura
  • Patent number: 8836096
    Abstract: An image sensor unit includes a fixed substrate, a movable substrate, an actuate section including an actuator for moving the movable substrate against the fixed substrate, an image sensor having an imaging surface on a front surface of the image sensor, and at least, a part of a rear surface of the image sensor being directly fixed onto the movable substrate, an external electrical connecting member for conducting a transmission and reception of signals between the actuate section and the image sensor and an outside of the image sensor unit, and an internal electrical connecting member electrically connects the actuate section, the image sensor and the external connection wiring, wherein the actuate section, the image sensor, the internal connection wiring and a part of the external connection wiring are sealed into the same space.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: September 16, 2014
    Assignee: Konica Minolta Opto, Inc.
    Inventors: Akira Kosaka, Masataka Hamada, Satoshi Yokota, Yoshihiro Hara, Yasutaka Tanimura
  • Patent number: 8580915
    Abstract: A micro electromechanical system having incorporated therein a composition of matter consisting of a stable solution containing a polymer derived from a solution of a polymer containing trace metals, the derived method comprising the steps of: (a) providing a polymer solution containing a polymer, a first solvent and trace metals; (b) passing said polymer solution through an acidic cation ion exchange material to remove said trace metals therefrom and thereby forming a polymer solution containing free acid radicals; (c) precipitating said polymer from said polymer solution of step b by contacting with a second solvent wherein the polymer is substantially insoluble therein; (d) filtering said solution and said second solvent to thereby form a solid polymer cake; (e) contacting said cake from step d with sufficient quantities of additional said second solvent in order to remove free acid radicals therefrom; (f) removing any residual first and second solvents from said polymer to form said stable polymer.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: November 12, 2013
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: William Richard Russell, John Anthony Schultz
  • Patent number: 8536617
    Abstract: A thyristor device includes a semiconductor body and a conductive anode. The semiconductor body has a plurality of doped layers forming a plurality of dopant junctions and includes an optical thyristor, a first amplifying thyristor, and a switching thyristor. The conductive anode is disposed on a first side of the semiconductor body. The optical thyristor is configured to receive incident radiation to generate a first electric current, and the first amplifying thyristor is configured to increase the first electric current from the optical thyristor to at least a threshold current. The switching thyristor switches to the conducting state in order to conduct a second electric current from the anode and through the semiconductor body.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: September 17, 2013
    Assignee: General Electric Company
    Inventors: Alexey Vert, Ahmed Elasser, Arthur Stephen Daley, Stanislav I Soloviev, Peter Almern Losee
  • Patent number: 8330146
    Abstract: An organic photodetector including a substrate, a first electrode, an insulation layer, an organic layer, and a second electrode is provided. The first electrode is disposed on the substrate. The insulation layer is disposed on the first electrode. The organic layer is disposed on the substrate and the insulation layer and covers a side surface of the insulation layer and a side surface of the first electrode. The second electrode is disposed on the organic layer and located above the insulation layer.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: December 11, 2012
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Tzu-Yueh Chang, Po-Tsung Lee, Szu-Yuan Chen
  • Patent number: 8283679
    Abstract: The present invention provides a semiconductor device having an integrated circuit formed by a low cost glass substrate, which can respond to the increase of an amount of information, and which offers high performance at high speed.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: October 9, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Ryoji Nomura, Hiroko Abe, Mikio Yukawa, Yasuyuki Arai
  • Patent number: 8188604
    Abstract: A semiconductor device capable of preventing a crack from occurring in an electrode layer exposed through a through hole which is formed in a semiconductor substrate and a method of manufacturing the semiconductor device. In exemplary embodiments, a through via and an opening in a passivation film are disposed so that an opening diameter of the through via is larger than an opening diameter of the opening of the passivation film, and an opening edge of the through via is located outside an opening edge of the opening of the passivation film. In other embodiments, the through via and the opening of the passivation film are disposed so that the opening edge of the through via is disposed at a location which does not overlap with the opening edge (opening edge of a portion in contact with a pad electrode) of the opening of the passivation film.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: May 29, 2012
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Shigeru Yamada
  • Patent number: 8145020
    Abstract: A semiconductor device includes a direct light-triggered thyristor triggered by an optical gate signal, a first optical fiber connected to the direct light-triggered thyristor and through which the optical gate signal is transmitted, a second optical fiber used to extend the first optical fiber, and a inter-optical-fiber relaying unit configured to connect the first optical fiber to the second optical fiber and to input the optical gate signal output from the second optical fiber to the first optical fiber.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: March 27, 2012
    Assignee: Toshiba Mitsubishi—Electric Industrial Systems Corporation
    Inventor: Takafumi Fujimoto
  • Patent number: 8124953
    Abstract: A sensor device and method. One embodiment provides a first semiconductor chip having a sensing region. A porous structure element is attached to the first semiconductor chip. A first region of the porous structure element faces the sensing region of the first semiconductor chip. An encapsulation material partially encapsulates the first semiconductor chip and the porous structure element.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: February 28, 2012
    Assignee: Infineon Technologies AG
    Inventors: Klaus Elian, Georg Meyer-Berg, Horst Theuss
  • Patent number: 7989968
    Abstract: A method, structure, system of aligning a substrate to a photomask. The method comprising: directing light through a clear region of the photomask in a photolithography tool, through a lens of the tool and onto a set of at least three diffraction mirror arrays on the substrate, each diffraction mirror array of the set of at least three diffraction mirror arrays comprising a single row of mirrors, all mirrors in any particular diffraction mirror array spaced apart a same distance, mirrors in different diffraction mirror arrays spaced apart different distances; measuring an intensity of light diffracted from the set of at least three diffraction mirror arrays onto an array of photo detectors; and adjusting a temperature of the photomask or photomask and lens based on the measured intensity of light.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: August 2, 2011
    Assignee: International Business Machines Corporation
    Inventors: Axel A. Granados, Benjamin A. Fox, Nathaniel J. Gibbs, Andrew B. Maki, Trevor J. Timpane
  • Patent number: 7956433
    Abstract: The invention provides an image detector capable of improving the quality of detected images by reducing electronic noise, the image detector comprising, a plurality of scan lines disposed in parallel, a plurality of data lines provided so as to cross with the scan lines, thin film transistors connected with the scan and data lines and provided in matrix, sensor sections connected to the thin film transistor and provided in a matrix and a plurality of common lines disposed so as to apply bias voltage commonly to the sensor sections provided in matrix. Each of the scan lines, data lines and common lines are formed by metal layers different from each other and provided with insulating film(s) disposed therebetween.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: June 7, 2011
    Assignee: FUJIFILM Corporation
    Inventors: Yoshihiro Okada, Takuya Yoshimi
  • Patent number: 7888761
    Abstract: An electron detector (30) for detection of electrons comprises a semiconductor wafer (11) having a central portion (12) with a thickness of at most 150 ?m, preferably at most 100 ?m, formed by etching an area of a thicker wafer. On opposite sides of the central portion (12) there are n-type and p-type contacts (16, 31). In operation, a reverse bias is applied across the contacts (16, 31) and electrons incident on the layer (15) of intrinsic semiconductor material between the contacts (16, 31) generate electron-hole pairs which accelerate towards the contacts (16, 31) where they may detected as a signal. Conductive terminals (24, 32) contact the contacts (16, 31) and are connected to a signal processing circuit in IC chips (28, 37) mounted to the semiconductor wafer (11) outside the active area of the detector (30). The contacts (16, 31) are shaped as arrays of strips extending orthogonally on the two sides of the intrinsic layer (15) to provide two-dimensional spatial resolution.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: February 15, 2011
    Assignee: Isis Innovation Limited
    Inventors: Rudiger Reinhard Meyer, Angus Ian Kirkland
  • Patent number: 7808004
    Abstract: A light emitting diode package structure having a heat-resistant cover and a method of manufacturing the same include a base, a light emitting diode chip, a plastic shell, and a packaging material. The plastic shell is in the shape of a bowl and has an injection hole thereon. After the light emitting diode chip is installed onto the base, the plastic shell is covered onto the base to fully and air-tightly seal the light emitting diode chip, and the packaging material is injected into the plastic shell through the injection hole until the plastic shell is filled up with the packaging material to form a packaging cover, and finally the plastic shell is removed to complete the LED package structure.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: October 5, 2010
    Assignee: Edison Opto Corporation
    Inventors: Tsung-Ting Sun, Hung-Ta Laio, Hung-Hsun Chou, Tz-Shiuan Yan, Kuo-Shih Hsu
  • Patent number: 7782921
    Abstract: An electrical-optical coupling and detecting device. An apparatus according to an embodiment of the present invention includes a reflective surface defined on semiconductor material. The reflective surface is to reflect an incident optical beam towards an optical destination. An optical detector is monolithically integrated in the reflective surface of the semiconductor material. The optical detector arranged in the reflective surface of the semiconductor material is to detect the incident optical beam.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: August 24, 2010
    Assignee: Intel Corporation
    Inventors: Andrew C. Alduino, Mario J. Paniccia, Rami Cohen, Assia Barkai, Ansheng Liu
  • Patent number: 7715162
    Abstract: The present invention provides a method and apparatus for providing electro-static discharge (ESD) protection between a first and a second circuit node. One embodiment of the ESD protection circuit includes one or more steering diodes that generate electromagnetic radiation and couple the first circuit node to ground in response to a voltage applied to the first circuit node. The ESD protection circuit also includes a latch circuit that couples the first circuit node to ground in response to the electromagnetic radiation generated by the steering diode(s).
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: May 11, 2010
    Assignee: Zarlink Semiconductor (US) Inc.
    Inventor: Thomas Joseph Krutsick
  • Patent number: 7696529
    Abstract: The present invention provides a transflective liquid crystal display device having at least one switching element having at least a drain electrode, a first passivation layer formed over the switching element with the first passivation layer defining a drain contact hole exposing a first portion the drain electrode, a transparent pixel electrode contacting the drain electrode through the drain contact hole and defining a contact opening that exposes a second portion of the drain electrode, the contact opening being defined in a portion of the transparent pixel electrode in the drain contact hole, and a reflective pixel electrode contacting the transparent pixel electrode in the drain contact hole and contacting the drain electrode through the contact opening.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: April 13, 2010
    Assignee: LG Display Co., Ltd.
    Inventors: Kyo-Seop Choo, Ki-Bok Park
  • Patent number: 7693360
    Abstract: On the back surface of a transparent plate having a light extracting part for outputting lights to the outside, an electrode for wiring, and an electrode for an electromagnetic shield, an optical device is flip-chip mounted right under the light extracting part, an a driver IC is flip-chip mounted at a desired position with metal bumps. When currents driving the optical device flow from the driver IC according to an electric logical signal from the outside, an optical signal is emitted from the optical device, and is output to the outside through the light extracting part. The light extracting part may be provided with a light coupling material or an optical axis converter.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: April 6, 2010
    Assignee: NEC Corporation
    Inventors: Takanori Shimizu, Takara Sugimoto, Jun-ichi Sasaki, Kazuhiko Kurata
  • Patent number: 7622753
    Abstract: A component formed in a substrate of a first conductivity type, having two inputs and two outputs and: a first diode having its anode connected to a first input and having its cathode connected to a first output; a second diode having its anode connected to a second output and having its cathode connected to the first input; a one-way switch having its anode connected to the first output, its cathode being connected to the second output; and a third diode having its anode connected to the second output, its cathode being connected to the first output; the first, second, and third diodes being formed in a first portion of the substrate separated by a wall of the second conductivity type from a second substrate portion comprising the switch.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: November 24, 2009
    Assignee: STMicroelectronics S.A.
    Inventors: Samuel Menard, Benjamin Cheron, Arnaud Edet
  • Patent number: 7605440
    Abstract: A pixel having a well-isolated charge storage region or floating diffusion region may be obtained by providing a separate P-well around the storage region or floating diffusion region. In one embodiment, a separate P-well entirely encases the storage region and is in contact with the storage region. This P-well provides an electrical barrier for preventing electrons that are generated elsewhere in the pixel from contaminating the storage region. In another embodiment, a first separate P-well encases and is in contact with the storage region and a second separate P-well encases and is in contact with the floating diffusion region.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: October 20, 2009
    Assignee: Aptina Imaging Corporation
    Inventor: Parker Altice
  • Patent number: 7592654
    Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: September 22, 2009
    Assignee: Aptina Imaging Corporation
    Inventors: Sandeep R. Bahl, Fredrick P. LaMaster, David W. Bigelow
  • Patent number: 7554170
    Abstract: A photosensor includes a plurality of photosensitive regions including a first photosensitive region connected to a first voltage reference, and at least one additional photosensitive region. A signal collector is connected to the first photosensitive region. At least one switching device is for switching the at least one additional photosensitive region between the first voltage reference and a second voltage reference that is less than the first voltage reference, and for reversibly connecting the at least one additional photosensitive region to the signal collector so that the photosensor is variably responsive to different light levels.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: June 30, 2009
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Jeffrey Raynor
  • Patent number: 7525131
    Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: April 28, 2009
    Assignees: National University Corporation Shizuoka University, Hamamatsu Photonics K.K.
    Inventors: Masatomo Sumiya, Shunro Fuke, Tokuaki Nihashi, Minoru Hagino
  • Patent number: 7492988
    Abstract: Planar AWG circuits and systems are disclosed that use air trench bends to increase planar circuit compactness.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: February 17, 2009
    Inventors: Gregory P. Nordin, Yongbin Lin, Seunghyun Kim
  • Patent number: 7397066
    Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: July 8, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Steven D. Oliver
  • Patent number: 7214971
    Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: May 8, 2007
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Minoru Niigaki, Kazutoshi Nakajima
  • Patent number: 7157747
    Abstract: A channel isolation region 42 is formed over the entire width of an N-type silicon substrate 41, and photothyristors, in each of which an anode diffusion region 43, a P-gate diffusion region 44, a cathode diffusion region 45 are formed parallel to the channel isolation region 42 over almost the entire width of the N-type silicon substrate 41, are formed in a left-hand portion 40a and in a right-hand portion 40b and are wired inversely parallel. Thus, the inter-channel movement of residual holes during commutation is restrained by the channel isolation region 42, by which commutation failure is suppressed to improve a commutation characteristic. Further, an operating current large enough for controlling a load current of approx. 0.2 A is obtained although a chip is divided by the channel isolation region 42. Therefore, using this bidirectional photothyristor chip makes it possible to implement an inexpensive SSR with a main thyristor eliminated.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: January 2, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuru Mariyama, Masaru Kubo
  • Patent number: 7122840
    Abstract: An image sensor device and fabrication method thereof wherein a substrate having at least one shallow trench isolation structure therein is provided. At least one photosensor and at least one light emitting element, e.g., such as MOS or LED, are formed in the substrate. The photosensor and the light emitting element are isolated by the shallow trench isolation structure. An opening is formed in the shallow trench isolation structure to expose part of the substrate. An opaque shield is formed in the opening to prevent photons from the light emitting element from striking the photosensor.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: October 17, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung, Yean-Kuen Fang
  • Patent number: 7102185
    Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: September 5, 2006
    Assignee: Eastman Kodak Company
    Inventors: David N. Nichols, David L. Losee, Christopher Parks
  • Patent number: 7057214
    Abstract: Semiconductor switches, such as thyristors, may be light activated by introducing the light into the switch via a groove having a sloped surface to receive the triggering light. The use of a sloped surface increases the surface path length between points of different electrical potential in the groove and, therefore, reduces the likelihood of electrical breakdown on the groove wall. In one particular embodiment, a light-activated thyristor includes a semiconductor anode layer, an n-base layer, a p-base layer and a semiconductor cathode layer disposed parallel to a thyristor plane. A thyristor axis lies perpendicular to the thyristor plane. A groove having a light refracting side wall extends into the thyristor from the anode layer. A portion of the light refracting side wall is disposed non-parallel to the thyristor plane and to the thyristor axis, and extends in the n-drift layer.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: June 6, 2006
    Assignee: Optiswitch Technology Corporation
    Inventors: David M. Giorgi, Tajchai Navapanich
  • Patent number: 6809355
    Abstract: A solid-state imaging device having a gate structure including an oxide film and a nitride film includes upper layer films (for example, a planarization film, an insulating film, and a protective film) allowing ultraviolet rays having a wavelength of 400 nm or less to pass therethrough; and a metal made shield film or an organic film capable of absorbing the ultraviolet rays formed in such a manner as to cover a region of the gate structure (for example, an output gate and a reset gate), excluding a light receiving portion and a transfer portion, of the solid-state imaging device. With this configuration, it is possible to prevent the shift of a threshold voltage Vth, and hence to enhance the reliability of the transfer or reset of electric charges.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: October 26, 2004
    Assignee: Sony Corporation
    Inventor: Kazushi Wada
  • Patent number: 6800877
    Abstract: An apparatus and method for electrically connecting semi-conductor devices is disclosed. The apparatus and method employs a vacuum chamber and first and second semi-conductor components. The first and second semi-conductor components are coupled to a vacuum chamber and free space electron transmitters and receivers. The transmitters are configured to transmit a signals between the semi-conductor components.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: October 5, 2004
    Assignee: Exaconnect Corp.
    Inventors: Michel N. Victor, Aris Silzars
  • Patent number: 6770911
    Abstract: Large area silicon carbide devices, such as light-activated silicon carbide thyristors, having only two terminals are provided. The silicon carbide devices are selectively connected in parallel by a connecting plate. Silicon carbide thyristors are also provided having a portion of the gate region of the silicon carbide thyristors exposed so as to allow light of an energy greater than about 3.25 eV to activate the gate of the thyristor. The silicon carbide thyristors may be symmetric or asymmetrical. A plurality of the silicon carbide thyristors may be formed on a wafer, a portion of a wafer or multiple wafers. Bad cells may be determined and the good cells selectively connected by a connecting plate.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: August 3, 2004
    Assignee: Cree, Inc.
    Inventors: Anant Agarwal, Sei-Hyung Ryu, John W. Palmour
  • Patent number: 6765290
    Abstract: A diode coupling-based arrangement back-biases each of the semiconductor substrates of a plurality of integrated circuits at the maximum (e.g., most negative) DC voltage applied to any individual circuit, irrespective of a potential variation in applied DC voltages. Each semiconductor chip/substrate includes an auxiliary terminal to which each DC voltage terminal for that chip is diode-coupled. The auxiliary voltage terminal is connected to the underside biasing and thermal dissipation pad of the substrate. When multiple packages are mounted and conductively joined to a shared metallic dissipation region of a support substrate, all auxiliary voltage terminals will be connected in common, so as to back-bias each semiconductor substrate to the most maximum (e.g., most negative) of all applied DC voltages.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: July 20, 2004
    Assignee: Intersil Americas Inc.
    Inventors: Leonel E. Enriquez, Douglas L. Youngblood
  • Patent number: 6548352
    Abstract: A multi-layered gate for use in a CMOS or CCD imager formed with a second gate at least partially overlapping it. The multi-layered gate is a complete gate stack having an insulating layer, a conductive layer, an optional silicide layer, and a second insulating layer, and has a second gate formed adjacent to it which has a second conductive layer that extends at least partially over the surface of the multi-layered gate. The multi-layered gate has improved insulation, thereby resulting in fewer shorts between the conductive layers of the two gates. Also disclosed are processes for forming the multi-layered gate and the overlapping gate.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: April 15, 2003
    Assignee: Micron Technology Inc.
    Inventor: Howard E. Rhodes
  • Publication number: 20020047132
    Abstract: A semiconductor device for controlling electricity includes:
    Type: Application
    Filed: February 26, 2001
    Publication date: April 25, 2002
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Masakazu Fukada, Hiroshi Nishibori, Takanobu Yoshida, Naoki Yoshimatsu, Nobuyoshi Kimoto, Haruo Takao
  • Publication number: 20010028066
    Abstract: The invention provides a signal processing apparatus comprising clamp capacitance means for receiving, at one electrode thereof, first and second signals outputted from a signal source, a signal transfer transistor of which one main electrode is connected to an other electrode of the clamp capacitance means, signal accumulating capacitance means connected to an other main electrode of the signal transfer transistor, and reset means for fixing the potential of the signal accumulating capacitance means, wherein the potential of the signal accumulating capacitance means is fixed by the reset means while the first signal is outputted from the signal source and the signal accumulating capacitance means is maintained in a floating state while the second signal is outputted from the signal source, and the signal transfer transistor is controlled in such a manner that the potential of the main electrode of the signal transfer transistor and that of the other main electrode thereof show different saturation operations
    Type: Application
    Filed: February 27, 2001
    Publication date: October 11, 2001
    Inventors: Mahito Shinohara, Tomoyuki Noda
  • Patent number: 6144045
    Abstract: High power thyristor-type devices comprising a first layer of p-type doped semiconductor alloy aluminum gallium nitride, a second layer of n-type doped aluminum gallium nitride with lower aluminum content than the first layer, a third layer of p-type doped aluminum gallium nitride with a higher aluminum content than the second layer, and a fourth layer of aluminum gallium nitride of n-type doping. The difference in hole and electron energies (band offsets) across the interface between aluminum gallium nitride and gallium nitride are such that hole and electron transfer are enhanced from aluminum gallium nitride to gallium nitride, or hole and electron transfer are suppressed from gallium nitride to aluminum gallium nitride. Aluminum content in layers 1 and 2 is chosen such that hole transfer in the forward biased conduction state of the device is enhanced, and suppressed in the reverse biased blocking state of the device.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: November 7, 2000
    Assignee: California Institute of Technology
    Inventors: Zvonimir Z. Bandic, Eric C. Piquette, Thomas C. McGill
  • Patent number: 5929474
    Abstract: An active matrix OED array includes an array area defined on a semiconductor substrate defining rows and columns of pixels and driver areas spaced from the array area with driver circuits including row drivers coupled to row buses and column drivers coupled to column buses formed in the driver areas. An active control circuit and an OED are formed in each pixel of the array area and coupled to a row and a column bus adjacent each pixel. A second substrate is formed of light transmissive material and includes externally accessible electrical connectors coupled to the driver circuits. The semiconductor substrate includes a first bump pad encircling the array area and the second substrate includes a mating second bump pad with the first and second bump pads engaged to seal the array area.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: July 27, 1999
    Assignee: Motorola, Inc.
    Inventors: Rong-Ting Huang, Hsing-Chung Lee, Song Q. Shi
  • Patent number: 5780877
    Abstract: A break-over photodiode, designed as a light-sensitive thyristor, can be stacked using a series connection with a plurality of break-over photodiodes, such stacking representing a high-voltage break-over diode. The break-over photodiode can be triggered by lateral illumination in an edge zone, and includes a gate-layer resistivity under the emitter which is greater in an edge zone of the break-over photodiode than in the central zone of the break-over photodiode. The light sensitivity of the laterally illuminatable break-over photodiode is increased by a greater gate-layer resistivity in the edge zone as compared to the central zone.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: July 14, 1998
    Assignee: Robert Bosch GmbH
    Inventors: Bernd Bireckoven, Dirk Hoheisel, Ning Qu
  • Patent number: 5677552
    Abstract: The invention provides an optical functioning device which emits and receives light, and a driver circuit for controlling the device with light. In the device, elements, in which semiconductor multilayer-film reflecting mirrors are provided at both the upper and lower ends of a pnpn structure of semiconductors and which have light-emitting and light-receiving functions to act as optical resonators, are integrated two-dimensionally each with electrodes which are provided for the and the transistors act as phototransistors into which light is introduced.
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: October 14, 1997
    Assignee: NEC Corporation
    Inventor: Ichiro Ogura
  • Patent number: 5663580
    Abstract: A semiconductor device comprises a semiconductor layer of SiC having an active area through which the device is adapted to be triggered by light incident thereon and means for generating and emitting light with an energy exceeding the bandgap, being the energy difference between the conduction band and the valence band, of the SiC-layer of the active area. The generating means is directly integrated in the device by being placed so as to cover substantial portions of the active area, and being made of a Group 3B-nitride having a larger bandgap that of the SiC of the SiC-layer.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: September 2, 1997
    Assignee: ABB Research Ltd.
    Inventors: Christopher Harris, Mietek Bakowski
  • Patent number: 5406096
    Abstract: A high voltage device (10) having MOS input characteristics. A low voltage MOS transistor (12) is provided which has a source (18), a drain (22), and a gate (25). A high voltage transistor (14) is also provided which has a source (20), a drain (24), and gate (16). The source (18) of the low voltage MOS transistor (12) is connected to the gate (16) of the high voltage transistor (14). The drain (22) of the low voltage MOS transistor (12)is connected to the source (20)of the high voltage transistor The low voltage MOS transistor (12) may have a silicon substrate and the substrate of the high voltage transistor (14)may comprise silicon, silicon carbide, or gallium arsenide.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: April 11, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Satwinder Malhi
  • Patent number: 5345094
    Abstract: Disclosed is a semiconductor device comprising an output Triode AC switch with a vertical structure, which is provided in a silicon substrate and has a gate, a first output terminal and a second output terminal, and an input/driving photo Triode AC switch, which is provided in the substrate and has a light-receiving portion, a first terminal connected to the gate and a second terminal connected to the second output terminal. The output Triode AC switch with a vertical structure is turned on when light is input to the photo Triode AC switch.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: September 6, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunori Usui, Shinjiro Yano
  • Patent number: 5245203
    Abstract: A photoelectric converter of semiconductor transistor comprises two semiconductor regions of same electroconductive type and a semiconductor region of opposite electroconductive type to that of the two semiconductor regions. The semiconductor region of opposite electroconductive type is irradiated with a light. An amplified power is output from at least one of the two semiconductor regions of same electroconductive type. The semiconductor region of the opposite electroconductive type comprises a semiconductor region that accumulates a charge generated by light input and a semiconductor region acting as a control electrode region for the semiconductor transistor.
    Type: Grant
    Filed: March 31, 1992
    Date of Patent: September 14, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masakazu Morishita, Shin Kikuchi