Abstract: A nitride group semiconductor light emitting device includes a substrate, n-type and p-type semiconductor layers, and an active region. The n-type and p-type semiconductor layers are formed on or above the substrate. The active region is interposed between the n-type and p-type semiconductor layers. The active region includes barrier layers that are included in a multiquantum well structure, and an end barrier layer that has a thickness greater than the barrier layer, and is arranged closest to the p-type semiconductor layer. The average thickness of the last two barrier layers that are arranged adjacent to the end barrier layer is smaller than the average thickness of the other barrier layers among the thicknesses of the barrier layers that are included in the multiquantum well structure.

Abstract: A photosensitive quantum dot including a quantum dot, and a plurality of photosensitive moieties that are bound to a surface of the quantum dot, wherein each of the photosensitive moieties includes silicon (Si) and a photosensitive functional group. Also disclosed are a composition for forming a quantum dot-containing pattern, where the composition includes the photosensitive quantum dot, and a method of forming a quantum dot-containing pattern using the composition.

Abstract: An apparatus includes a primary planar quantum well and a planar distribution of dopant atoms. The primary planar quantum well is formed by a lower barrier layer, a central well layer on the lower barrier layer, and an upper barrier layer on the central well layer. Each of the layers is a semiconductor layer. One of the barrier layers has a secondary planar quantum well and is located between the planar distribution of dopant atoms and the central well layer. The primary planar quantum well may be undoped or substantially undoped, e.g., intrinsic semiconductor.

Abstract: A stacked semiconductor device and an associated manufacturing method are disclosed. A first semiconductor unit having a first surface, which is defined as being not a polar plane, is provided. At least one pit is formed on the first surface, and the pit has a second surface that lies at an angle relative to the first surface. A polarization enhanced tunnel junction is formed on the second surface, and a second semiconductor unit is formed above the tunnel junction.

Abstract: A radiation-emitting thin film semiconductor chip is herein described which comprises a first region with a first active zone, a second region, separated laterally from the first region by a space, with a second active zone which extends parallel to the first active zone in a different plane, and a compensating layer, which is located in the second region at the level of the first active zone, the compensating layer not containing any semiconductor material.

Abstract: A Group III nitride semiconductor light-emitting device includes a light-emitting layer having a multiple quantum structure including an AlxGa1-xN (0<x<1) layer as a barrier layer. When the light-emitting layer is divided into three blocks including first, second and third blocks in the thickness direction from the n-type-layer-side cladding layer to the p-type-layer-side cladding layer, the number of barrier layers are the same in the first and third blocks, and the Al composition ratio of each light-emitting layer is set to satisfy a relation x+z=2y and z<x where an average Al composition ratio of the barrier layers in the first block is represented as x, an average Al composition ratio of the barrier layers in the second block is represented as y, and an average Al composition ratio of the barrier layers in the third block is represented as z.

Abstract: Radiation-emitting semiconductor devices include a first base region comprising an n-type III-V semiconductor material, a second base region comprising a p-type III-V semiconductor material, and a multi-quantum well structure disposed between the first base region and the second base region. The multi-quantum well structure includes at least three quantum well regions and at least two barrier regions. An electron hole energy barrier between a third of the quantum well regions and a second of the quantum well regions is less than an electron hole energy barrier between the second of the quantum well regions and a first of the quantum well regions. Methods of forming such devices include sequentially epitaxially depositing layers of such a multi-quantum well structure, and selecting a composition and configuration of the layers such that the electron hole energy barriers vary across the multi-quantum well structure.

Abstract: Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity due to increased doping with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method for forming such a semiconductor structure.

Abstract: A light emitting device may include a first conductive semiconductor layer, an active layer adjacent to the first conductive semiconductor layer and a second conductive semiconductor layer adjacent to the active layer. The active layer may include a first quantum well layer, a second quantum well layer and a barrier layer between the first quantum well layer and the second quantum well layer. The first quantum well layer may include a first plurality of sub-barrier layers and a first plurality of sub-quantum well layers, and the second quantum well layer may include a second plurality of sub-barrier layers and a second plurality of sub-quantum well layers. A bandgap of the first quantum well layer may be different than a bandgap of the second quantum well layer.

Abstract: Light emitting devices comprise excitation sources arranged to excite quantum dots which fluoresce to emit light. In an embodiment, a device is manufactured by a process which involves applying an acoustic field is applied to a fluid containing quantum dots, to cause the quantum dots to accumulate at locations which are adjacent to excitation sources, and then initiating a phase transition of the fluid to trap the quantum dots in the locations adjacent to the excitation sources. The quantum dots are illuminated during the process and the resulting fluorescence is optically monitored to provide indicators of quantum dot distribution in the fluid. These indicators are used as feedback for controlling aspects of the process, such as initiating the phase transition.

Abstract: Disclosed is semiconductor structure with an insulator layer on a semiconductor substrate and a device layer is on the insulator layer. The substrate is doped with a relatively low dose of a dopant having a given conductivity type such that it has a relatively high resistivity. Additionally, a portion of the semiconductor substrate immediately adjacent to the insulator layer can be doped with a slightly higher dose of the same dopant, a different dopant having the same conductivity type or a combination thereof. Optionally, micro-cavities are created within this same portion so as to balance out any increase in conductivity due to increased doping with a corresponding increase in resistivity. Increasing the dopant concentration at the semiconductor substrate-insulator layer interface raises the threshold voltage (Vt) of any resulting parasitic capacitors and, thereby reduces harmonic behavior. Also disclosed herein are embodiments of a method for forming such a semiconductor structure.

Abstract: The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact.

Abstract: A resonant tunneling diode, and other one dimensional electronic, photonic structures, and electromechanical MEMS devices, are formed as a heterostructure in a nanowhisker by forming length segments of the whisker with different materials having different band gaps.

Abstract: The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate and formed with reference to the n-type nitride semiconductor layer.

Abstract: A particle detection device (10) included substrates (1, 4), insulating members (2, 3), supporting member (5), and electrodes (6, 7). The insulating member (2) is provided on a principal surface of the substrate (1) and has a recess. The insulating member (3) is provided so as to make contact with the insulating member (3) and the substrate (4). The substrate (4) is formed on a principal surface of the supporting member (5). The electrode (6) is formed on a surface, which is opposite to the surface where the insulating member (2) is formed, of the substrate (1). The electrode (7) is formed on the surface (5A), the side surface (5B), and the rear surface (5C) of the supporting member (5) so as to be connected to the substrate (4). Accordingly, the detection device 10 includes a gap (8) surrounded by the insulating members (2, 3). The substrate (1) is connected to the substrate (4) with the insulating members (2, 3) and the supporting member (5) (quartz).

Abstract: A light emitting diode structure and a method of forming a light emitting diode structure are provided. The structure includes a superlattice comprising, a first barrier layer; a first quantum well layer comprising a first metal-nitride based material formed on the first barrier layer; a second barrier layer formed on the first quantum well layer; and a second quantum well layer including the first metal-nitride based material formed on the second barrier layer; and wherein a difference between conduction band energy of the first quantum well layer and conduction band energy of the second quantum well layer is matched to a single or multiple longitudinal optical phonon energy for reducing electron kinetic energy in the superlattice.

Abstract: Disclosed is an ultraviolet fluorescent material having high light emission efficiency, wherein the peak wavelength of ultraviolet light to be emitted can be controlled by having a quantum dot structure wherein a fine crystal of zinc oxide having an average diameter of 1-10 nm serves as a core, and the surface of the zinc oxide fine crystal is covered with at least one of LiGaO2, LiAlO2, NaGaO2 and NaAlO2, which has a crystal structure similar to that of the zinc oxide and low lattice mismatch and hardly suffers from structural defects, or a solid solution thereof.

Abstract: Consistent with the present disclosure, a package is provided that includes a housing having a recessed portion to accommodate an integrated circuit or chip. The housing has an inner periphery that defines or delineates the recessed portion. The inner periphery may be stepped and includes first and second surfaces that are spaced vertically from one another and extend in respective parallel planes, for example, to thereby constitute first and second shelves. First bonding pads or contacts (“housing pads”) may be provided on the first surface, which may electrically connect or interconnect with first pads on the integrated circuit (“IC pads”), and second housing pads may be provided on the second surface, which can electrically connect or interconnect with second IC pads. Thus, the IC pads connect to corresponding housing pads on the inner periphery of the housing that are above and below one another.

Abstract: Embodiments of the invention relate to apparatus, system and method for use of a memory cell having improved power consumption characteristics, using a low-bandgap material quantum well structure together with a floating body cell.

Abstract: An apparatus includes a primary planar quantum well and a planar distribution of dopant atoms. The primary planar quantum well is formed by a lower barrier layer, a central well layer on the lower barrier layer, and an upper barrier layer on the central well layer. Each of the layers is a semiconductor layer. One of the barrier layers has a secondary planar quantum well and is located between the planar distribution of dopant atoms and the central well layer. The primary planar quantum well may be undoped or substantially undoped, e.g., intrinsic semiconductor.

Abstract: A light-emitting device includes an n-type silicon thin film (2), a silicon thin film (3), and a p-type silicon thin film (4). The silicon thin film (3) is formed on the n-type silicon thin film (2) and the p-type silicon thin film (4) is formed on the silicon thin film (3). The n-type silicon thin film (2), the silicon thin film (3), and the p-type silicon thin film (4) form a pin junction. The n-type silicon thin film (2) includes a plurality of quantum dots (21) composed of n-type Si. The silicon thin film (3) includes a plurality of quantum dots (31) composed of p-type Si. The p-type silicon thin film (4) includes a plurality of quantum dots (41) composed of p-type Si. Electrons are injected from the n-type silicon thin film (2) side and holes are injected from the p-type silicon thin film (4) side, whereby light is emitted at a silicon nitride film (3).

Abstract: A semiconductor light-emitting device including an active layer is provided. The light-emitting device includes an active layer between an n-type semiconductor layer and a p-type semiconductor layer. The active layer includes a quantum well layer formed of Inx1Ga(1?x1)N, where 0<x1?1, barrier layers formed of Inx2Ga(1?x2)N, where 0?x2<1, on opposite surfaces of the quantum well layer, and a diffusion preventing layer formed between the quantum well layer and at least one of the barrier layers. Due to the diffusion preventing layer between the quantum well layer and the barrier layers in the active layer, the light emission efficiency increases.

Abstract: Interfused nanocrystals including two or more materials, further including an alloy layer formed of the two or more materials. In addition, a method of preparing the interfused nanocrystals. In the interfused nanocrystals, the alloy layer may be present at the interface between the two or more nanocrystals, thus increasing the material stability. A material having excellent quantum efficiency in the blue light range may be synthesized.

Abstract: A silicon carbide semiconductor device (90), includes: 1) a silicon carbide substrate (1); 2) a gate electrode (7) made of polycrystalline silicon; and 3) an ONO insulating film (9) sandwiched between the silicon carbide substrate (1) and the gate electrode (7) to thereby form a gate structure, the ONO insulating film (9) including the followings formed sequentially from the silicon carbide substrate (1): a) a first oxide silicon film (O) (10), b) an SiN film (N) (11), and c) an SiN thermally-oxidized film (O) (12, 12a, 12b). Nitrogen is included in at least one of the following places: i) in the first oxide silicon film (O) (10) and in a vicinity of the silicon carbide substrate (1), and ii) in an interface between the silicon carbide substrate (1) and the first oxide silicon film (O) (10).

Abstract: An alignment mark arrangement includes: a first alignment pattern comprising a plurality of parallel first stripes on a substrate, wherein each of the first stripes includes a first dimension; and a second alignment pattern positioned directly above and overlapping with the first alignment pattern, the second alignment pattern including a plurality of parallel second stripes, wherein each of the second stripes of the second alignment pattern has a second dimension that is larger than the first dimension of each of the first stripes of the first alignment pattern.

Abstract: An apparatus comprising a microelectromechanical system. The microelectromechanical system includes a crystalline structural element having dislocations therein. For at least about 60 percent of adjacent pairs of the dislocations, direction vectors of the dislocations form acute angles of less than about 45 degrees.

Abstract: The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate and formed with reference to the n-type nitride semiconductor layer.

Abstract: The present invention provides an optoelectronic device with an epi-stacked structure, which includes a substrate, a buffer layer that is formed on the substrate, in which the buffer layer includes a first nitrogen-containing compound layer, an II/V group compound layer is provided on the first nitrogen-containing compound layer, a second nitrogen-containing compound layer is provided on the II/V group compound layer, and a third nitrogen-containing compound layer is provided on the second nitrogen-containing compound layer, an epi-stacked structure with a multi-layer structure is formed on the buffer layer, which includes a first semiconductor conductive layer is formed on the buffer layer, an active layer is formed on the first semiconductor conductive layer, a multi-layer structure is formed between the first semiconductor conductive layer and the active layer, and a second semiconductor conductive layer is formed on the active layer.

Abstract: One embodiment of the invention includes a high hole mobility p-channel GaAsySb1-y quantum well with a silicon substrate and an InxAl1-xAs barrier layer.

Abstract: A light emitting diode (LED) having a barrier layer with a superlattice structure is disclosed. In an LED having an active region between an GaN-based N-type compound semiconductor layer and a GaN-based P-type compound semiconductor layer, the active region comprises a well layer and a barrier layer with a superlattice structure. As the barrier layer with the superlattice structure is employed, it is possible to reduce occurrence of defects caused by lattice mismatch between the well layer and the barrier layer.

Abstract: Implementations and techniques for semiconductor light-emitting devices including one or more copper blend I-VII compound semiconductor material barrier layers are generally disclosed.

Abstract: A semiconductor light emitting device and a method of manufacturing the semiconductor light emitting device are provided. The semiconductor light emitting device comprises a substrate having a top surface that is curved to protrude, and a light emitting structure that is curved to protrude on the substrate and comprises an active layer.

Abstract: The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: a single electron box including a first quantum dot, a charge storage gate on the first quantum dot, and a first gate electrode on the charge storage gate, the charge storage gate exchanging charges with the first quantum dot, the first gate electrode adjusting electric potential of the first quantum dot; and a single electron transistor including a second quantum dot below the first quantum dot, a source, a drain, and a second gate electrode below the second quantum dot, the second quantum dot being capacitively coupled to the first quantum dot, the source contacting one side of the second quantum dot, the drain contacting the other side facing the one side, the second gate electrode adjusting electric potential of the second quantum dot.

Abstract: A composite of a base and an array of needle-like crystals formed on the surface of the base is provided, in which the base side and the opposite side to the base with respect to the array can be isolated in a satisfactory manner. A composite 10 includes a transparent electrode 2 serving as the base, an array 4 of needle-like crystals 3 formed thereon, and a coating film 15 covering the surface of the needle-like crystals 3. The needle-like crystals 3 are made of, for example, zinc oxide, and the coating film 15 contains, for example, titanium oxide. The array 4 includes a first region R1 on the transparent electrode 2 side and a second region R2 on the opposite side to the transparent electrode 2 with respect to the first region R1.

Abstract: There is provided a nitride semiconductor device including an active layer of a superlattice structure. The nitride semiconductor device including: a p-type nitride semiconductor layer; an n-type nitride semiconductor layer; and an active layer disposed between the p-type and n-type nitride layers, the active layer comprising a plurality of quantum barrier layers and quantum well layers deposited alternately on each other, wherein the active layer has a superlattice structure where the quantum barrier layer has a thickness for enabling a carrier injected from the p-type and n-type nitride semiconductor layers to be tunneled therethrough, and at least one of the quantum barrier layers has an energy band gap greater than another quantum barrier layer adjacent to the n-type nitride semiconductor layer.

Abstract: A light emitting device of the invention includes an electron transporting layer, a hole transporting layer provided mutually facing the electron transporting layer with a distance between the hole transporting layer and the electron transporting layer, a phosphor layer having a layer of a plurality of semiconductor fine particles sandwiched between the electron transporting layer and the hole transporting layer, a first electrode provided facing the electron transporting layer and connected electrically, and a second electrode provided facing the hole transporting layer and connected electrically: in which the semiconductor fine particles composing the phosphor layer have a p-type part and an n-type part inside of the particles and have a pn-junction in the interface of the p-type part and the n-type part and are arranged in a manner that the p type part is partially brought into contact with the hole transporting layer and at the same time, the n type part is partially brought into contact with the electron

Abstract: The present invention is disclosed that a device capable of normal incident detection of infrared light to efficiently convert infrared light into electric signals. The device includes a substrate, a first contact layer formed on the substrate, an active layer formed on the first contact layer, a barrier layer formed on the active layer and a second contact layer formed on the barrier layer, wherein the active layer includes multiple quantum dot layers.

Abstract: A side barrier is provided between columnar dots each constituted by directly stacking respective quantum dots in seven or more layers. Out of respective side barrier layers composing the side barrier, each of the lower side barrier layers (four layers of the undermost layer to the fourth layer from the bottom) is formed as a first side barrier layer into which a tensile strain is introduced, and each of the upper side barrier layers (three layers of the fifth layer to the uppermost layer from the bottom) is formed as a second side barrier layer which has no strain.

Abstract: Embodiments of the invention relate to apparatus, system and method for use of a memory cell having improved power consumption characteristics, using a low-bandgap material quantum well structure together with a floating body cell.

Abstract: An optical semiconductor device includes a substrate; and an active layer disposed on the substrate, wherein the active layer includes a first barrier layer containing GaAs, a quantum dot layer, which is disposed on the first barrier layer, which includes a quantum dot containing InAs, which includes a side barrier layer which covers at least a part of the quantum dot and a side surface of the quantum dot, and having an elongation strain inherent therein, and a second barrier layer disposed on the quantum dot layer.

Abstract: Systems and methods are described for controlled alignment of catalytically grown nanostructures in a large-scale synthesis process. A method includes: generating an electric field proximate an edge of a protruding section of an electrode, the electric field defining a vector; and forming an elongated nanostructure located at a position on a surface of a substrate, the position on the surface of the substrate proximate the edge of the protruding section of the electrode, at least one tangent to the elongated nanostructure i) substantially parallel to the vector defined by the electric field and ii) substantially non-parallel to a normal defined by the surface of the substrate.

Abstract: Disclosed are a light emitting device. The light emitting device includes a first conductive semiconductor layer, a light emitting layer, a protective layer, a nano-layer and a second conductive semiconductor layer. The light emitting layer is formed on the first conductive semiconductor layer. The protective layer is formed on the light emitting layer. The nano-layer is formed on the protective layer. The second conductive semiconductor layer is formed on the nano-layer.

Abstract: A signal detecting device includes: a semiconductor substrate; a near-field light generating section that is provided on the semiconductor substrate and generates near-field light near an interface with the semiconductor substrate; a light source that outputs light having wavelength corresponding to photon energy about a half as large as band-gap energy of a material of the semiconductor substrate; and a current detecting unit that detects a photocurrent generated in the semiconductor substrate when the near-field light is generated.

Abstract: A resonant tunneling structure for generating oscillation with multiple fundamental oscillation frequencies is provided. A first quantum well layer has a second sub-band (E2). A second quantum well layer has a first sub-band (E1) and a third sub-band (E3). When no electric field is applied, the resonant tunneling structure satisfies “(Eb1, Eb2)<E1<E2<E3”, where band edge energies of a first and second electrical contact layers relative to a carrier are expressed by Eb1 and Eb2, respectively. When a first electric field (Va) is applied, a resonant tunneling phenomenon is caused by the third sub-band and the second sub-band. When a second electric field (Vb) different in polarity from the first electric field is applied, a resonant tunneling phenomenon is caused by the second sub-band and the first sub-band.

Abstract: An inorganic light emitting device including a transparent substrate; a first electrode; a second electrode opposed to the first electrode; a polycrystalline inorganic light emitting layer including core/shell quantum dots within an inorganic semiconductor matrix and, wherein the first electrode is transparent and formed on the transparent substrate, the polycrystalline inorganic light emitting layer is formed over the first electrode, and the second electrode is formed over the light emitting layer.

Abstract: A semiconductor device may include a semiconductor substrate having a surface, a shallow trench isolation (STI) region in the semiconductor substrate and extending above the surface thereof, and a superlattice layer adjacent the surface of the semiconductor substrate and comprising a plurality of stacked groups of layers. More particularly, each group of layers of the superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Moreover, at least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer.

Abstract: Embodiments provide a quantum dot active structure and a methodology for its fabrication. The quantum dot active structure includes a substrate, a plurality of alternating regions of a quantum dot active region and a strain-compensation region, and a cap layer. The strain-compensation region is formed to eliminate the compressive strain of an adjacent quantum dot active region, thus allowing quantum dot active regions to be densely-stacked. The densely-stacked quantum dot active region provides increased optical modal gain for semiconductor light emitting devices such as edge emitting lasers, vertical cavity lasers, detectors, micro-cavity emitters, optical amplifiers or modulators.

Abstract: Various embodiments of the present invention include three-dimensional, at least partially nanoscale, electronic circuits and devices in which signals can be routed in three independent directions, and in which electronic components can be fabricated at junctions interconnected by internal signal lines. The three-dimensional, at least partially nanoscale, electronic circuits and devices include layers, the nanowire or microscale-or-submicroscale/nanowire junctions of each of which may be economically and efficiently fabricated as one type of electronic component. Various embodiments of the present invention include nanoscale memories, nanoscale programmable arrays, nanoscale multiplexers and demultiplexers, and an almost limitless number of specialized nanoscale circuits and nanoscale electronic components.

Abstract: A method of a bulk tri-gate transistor having stained enhanced mobility and its method of fabrication. The present invention is a nonplanar transistor having a strained enhanced mobility and its method of fabrication. The transistor has a semiconductor body formed on a semiconductor substrate wherein the semiconductor body has a top surface on laterally opposite sidewalls. A semiconductor capping layer is formed on the top surface and on the sidewalls of the semiconductor body. A gate dielectric layer is formed on the semiconductor capping layer on the top surface of a semiconductor body and is formed on the capping layer on the sidewalls of the semiconductor body. A gate electrode having a pair of laterally opposite sidewalls is formed on and around the gate dielectric layer. A pair of source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.