Abstract: An Si/Ge SACM avalanche photodiodes (APD) having low breakdown voltage characteristics includes an absorption region and a multiplication region having various layers of particular thicknesses and doping concentrations. An optical waveguide can guide infrared and/or optical signals or energy into the absorption region. The resulting photo-generated carriers are swept into the i-Si layer and/or multiplication region for avalanche multiplication. The APD has a breakdown bias voltage of well less than 12 V and an operating bandwidth of greater than 10 GHz, and is therefore suitable for use in consumer electronic devices, high speed communication networks, and the like.

Abstract: A semiconductor device that includes a layer of highly crystalline semiconductor material positioned on an insulating substrate. The semiconductor device also includes a source structure and a drain structure positioned on the layer of highly crystalline semiconductor material. The semiconductor device also includes a photoelectric element positioned on the layer of highly crystalline semiconductor material. The photoelectric element forms an electrical junction with the layer of highly crystalline semiconductor material. The photoelectric element is positioned between the source structure and the drain structure. The photoelectric element is also electrically floating.

Abstract: A structure for radiofrequency applications includes: a semiconducting supporting substrate, and a trapping layer arranged on the supporting substrate. The trapping layer includes a higher defect density than a predetermined defect density. The predetermined defect density is the defect density beyond which the electric resistivity of the trapping layer is no lower than 10,000 ohm·cm over a temperature range extending from ?20° C. to 120° C.

Abstract: A two-terminal photon-effect transistor (PET) is described that simplifies the photo sensing pixel by combing photodiode and field effect transistor dual functions into one simple but effective unit. Photons excite electrons from the valance band of semiconducting material as the electrode-free gate to modulate resistivity between source and drain, which directly results in current amplification of photo signal without traditional photo-electrical conversion and electrical amplification dual processes. PET possesses significance in both structural simplification and functional enhancement. As an implementing example of PET, a nanowire camera (NC) with large sensing area and extremely high resolution is fabricated by integrating millions of vertically aligned nanowire arrays in-between of orthogonal top and bottom nano-stripe electrodes. Each nanowire works as independent three-dimensional (3D) PET pixel, enabling the NC an ultra-high resolution and much simplified architecture.

Abstract: Embodiments include epitaxial semiconductor stacks for reduced defect densities in III-N device layers grown over non-III-N substrates, such as silicon substrates. In embodiments, a metamorphic buffer includes an AlxIn1-xN layer lattice matched to an overlying GaN device layers to reduce thermal mismatch induced defects. Such crystalline epitaxial semiconductor stacks may be device layers for HEMT or LED fabrication, for example. System on Chip (SoC) solutions integrating an RFIC with a PMIC using a transistor technology based on group III-nitrides (III-N) capable of achieving high Ft and also sufficiently high breakdown voltage (BV) to implement high voltage and/or high power circuits may be provided on the semiconductor stacks in a first area of the silicon substrate while silicon-based CMOS circuitry is provided in a second area of the substrate.

Abstract: A semiconductor stack includes a first-conductivity-type layer of a first conductivity type, the first-conductivity-type layer being formed of a III-V compound semiconductor; a quantum well light-receiving layer formed of a III-V compound semiconductor; and a second-conductivity-type layer of a second conductivity type different from the first conductivity type, the second-conductivity-type layer being formed of a III-V compound semiconductor. The first-conductivity-type layer, the quantum well light-receiving layer, and the second-conductivity-type layer are stacked in this order. The quantum well light-receiving layer has a thickness of 0.5 ?m or more. The quantum well light-receiving layer has a carrier concentration of 1×1016 cm?3 or less.

Abstract: The present disclosure provides a method of forming a semiconductor device structure. The method includes determining a threshold voltage distribution profile along a height of a silicon germanium (SiGe) fin structure over a semiconductor substrate; determining a germanium (Ge) concentration profile to counteract the threshold voltage distribution profile according to a correlation between Ge concentration and threshold voltage in the SiGe fin structure; forming a SiGe epitaxial layer with the Ge concentration profile along a thickness of the SiGe epitaxial layer; etching the SiGe epitaxial layer to form the SiGe fin structure; and forming, on the SiGe fin structure, a field-effect transistor having a uniform threshold voltage along the height of the SiGe fin structure.

Abstract: A light emitting element includes a semiconductor stacked body, an oxide film, and a reflecting film. The semiconductor stacked body has a body surface. The oxide film has an upper surface and a bottom surface opposite to the upper surface. The oxide film is provided on the semiconductor stacked body such that the bottom surface of the oxide film is opposite to the body surface of the semiconductor stacked body. The reflecting film is provided on the oxide film to be in contact with the upper surface of the oxide film and includes silver and oxide nanoparticles.

Abstract: A method forms a vertical output coupler for a waveguide, formed of waveguide material and disposed within a layer stack on a top surface of a wafer. The method includes etching through a portion of the wafer to form a via that exposes the waveguide material, and etching the waveguide material to remove at least a first portion of the waveguide. The etching forms a tilted plane in the waveguide material. The method further includes coating the first tilted plane with one or more reflective layers, to form a tilted mirror in contact with the first tilted plane in the waveguide material. The tilted mirror forms the vertical output coupler such that light propagating through the waveguide is deflected by the tilted mirror, and exits the waveguide.

Abstract: A transceiver comprising a chip, a semiconductor laser, and one or more photodetectors, the chip comprising optical and optoelectronic devices and electronic circuitry, where the transceiver is operable to: communicate, utilizing the semiconductor laser, an optical source signal into the chip, generate first optical signals in the chip based on the optical source signal, transmit the first optical signals from the chip via a light pipe with a sloped reflective surface coupled to the chip, and receive second optical signals from the light pipe and converting the second optical signals to electrical signals via the photodetectors. The optical signals may be communicated out of and in to a top surface of the chip. The one or more photodetectors may be integrated in the chip. The optoelectronic devices may include the one or more photodetectors integrated in the chip. The light pipe may be a planar lightwave circuit (PLC).

Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.

Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.

Abstract: A photosensor device for reducing dark current is disclosed. The photosensor device includes a photon absorbing layer and two or more photosensor diffusions in said absorbing layer. The photosensor diffusions in the absorbing layer have edges of their diffusions separated in said absorbing layer by less than two minority carrier diffusion lengths. The photosensor device also includes in one embodiment one or more diffusion control junction diffusions in the absorbing layer and in proximity to the photosensor diffusions. In another embodiment the photosensor diffusions are selectively biased to operate as photosensor diodes or as diffusion impediments.

Abstract: An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

Abstract: An integrated device is provided. The integrated device includes a substrate having a doped upper surface section and an insulator to define first and second substrate regions on opposite sides thereof. Vertical transistors are operably arranged on the doped upper surface section at the first substrate region. P-I-N diodes are operably arranged on the doped upper surface section at the second substrate region.

Abstract: A molded nanoparticle phosphor for light emitting applications is fabricated by converting a suspension of nanoparticles in a matrix material precursor into a molded nanoparticle phosphor. The matrix material can be any material in which the nanoparticles are dispersible and which is moldable. The molded nanoparticle phosphor can be formed from the matrix material precursor/nanoparticle suspension using any molding technique, such as polymerization molding, contact molding, extrusion molding, injection molding, for example. Once molded, the molded nanoparticle phosphor can be coated with a gas barrier material, for example, a polymer, metal oxide, metal nitride or a glass. The barrier-coated molded nanoparticle phosphor can be utilized in a light-emitting device, such as an LED. For example, the phosphor can be incorporated into the packaging of a standard solid state LED and used to down-convert a portion of the emission of the solid state LED emitter.

Abstract: A photodiode includes a p-type ohmic contact and a p-type substrate in contact with the p-type ohmic contact. An intrinsic layer is formed over the substrate and including a III-V material. A transparent II-VI n-type layer is formed on the intrinsic layer and functions as an emitter and an n-type ohmic contact.

Abstract: Methods of making solid-state semiconducting films. The methods include forming a mixture by mixing at least two monomers in a pre-determined proportion such that at least one of the at least two monomers contains at least one non-conjugation spacer. Polymerization of the mixture is achieved by reacting the monomers with one another resulting in a solid state polymer which is then purified. The purified solid state polymer is dissolved in an organic solvent to form a homogenous solution which is then deposited onto a substrate, forming a solid-state semiconducting film by evaporating the solvent. Alternatively, the purified solid state polymer is deposited onto a substrate and heated to form a liquid melt, and cooling the liquid melt results in a solid state semiconducting thin film. Also, films comprising a semiconducting polymer composition containing a minimum of one non-conjugation spacer and devices comprising such films.

Abstract: Systems and methods are described to form compositionally graded BHJ structures utilizing solvent-fluxing techniques. In implementations, the systems and methods described herein involve a high boiling point additive, a solution of a polymer donor and an acceptor, a substrate material, a working solvent, and a flux solvent for formation of compositionally graded BHJ structures.

Abstract: Embodiments herein describe a photonic device that includes a germanium photodetector coupled to multiple silicon waveguides. In one embodiment, the silicon waveguides optically couple to a layer of germanium material. In one embodiment, if the germanium material forms a polygon, then a respective silicon waveguide optically couple to each of the corners of the polygon. Each of the plurality of input silicon waveguides may be arranged to transmit light in a direction under the germanium that is offset relative to both sides of the germanium forming the respective corner. In another example, the germanium material may be a circle or ellipse in which case the silicon waveguides terminate at or close to a non-straight, curved surface of the germanium material. As described below, optically coupling the silicon waveguides at a non-straight surface can reduce the distance charge carriers have to travel in the optical detector which can improve bandwidth.

Abstract: Embodiments of the invention describe apparatuses, optical systems, and methods related to utilizing optical cladding layers. According to one embodiment, a hybrid optical device includes a silicon semiconductor layer and a III-V semiconductor layer having an overlapping region, wherein a majority of a field of an optical mode in the overlapping region is to be contained in the III-V semiconductor layer. A cladding region between the silicon semiconductor layer and the III-V semiconductor layer has a spatial property to substantially confine the optical mode to the III-V semiconductor layer and enable heat dissipation through the silicon semiconductor layer.

Abstract: The present invention relates to a display substrate and a method for fabricating the same, a display panel and a display device. The display substrate comprises a plurality of pixels, each of which has a display region, a non-display region being between the plurality of pixels, and the display substrate further comprises a protection metal layer covering the non-display region. In the display substrate, the protection metal layer covers the non-display region of the display substrate so as to shield the structures of the thin-film transistors, signal lines and the like on the display substrate, and thus the stability of structure of the display panel as well as the high resolution of the display panel and excellent display effect thereof can be ensured, and, in the meantime, the procedure of fabrication process is simplified, the manufacture efficiency is improved, and the cost for manufacturing is reduced.

Abstract: Examples include hybrid silicon photonic device structures. Some examples include a method of integrating a photodetector with a photonic device on a silicon wafer to make a hybrid silicon photonic device structure. A dielectric layer is established on the silicon wafer. A pit is formed in a portion of the dielectric layer and the silicon wafer, wherein a bottom of the pit is silicon. A germanium layer is grown in the pit such that a top of the germanium layer is lower than a top of the silicon wafer. The germanium layer comprises the photodetector. A photonic device material that comprises the photonic device is bonded to the silicon wafer without planarization of the silicon wafer.

Abstract: An infrared detector is provided. The infrared detector includes an absorption layer sensitive to radiation in only a short wavelength infrared spectral band, and a barrier layer coupled to the absorption layer. The barrier layer is fabricated from an alloy including aluminum and antimony, and at least one of gallium or arsenic, and the composition of the alloy is selected such that valence bands of the absorption layer and the barrier layer substantially align.

Abstract: A package carrier includes a carrier and a light absorption layer. The light absorption layer is disposed on the carrier. The light absorption layer includes a notch at the periphery of the carrier, and the notch is light transmissive so as to expose the carrier to light in a normal direction of the carrier. A semiconductor manufacturing process is also provided.

Abstract: A transceiver comprising a chip, a semiconductor laser, and one or more photodetectors, the chip comprising optical and optoelectronic devices and electronic circuitry, where the transceiver is operable to: communicate, utilizing the semiconductor laser, an optical source signal into the chip via a light pipe with a sloped reflective surface, generate first optical signals in the chip based on the optical source signal, transmit the first optical signals from the chip via the light pipe, and receive second optical signals from the light pipe and converting the second optical signals to electrical signals via the photodetectors. The optical signals may be communicated out of and in to a top surface of the chip. The one or more photodetectors may be integrated in the chip. The optoelectronic devices may include the one or more photodetectors integrated in the chip. The light pipe may be a planar lightwave circuit (PLC).

Abstract: An optical modulator and a 3D image acquisition apparatus including an optical modulator are provided. The optical modulator is disposed in a multiple quantum well including a plurality of quantum wells and a plurality of quantum barriers, and includes at least one carrier block disposed in the multiple quantum well restricting the carrier movement between the multiple quantum wells.

Abstract: A light emitting device package is disclosed. The light emitting device package includes a package body including at least one ceramic layer, a submount disposed at the package body, a light emitting device disposed on the submount for emitting ultraviolet (UV)-wavelength light, and an anti-reflection (AR) coating layer disposed around the light emitting device, the AR coating layer being formed of an inorganic coating layer.

Abstract: An imaging device with low power consumption is provided. A pixel circuit has a configuration of detecting difference data between data of a reference frame and data of a target frame in a pixel, and a peripheral circuit has a configuration of efficiently converting the difference data by A/D conversion so as to obtain high compressibility. Difference data which is encoded by compression is written into a memory element and read sequentially. At this time, the frequency of a clock signal can be lowered in accordance with the amount of data. The read data is expanded and the expanded data is added to the reference frame to constitute an image.

Abstract: A semiconductor apparatus includes a first photodiode arranged in a semiconductor substrate, a second photodiode arranged in the semiconductor substrate, a charge voltage conversion part connected to a cathode of the first photodiode and an anode of the second photodiode and configured to convert a charge amount in accordance with electrons generated in the first photodiode and holes generated in the second photodiode into a voltage, and a signal generation part configured to generate a signal in accordance with the voltage of the charge voltage conversion part.

Abstract: The present disclosure discloses a display panel, including a color filter plate substrate and an array substrate; the color filter plate substrate includes a black matrix and a protective layer; the color filter plate substrate and the array substrate are disposed opposite; the protective layer is disposed on a side of the black matrix oriented to the array substrate in a laser incidence region during laser repair. The protective layer is disposed on a side of the black matrix oriented to the array substrate in a laser incidence region during laser repair according to the disclosure, therefore, the preventive layer can protect the black matrix during laser repair from forming a through-hole on the black matrix that can leak light.

Abstract: In one embodiment, an apparatus comprising a first resistor, the first resistor comprising a first type of resistor having a plurality of metal wires in respective layers, the plurality of metal wires arranged in series via a plurality of vias.

Abstract: The present disclosure provides a light-emitting device and manufacturing method thereof. The light-emitting device comprising: a light-emitting stack; and a semiconductor layer having a first surface connecting to the light-emitting stack, a second surface opposite to the first surface, and a void; wherein the void comprises a bottom part near the first surface and an opening on the second surface, and a dimension of the bottom part is larger than the dimension of the opening.

Abstract: A display device is provided including a first substrate provided with a pixel, the pixel being provided with a light emitting region of a light emitting device formed by stacking a first electrode, a light emitting layer and second electrode in this order, a first insulating layer having an opening exposing the first electrode at a position corresponding to the light emitting region and provided above the first electrode, a second insulating layer having a certain thickness provided over the first insulating layer and outer region of the opening, and a sealing film provided covering the light emitting device above the second electrode.

Abstract: A transmission mode photocathode comprises: an optically transparent substrate having an outside face to which light is incident, and an inside face from which the light incident to the outside face side is output; a photoelectric conversion layer disposed on the inside face side of the optically transparent substrate and configured to convert the light output from the inside face into a photoelectron or photoelectrons; and an optically-transparent electroconductive layer comprising graphene, and disposed between the optically transparent substrate and the photoelectric conversion layer.

Abstract: An infrared photodetector including a substrate, a barrier layer, and an absorber layer disposed between the substrate and the barrier layer, the absorber layer having a molar concentration grading that results in an uncoated quantum efficiency of greater than about 40 percent.

Abstract: A Ge-on-Si photodetector constructed without doping or contacting Germanium by metal is described. Despite the simplified fabrication process, the device has responsivity of 1.24 A/W, corresponding to 99.2% quantum efficiency. Dark current is 40 nA at ?4 V reverse bias. 3-dB bandwidth is 30 GHz.

Abstract: The invention relates to a radiation source, comprising at least one semiconductor substrate, on which at least two field-effect transistors are formed, which each contain a gate electrode, a source contact, and a drain contact, which bound a channel, wherein the at least two field-effect transistors are arranged adjacent to each other on the substrate, wherein each field-effect transistor has exactly one gate electrode and at least one source contact and/or at least one drain contact is arranged between two adjacent gate electrodes, wherein a ballistic electron transport can be formed in the channel during operation of the radiation source. The invention further relates to a method for producing electromagnetic radiation having a vacuum wavelength between approximately 10 ?m and approximately 1 mm.

Abstract: An integrated device is provided. The integrated device includes a substrate having a doped upper surface section and an insulator to define first and second substrate regions on opposite sides thereof. Vertical transistors are operably arranged on the doped upper surface section at the first substrate region. P-I-N diodes are operably arranged on the doped upper surface section at the second substrate region.

Abstract: Dual-band barrier infrared detectors having structures configured to reduce spectral crosstalk between spectral bands and/or enhance quantum efficiency, and methods of their manufacture are provided. In particular, dual-band device structures are provided for constructing high-performance barrier infrared detectors having reduced crosstalk and/or enhance quantum efficiency using novel multi-segmented absorber regions. The novel absorber regions may comprise both p-type and n-type absorber sections. Utilizing such multi-segmented absorbers it is possible to construct any suitable barrier infrared detector having reduced crosstalk, including npBPN, nBPN, pBPN, npBN, npBP, pBN and nBP structures. The pBPN and pBN detector structures have high quantum efficiency and suppresses dark current, but has a smaller etch depth than conventional detectors and does not require a thick bottom contact layer.

Abstract: An integrated circuit structure includes a semiconductor substrate; insulation regions over the semiconductor substrate; and an epitaxy region over the semiconductor substrate and having at least a portion in a space between the insulation regions. The epitaxy region includes a III-V compound semiconductor material. The epitaxy region also includes a lower portion and an upper portion over the lower portion. The lower portion and the semiconductor substrate have a first lattice mismatch. The upper portion and the semiconductor substrate have a second lattice mismatch different from the first lattice mismatch.

Abstract: This infrared detection element includes a buffer layer (InAsSb layer) 3, a buffer layer (InAs layer) 4, and a light absorption layer (InAsSb layer) 5. A critical film thickness hc of the InAs layer satisfies a relation of hc<t with a thickness t of the InAs layer. In this case, it is possible to improve crystallinities of the buffer layer 4 of InAs and the light absorption layer 5 of InAsSb formed on the buffer layer 3.

Abstract: A lateral Ge/Si APD constructed on a silicon-on-insulator wafer includes a silicon device layer having regions that are doped to provide a lateral electric field and an avalanche region. A region having a modest doping level is in contact with a germanium body. There are no metal contacts made to the germanium body. The electrical contacts to the germanium body are made by way of the doped regions in the silicon device layer.

Abstract: A light absorption apparatus includes a substrate, a light absorption layer above the substrate on a first selected area, a silicon layer above the light absorption layer, a spacer surrounding at least part of the sidewall of the light absorption layer, an isolation layer surrounding at least part of the spacer, wherein the light absorption apparatus can achieve high bandwidth and low dark current.

Abstract: A transceiver comprising a chip, a semiconductor laser, and one or more photodetectors, the chip comprising optical and optoelectronic devices and electronics circuitry, where the transceiver is operable to: communicate, utilizing the semiconductor laser, an optical source signal into the chip via a light pipe with a sloped reflective surface, generate first optical signals in the chip based on the optical source signal, transmit the first optical signals from the chip via the light pipe, and receive second optical signals from the light pipe and converting the second optical signals to electrical signals via the photodetectors. The optical signals may be communicated out of and in to a top surface of the chip. The one or more photodetectors may be integrated in the chip. The optoelectronic devices may include the one or more photodetectors integrated in the chip. The light pipe may be a planar lightwave circuit (PLC).

Abstract: A photodiode structure is based on the use of a double junction sensitive to different wavelength bands based on a magnitude of a reverse bias applied to the photodiode. The monolithic integration of a sensor with double functionality in a single chip allows realization of a low cost ultra-compact sensing element in a single packaging useful in many applications which require simultaneous or spatially synchronized detection of optical photons in different spectral regions.

Abstract: A thin film organic photovoltaic device or solar cell in one embodiment includes an organic active bilayer and an ultrathin two-dimensional metallic nanogrid as a transparent conducting electrode which receives incident light. The nanogrid excites surface plasmonic resonances at an interface between the nanogrid and active bilayer from the incident light to enhance photon absorption in the active bilayer below the nanogrid. In another embodiment, spatially separated nanograting electrodes may alternatively be formed by double one-dimensional nanogratings disposed on opposite sides of the organic active bilayer. The spatially separated nanogratings may be oriented perpendicular to each other.

Abstract: The invention provides a method for patterning a graphene layer and a method for manufacturing a display substrate. The method for patterning a graphene layer comprises: forming an isolation layer on a graphene layer; forming a photoresist layer on the isolation layer; patterning the photoresist layer; etching the isolation layer according to the patterned photoresist layer to form a patterned isolation layer; etching the graphene layer according to the patterned photoresist layer to form a patterned graphene layer; and removing the patterned isolation layer. In the method of the invention, the unfavorable condition of the prior art may be avoided that a graphene film sloughs off or a photoresist remains on a graphene film when a photoresist material is peeled off, and the product yield can be improved in the case that the production cost is controlled.

Abstract: An analyser and related methods for characterising a sample. The analyser includes an integrated laser for emitting electromagnetic radiation in at least one beam at a sample. The electromagnetic radiation can include at least two different wavelengths. A sample detector detects affected electromagnetic radiation resulting from the emitted electromagnetic radiation affected by the sample and provides output representing the detected affected radiation. The analyser also includes a processor for characterising the sample from the detector output representing the detected affected electromagnetic radiation.

Abstract: Described embodiments include optical connections for electronic-photonic devices, such as optical waveguides and photonic detectors for receiving optical waves from the optical waveguides and directing the optical waves to a common point. Methods of fabricating such connections are also described.