Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a first layer. A second layer is disposed on the first layer and different from the first layer in composition. An interface is between the first layer and the second layer. A third layer is disposed on the second layer. A gate is disposed on the third layer. A source feature and a drain feature are disposed on opposite sides of the gate. Each of the source feature and the drain feature includes a corresponding metal feature at least partially embedded in the second and the third layer. A corresponding intermetallic compound underlies each metal feature. Each intermetallic compound contacts a carrier channel located at the interface.

Abstract: A transistor includes a trench formed in a semiconductor body, the trench having sidewalls and a bottom. The transistor further includes a first semiconductor material disposed in the trench adjacent the sidewalls and a second semiconductor material disposed in the trench and spaced apart from the sidewalls by the first semiconductor material. The second semiconductor material has a different band gap than the first semiconductor material. The transistor also includes a gate material disposed in the trench and spaced apart from the first semiconductor material by the second semiconductor material. The gate material provides a gate of the transistor. Source and drain regions are arranged in the trench with a channel interposed between the source and drain regions in the first or second semiconductor material so that the channel has a lateral current flow direction along the sidewalls of the trench.

Abstract: A method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors (HPTs) integrated in a CMOS SOI wafer are disclosed and may include receiving optical signals via a top surface of a photonically-enabled CMOS chip; and generating electrical signals in the chip utilizing one or more HPTs that detect optical signals. The HPTs may comprise a base and a split collector, with the split collector comprising a silicon-on-insulator (SOI) layer and a germanium layer. The thickness of the germanium layer may be such that carriers in the base do not interact with defects from an interface between the SOI layer and the germanium layer. The electrical signals may be amplified by amplifiers, the outputs of which may be utilized to bias the HPTs by a feedback network. An electrode formed longitudinally in the direction of light travel through the HPTs may bias the base of the HPTs.

Abstract: An electro-optical device can include a plurality of nanocrystals positioned between a first electrode and a second electrode. The nanocrystal and at least one electrode can have a band gap offset sufficient to inject a charge carrier from the first electrode or second electrode into the nanocrystal. The device can be a secondary photoconductor.

Abstract: Disclosed herein is a solid-state imaging element including: (A) a light reception/charge storage region formed in a semiconductor layer, the light reception/charge storage region including M light reception/charge storage layers stacked one on top of the other, where M?2; (B) a charge output region formed in the semiconductor layer; (C) a conduction/non-conduction control region which includes a portion of the semiconductor layer located between the light reception/charge storage region and the charge output region; and (D) a conduction/non-conduction control electrode adapted to control the conduction or non-conduction state of the conduction/non-conduction control region, wherein mth potential control electrodes are provided between the mth and (m+1)th light reception/charge storage layers, where 1?m?(M?1), to control the potentials of the light reception/charge storage layers.

Abstract: An optoelectronic shutter, a method of operating the same, and an optical apparatus including the optoelectronic shutter are provided. The optoelectronic shutter includes a phototransistor which generates an output signal from incident input light and a light emitting diode serially connected to the phototransistor. The light emitting diode outputs output light according to the output signal, and the output signal is gain-modulated according to a modulation of a current gain of the phototransistor.

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate, a gate electrode provided on the semiconductor substrate via an insulating layer, and a gate insulator provided on a side surface of the gate electrode. The device includes a stacked layer including a lower main terminal layer of a first conductivity type, an intermediate layer, and an upper main terminal layer of a second conductivity type which are successively stacked on the semiconductor substrate, the stacked layer being provided on the side surface of the gate electrode via the gate insulator. The upper or lower main terminal layer is provided on the side surface of the gate electrode via the gate insulator and the semiconductor layer.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: A highly sensitive and wide spectra-range mesa type photodetector having the impurity diffusion along the mesa-sidewall is provided. A mesa-type hetero-bipolar phototransistor or photodiode having a photo-absorption layer formed by a first semiconductor layer of a first conductivity type, an anode layer (or base layer) formed by a second semiconductor layer of a second conductivity type which has an opposite polarity with the first conductivity type, a wide band gap emitter or window layer formed by the third semiconductor layer on the anode layer, and the wide band gap buffer layer of the first conductivity type which has a relatively wide band gap semiconductor as compared with the second semiconductor layer on the substrate, which also serves as the cathode layer. And the first semiconductor layer, the second semiconductor layer and the wide band gap emitter or window layer is selectively etched to form the mesa structure.

Abstract: A III-nitride power semiconductor device that includes a first III-nitride power semiconductor device and a second III-nitride power semiconductor device formed in a common semiconductor die and operatively integrated to form a half-bridge.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: A compound semiconductor device including: a substrate; an electron transit layer formed on and above the substrate; and an electron supply layer formed on and above the electron transit layer, wherein a first region or regions having a smaller thermal expansion coefficient than the electron transit layer and a second region or regions having a larger thermal expansion coefficient than the electron transit layer are mixedly present on a surface of the substrate.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer, wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: In one example, we describe a new high performance AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistor (MISHFET), which was fabricated using HfO2 as the surface passivation and gate insulator. The gate and drain leakage currents are drastically reduced to tens of nA, before breakdown. Without field plates, for 10 ?m of gate-drain spacing, the off-state breakdown voltage is 1035V with a specific on-resistance of 0.9 m?-cm2. In addition, there is no current slump observed from the pulse measurements. This is the best performance reported on GaN-based, fast power-switching devices on sapphire, up to now, which efficiently combines excellent device forward, reverse, and switching characteristics. Other variations, features, and examples are also mentioned here.

Abstract: A GaN related compound semiconductor element includes: a channel layer made of a GaN related compound semiconductor; and a source layer and a drain layer, which are disposed in a manner of sandwiching the channel layer. The source layer includes two adjacent ridge portions which are formed by selective growth. A source electrode is formed over the surface, sandwiched by the ridge portions, of the channel layer, and the surfaces of the respective two adjacent ridge portions. The selective-growth mask formed between the two ridge portions is removed by wet etching. In addition, as another embodiment, a gate electrode is formed in a manner that the direction of the longer dimension of the gate electrode is aligned with the m plane of the channel layer. Moreover, as still another embodiment, the channel layer has a multilayer structure in which a GaN layer doped with no impurity is used as an intermediate layer.

Abstract: This invention provides a photo-FET, in which a FET part and photodiode part are stacked, and the FET part and photodiode part are optimized independently in design and operational bias conditions. The semiconductor layer serving as a photo-absorption layer (41) is formed on the cathode semiconductor layer (10) of a photodiode part (50). An electron barrier layer (40) with a wider bandgap semiconductor than a photo-absorption layer (41), which also serves as an anode layer of a photodiode part (50), is formed on a photo-absorption layer (41). The channel layer (15) which constitutes the channel regions of the FET part is formed with a narrower bandgap semiconductor than an electron barrier layer (40) on an electron barrier layer (40). The hole barrier layer (16) with a bandgap wider than the semiconductor which constitutes a channel layer (15) is formed on a channel layer (15). The source electrode (30) and drain electrode (32) which are separated each others, are formed on a hole barrier layer (16).

Abstract: A two-terminal mesa phototransistor and a method for making it are disclosed. The photo transistor has a mesa structure having a substantially planar semiconductor surface. In the mesa structure is a first semiconductor region of a first doping type, and a second semiconductor region of a second doping type opposite to that of the first semiconductor region, forming a first semiconductor junction with the first region. In addition, a third semiconductor region of the first doping type forms a second semiconductor junction with the second region. The structure also includes a dielectric layer. The second semiconductor region, first semiconductor junction, and second semiconductor junction each has an intersection with the substantially planar semiconductor surface. The dielectric covers, and is in physical contact with, all of the intersections.

Abstract: Provided is a light-receiving device which has light-receiving sensitivity superior to that of a conventional Schottky diode type light-receiving device and also has sufficiently-strengthened junction of a Schottky electrode. A first contact layer formed of AlGaN and having conductivity, a light-receiving layer formed of AlGaN, and a second contact layer formed of AlN and having a thickness of 5 nm are epitaxially formed on a predetermined substrate in the stated order, and a second electrode is brought into Schottky junction with the second contact layer, to thereby form MIS junction. Further, after the Schottky junction, heat treatment is performed under a nitrogen gas atmosphere at 600° C. for 30 seconds.

Abstract: A semiconductor structure having a transistor and a thermo electronic structure. The transistor has a control electrode for controlling a flow of carriers through a semiconductor layer between a pair of electrodes. The thermo electronic structure has a first portion disposed on at least one of the pair of electrodes and a second portion disposed over a region of the semiconductor layer proximate the control electrode between the control electrode and said at least one of the pair of electrode. The thermo electronic structure extends from the first portion to the second portion for removing heat generated heat from said region in the semiconductor layer.

Abstract: A sensor including an array of light sensitive pixels, each pixel including: at least one hetero-junction phototransistor having a floating base without contact, wherein each phototransistor is a mesa device having active layers exposed at side-walls of the mesa device; and at least one atomic layer deposited high-k dielectric material adjacent to and passivating at least the side-wall exposed active layers.

Abstract: A thin film transistor includes: a gate electrode; a gate insulting film formed on the gate electrode; an oxide semiconductor thin film layer forming a channel region corresponding to the gate electrode on the gate insulating film; a channel protective layer that is formed at least in a region corresponding to the channel region on the gate insulating film and the oxide semiconductor thin film layer, and that includes a first channel protective layer on a lower layer side and a second channel protective layer on an upper layer side; and a source/drain electrode that is formed on the channel protective layer and is electrically connected to the oxide semiconductor thin film layer. The first channel protective layer is made of an oxide insulating material, and one or both of the first channel protective layer and the second channel protective layer is made of a low oxygen permeable material.

Abstract: It is an object of the present invention to reduce the cost of a wireless chip, further, to reduce the cost of a wireless chip by enabling the mass production of a wireless chip, and furthermore, to provide a downsized and lightweight wireless chip. A wireless chip in which a thin film integrated circuit peeled from a glass substrate or a quartz substrate is formed between a first base material and a second base material is provided according to the invention. As compared with a wireless chip formed from a silicon substrate, the wireless chip according to the invention realizes downsizing, thinness, and lightweight. The thin film integrated circuit included in the wireless chip according to the invention at least has an n-type thin film transistor having an LDD (Lightly Doped Drain) structure, a p-type thin film transistor having a single drain structure, and a conductive layer functioning as an antenna.

Abstract: A method and apparatus for operating an imager pixel that includes the act of applying a relatively small first polarity voltage and a plurality of pulses of a second polarity voltage on the gate of a transfer transistor during a charge integration period.

Abstract: A two-terminal mesa phototransistor and a method for making it are disclosed. The photo transistor has a mesa structure having a substantially planar semiconductor surface. In the mesa structure is a first semiconductor region of a first doping type, and a second semiconductor region of a second doping type opposite to that of the first semiconductor region, forming a first semiconductor junction with the first region. In addition, a third semiconductor region of the first doping type forms a second semiconductor junction with the second region. The structure also includes a dielectric layer. The second semiconductor region, first semiconductor junction, and second semiconductor junction each has an intersection with the substantially planar semiconductor surface. The dielectric covers, and is in physical contact with, all of the intersections.

Abstract: An example complementary metal oxide semiconductor (CMOS) image sensor includes an epitaxial layer, an array of pixels, and a trench capacitor. The array of pixels are formed on a front side of the epitaxial layer in an pixel array area of the image sensor. The array of pixels includes one or more shallow trench isolation structures disposed between adjacent pixels for isolating the pixels in the pixel array area. The trench capacitor is formed on the front side of the epitaxial layer in a peripheral circuitry area of the image sensor.

Abstract: A semiconductor device includes a photodiode formed using a silicon substrate, a wide-bandgap semiconductor layer formed on the silicon substrate and having a bandgap larger than that of silicon, and a switching element formed using the wide-bandgap semiconductor layer. The switching element is electrically connected to the photodiode so as to be on/off-controlled by a control signal from the photodiode.

Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.

Abstract: A CMOS image sensor includes a substrate including silicon, a silicon germanium (SiGe) epitaxial layer formed over the substrate, the SiGe epitaxial layer formed through epitaxial growth and doped with a predetermined concentration level of impurities, an undoped silicon epitaxial layer formed over the SiGe epitaxial layer by epitaxial growth, and a photodiode region formed from a top surface of the undoped silicon epitaxial layer to a predetermined depth in the SiGe epitaxial layer.

Abstract: A near-field terahertz wave detector comprises a semiconductor chip (12) whose longitudinal electrical resistance along its surface changes due to a near-field wave of a terahertz wave (1), an insulating film (18) which covers the surface of the semiconductor chip, and a conductive film (20) able to shield the terahertz wave by covering the surface of the insulating film. The conductive film (20) has an aperture (21) whose maximum size is one digit or more smaller than the wavelength of the terahertz wave. Further, a planar conductive probe (14) is provided between the conductive film (20) and the semiconductor chip (12). The conductive probe (14) is insulated from the conductive film (20) by the insulating film (18), and a tip (14a) of the conductive probe (14) is located inside the aperture (21).

Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.

Abstract: An image sensor and a method for manufacturing the same are disclosed. The image sensor can include a semiconductor substrate that includes photodiodes arranged for each unit pixel; an interlayer dielectric layer and metal wirings disposed on the semiconductor substrate; and a photorefractive unit that is formed on the periphery of an optical path incident on the photodiodes. The photorefractive unit has a lower refractive index than the interlayer dielectric layer. The slantly incident light can be incident on the photodiodes, while maintaining the slanted optical path as it is. The light sensitivity of the photodiodes can be improved, thereby improving image quality.

Abstract: An organic light-emitting display apparatus includes a plurality of pixels arranged on a substrate, each pixel includes: a display region including at least one pixel thin film transistor and an organic light-emitting device electrically connected to the pixel thin film transistor; and a sensor region electrically connected to the display region to affect an image display of the display region.

Abstract: To provide a light emitting device high in reliability with a pixel portion having high definition with a large screen. According to a light emitting device of the present invention, on an insulator (24) provided between pixel electrodes, an auxiliary electrode (21) made of a metal film is formed, whereby a conductive layer (20) made of a transparent conductive film in contact with the auxiliary electrode can be made low in resistance and thin. Also, the auxiliary electrode (21) is used to achieve connection with an electrode on a lower layer, whereby the electrode can be led out with the transparent conductive film formed on an EL layer. Further, a protective film (32) made of a film containing hydrogen and a silicon nitride film which are laminated is formed, whereby high reliability can be achieved.

Abstract: A solid-state imaging device of a three-transistor pixel configuration having no selection transistor has a problem of a non-selection hot carrier white point, which is specific to this apparatus. A bias current during a non-reading period of pixels is made to flow to a pixel associated with an immediately previous selection pixel, for example, the immediately previous selection pixel itself. As a result, dark current only for one line occurs in each pixel, and the dark current for one line itself can be reduced markedly. Consequently, defective pixels due to non-selection hot carrier white points can be virtually eliminated.

Abstract: The present invention provides a HPT having high sensitivity and extensive wavelength band characteristics. The collector and barrier layer (5) is formed on the photo-absorption layer (6), wherein the energy level in the conduction band is higher than that of the photo-absorption layer (6), the energy level in the valence band is almost equal to or higher than that of the photo-absorption layer (6) and is a relatively wider gap semiconductor than the photo-absorption layer. The base layer (4) formed on the collector and barrier layer (5), is a relatively narrow gap as compared with the collector and barrier layer (5), wherein the energy level in the conduction band is equal to or higher than that of the collector and barrier layer (5) in the boundary of the collector and barrier layer (5).

Abstract: A device and method for managing terahertz and/or microwave radiation are provided. The device can comprise one or more field effect transistors (FETs) that each include at least one channel contact to a central region of the device channel of the FET. The frequency of the radiation managed by the device can be tuned/adjusted by applying a bias voltage to the FET. The radiation can be impinged on the device, and can be detected by measuring a voltage that is induced by the radiation. Further, the device can generate terahertz and/or microwave radiation by, for example, inducing a voltage between two edge contacts on either side of the device channel and applying the voltage to the channel contact.

Abstract: A photodetector including a photodiode formed in a semiconductor substrate and a waveguide element formed of a block of a high-index material extending above the photodiode in a thick layer of a dielectric superposed to the substrate, the thick layer being at least as a majority formed of silicon oxide and the block being formed of a polymer of the general formula R1R2R3SiOSiR1R2R3 where R1, R2, and R3 are any carbonaceous or metal substituents and where one of R1, R2, or R3 is a carbonaceous substituent having at least four carbon atoms and/or at least one oxygen atom.

Abstract: Disclosed herein is a solid-state image pickup device including, a plurality of light receiving units, a transfer channel, a first transfer electrode, a second transfer electrode, first wiring, and second wiring.

Abstract: A sensor includes a substrate provided with a circuit element forming region and a photodiode forming region, the substrate having a silicon substrate, an insulating layer on the silicon substrate, and a silicon layer on the insulating layer; a photodiode in the silicon layer; a circuit element in the silicon layer; a first interlayer insulating film formed over the silicon layer; a first light-shielding film on the first interlayer film and having an opening in the photodiode forming region; and a first inter-region light-shielding plug arranged between the two regions, for connecting the silicon substrate and the first light-shielding film.

Abstract: An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a first impurity region formed in the semiconductor substrate spaced from the photodiode, a second impurity region formed in the semiconductor substrate spaced from the first impurity region, a first gate formed over the semiconductor substrate between the photodiode and the first impurity region, a second gate formed over the semiconductor substrate between the first impurity region and the second impurity region, a spacer formed over the fourth impurity region and a first sidewall of the second gate, and an insulating film formed over the photodiode, the first gate, the first impurity region and a second sidewall and a portion of the uppermost surface of the second gate.

Abstract: A system is provided for determining a color using a CMOS image sensor. The system includes an input port for receiving a user command. The system further includes an image sensor, an optical device that forms an image on the image sensor, and a processor. The image sensor includes an n-type substrate and a p-type epitaxy layer overlying the n-type substrate. The image sensor includes a control circuit that applies a first voltage on the n-type substrate to obtain a first output. The control circuit applies a second voltage on the n-type substrate to obtain a second output. The control circuit also applies a third voltage on the n-type substrate to obtain a third output. The p-type epitaxy layer includes a silicon germanium material. The image sensor additionally includes an epitaxy layer interposed between the n-type substrate and the p-type epitaxy layer.

Abstract: A complementary metal-oxide-semiconductor (CMOS) optical sensor structure comprises a pixel containing a charge collection well of a same semiconductor material as a semiconductor layer in a semiconductor substrate and at least another pixel containing another charge collection well of a different semiconductor material than the material of the semiconductor layer. The charge collections wells have different band gaps, and consequently, generate charge carriers in response to light having different wavelengths. The CMOS sensor structure thus includes at least two pixels responding to light of different wavelengths, enabling wavelength-sensitive, or color-sensitive, capture of an optical data. Further, a design structure for the inventive complementary metal-oxide-semiconductor (CMOS) image sensor is also provided.

Abstract: A display apparatus includes a substrate; a display area including a plurality of pixels provided on the substrate; a switching element provided for each of the pixels, the switching element including a first semiconductor layer formed of a first organic semiconductor; and a humidity sensor provided on the substrate and outside the display area. The humidity sensor includes, as a humidity sensitive layer, a second semiconductor layer formed of a second organic semiconductor having a correlation in terms of electric characteristics with the first organic semiconductor.

Abstract: An apparatus and method for forming optical black pixels having uniformly low dark current. Optical Black opacity is increased without having to increase Ti/TiN layer thickness. A hybrid approach is utilized combining a Ti/TiN OB layer in conjunction with in-pixel metal stubs that further occlude the focal radius of each pixel's incoming light beam. Additional metal layers can be used to increase the opacity into the infrared region.

Abstract: An object of the present invention is to provide a small solid-state image sensor which realizes significant improvement in sensitivity. The solid-state image sensor of the present invention includes a semiconductor substrate in which photoelectric conversion units are formed, a light-blocking film which is formed above the semiconductor substrate and has apertures formed so as to be positioned above respective photoelectric conversion units, and a high refractive index layer formed in the apertures. Here, each aperture has a smaller aperture width than a maximum wavelength in a wavelength of light in a vacuum converted from a wavelength of the light entering the photoelectric conversion unit through the apertures, and the high refractive index is made of a high refractive index material having a refractive index which allows transmission of light having the maximum wavelength through the aperture.

Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.

Abstract: A thin-film crystal wafer having a pn junction includes a first crystal layer of p GaAs, a second crystal layer of n InxAlyGa1?x?yP, the first and second crystal layers being lattice-matched layers that form a heterojunction, and a control layer of a thin-film of InxAlyGa1?x?yP differing in composition from the n InxAlyGa1?x?yP of the second crystal layer is formed at the interface of the heterojunction. The control layer enables the energy discontinuity at the interface of the InxAlyGa1?x?yP/GaAs heterojunction to be set within a relatively broad range of values and thus enables the current amplification factor and the offset voltage to be matched to specification values by varying the energy band gap at the heterojunction.

Abstract: A metamorphic buffer layer is formed on a semi-insulating substrate by an epitaxial growth method, a collector layer, a base layer, an emitter layer and an emitter cap layer are sequentially laminated on the metamorphic buffer layer, and a collector electrode is provided in contact with an upper layer of the metamorphic buffer layer. The metamorphic buffer layer is doped with an impurity, in a concentration equivalent to or higher than that in a conventional sub-collector layer, by an impurity doping process during crystal growth so that the metamorphic buffer layer will be able to play the role of guiding the collector current to the collector electrode. Since the sub-collector layer, which is often formed of a ternary mixed crystal or the like having a high thermal resistance, can be omitted, the heat generated in the semiconductor device can be rapidly released into the substrate.

Abstract: A solid-state image pickup device includes a pixel array area in which pixels each including a photoelectric conversion element are two-dimensionally arranged; first control means for performing control such that signals of pixels in a desired region of the pixel array area are sequentially read row by row; and second control means for performing control such that, when the signals of the pixels in the desired region are sequentially read row by row by the first control means, pixels in particular regions below and above the desired region are sequentially reset row by row.

Abstract: The invention of this application is a field-effect transistor type light-emitting device having an electron injection electrode, i.e. a source electrode, a hole injection electrode, i.e. a drain electrode, an emission active member disposed between the source electrode and the drain electrode so as to contact with both electrodes, and a field application electrode, i.e. a gate electrode, for inducing electrons and holes in the emission active member, which is disposed in the vicinity of the emission active member via an electrically insulating member or an insulation gap. The emission active member is made of an inorganic semiconductor material having both an electron transporting property and a hole transporting property.